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Reliable high speed bipolar ICs for long distance transmission
World Abstracts on Microelectronics and Reliability
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recipe. Four types of solution methods were found to suffice for implementing nearly all steps of the synthesis: rule-based reasoning, algorithmic computation, graph interpolation, and table lookup
Hefium leak detection in vacuum systems and IC packages. H. SI~c,~. Semiconductor int., 51 (October 1987). The sensitivity of helium leak detectors makes them well suited to checking the integrity of vacuum systems and hermetically sealed IC packages.
Signal degradation through module pins in VLSI packaging. CHING-CHAo HUANG and LEON L. WU. I B M J. Res. Dee. 31, 489 (1987). This paper investigates chip-to-chip communication through the modules and board in VLSI packaging. Transmission line models and frequency-dependent transmission line parameters are used in finding the frequency response. The time-domain solution is then obtained through the inverse Fast Fourier Transform. The results show that uncoated module pins, even of relatively short length, can cause severe signal degradation because of their magnetic property. The signal behavior is improved dramatically, however, when the module pins are coated with nonmagnetic conductive material.
A novel technique for detecting lithographic defects. ANTHONY M. McCARTHY, WES LUKASZEK, CHONG-CHEUNG FU, DAVID H. DAMERON and JAMES D. MEINDL. IEEE Trans. Semiconductor Mfg 1, 10 (1988). A novel etching technique designed to determine the extent of strictly photolithographic defects is described in this paper. This method employs accelerated electrolytic etching of metal by photoresist developer, and therefore permits developing and etching in one solution, eliminating the need for two separate process steps. This procedure is key to identifying strictly lithographic defects, and is applied to the verification of the voting lithography scheme. Defects were deliberately introduced on masks used in these experiments. Almost complete elimination of these defects on wafer patterns is achieved using vote-taking lithography.
Silicon dioxide removal in anhydrous HF gas. C. RINN CLEAVELIN and GARY T. DURANKO. Semiconductor int., 93 (November 1987). A gas phase oxide etching technique permits "HF last" processing with no particulate generation. Very sensitive detection for LSI's hot spot using liquid crystal. MASARA SANADA. Proceedings of the 17th Symposium on Reliability and Maintainability, Union of Japanese Scientists and Engineers, 53 (2-4 June 1987). This paper presents a fast, cheap and maximum sensitive method to detect the small power's hot spot and details detecting technique which uses a nematic liquid crystal. Using this technique, the 0.1 mW in terms of power dissipation was detected.
6. M I C R O E L E C T R O N I C S - - C O M P O N E N T S ,
Trends in channel-less gate arrays. MASURA HXTOSUGI. J. Electron, Engno, 28 (October 1987). Attention is now focused on channel-less gate arrays with 50,000 gates on one chip. The new gate array, called the Compacted Array, was jointly developed by Toshiba and LSI Logic. With this development the systems-on-a-chip era has arrived for ASICs. New integral representations of circuit models and elements for the circuit technique for semiconductor device analysis. C. T. SAH. Solid-St. Electron. 30, 1277 (1987). New integral representations of the distributed and one-lump circuit models and their circuit elements, accurate to mesh-size cubed (Ax)3 using the trapezoidal approximation, are presented for large-signal transient, d.c. and small-signal numerical and analytical simulations of semiconductor devices. Materials testing to avoid static problems with microelectronics. J. N. CHUBB. New Electron., 49 (April 1988). The two main problems which static cause are: first, immediate and latent damage of semiconductor devices by direct static discharges or by electric fields from nearby static charges; secondly, upset of the operation or data of microelectronic systems by signals coupling in from static discharges. The manufacture, handling and assembly of semiconductor devices into circuits and equipment can be, and needs to be, carried out in work areas where the static conditions are properly controlled--and checked so to be. The transport of devices and assemblies and the use of microelectronic equipment usually needs to take place in normal environments, where static conditions are not controlled. Static measurements fall into two main categories: first,
Comparison of two wafer inspection methods for particle monitoring in semiconductor manufacturing. LEON L. PESOTCHINSKYand ZXNOVFICHTENHOLZ. IEEE Trans. Semiconductor Mfg 1, 16 (1988). Two typical wafer inspection techniques employed in semiconductor manufacturing are analyzed. It is found that with the transition to a superclean production environment these inspection methods may not be equivalent in defect density estimation. Fundamental reasons for such a phenomenon are discussed and recommendations are made. An analytical explanation is given. The study is based on data collected in two manufacturing areas of Siliconix Inc.
SYSTEMS
AND
EQUIPMENTS
measurements of static voltages and charge levels in controlled work areas. This relates mainly to investigation of practical static conditions and to the static dissipation characteristics of materials. Secondly, measurements to ensure immunity to static fields and static discharges in uncontrolled environments. This is mainly a question of shielding and signal attenuation. The present article is concerned with measurements on materials in the first category. Triple diffused transistor for digital IC applications. BOGDAN M. WILAMOWSKI, MIROSLAW KORZENIOWSKI, ANDRZEJ SOBKOWIAK,BARBARAWELNIAK. WLADYSLAWWIELICH and ZBIGNIEW WIERZBICKI. Electron Technol. 19 (3/4), 91 (1986). A simplified bipolar transistor structure for digital integrated circuits has been developed. The fabrication process requires neither the epitaxial layer growth nor the buried layer diffusion. The design transistors were fabricated and tested. Both static and dynamic parameters of the developed transistor are comparable to parameters of the transistor fabricated with standard technology.
Reliable high speed bipolar ICs for long distance transmission. J. BRIERRE, J.-C. CADENE, J.-Y. FOUgRmR, J.-M. TmLLmZ and D. TRIBET. Electl Commun. 61, 396 (1987). Modern high speed transmission systems require advanced bipolar integrated circuits ff they are to achieve the high performance required by today's applications. For both terrestrial and undersea communication systems, emitter coupled logic technology offers a number of advantages. Gate array playing a main role in ASIC. KtmlO KOMATSU. J. Electron. Engno Japan, 52 (April 1988). ASIC has not only
657
recipe. Four types of solution methods were found to suffice for implementing nearly all steps of the synthesis: rule-based reasoning, algorithmic computation, graph interpolation, and table lookup
Hefium leak detection in vacuum systems and IC packages. H. SI~c,~. Semiconductor int., 51 (October 1987). The sensitivity of helium leak detectors makes them well suited to checking the integrity of vacuum systems and hermetically sealed IC packages.
Signal degradation through module pins in VLSI packaging. CHING-CHAo HUANG and LEON L. WU. I B M J. Res. Dee. 31, 489 (1987). This paper investigates chip-to-chip communication through the modules and board in VLSI packaging. Transmission line models and frequency-dependent transmission line parameters are used in finding the frequency response. The time-domain solution is then obtained through the inverse Fast Fourier Transform. The results show that uncoated module pins, even of relatively short length, can cause severe signal degradation because of their magnetic property. The signal behavior is improved dramatically, however, when the module pins are coated with nonmagnetic conductive material.
A novel technique for detecting lithographic defects. ANTHONY M. McCARTHY, WES LUKASZEK, CHONG-CHEUNG FU, DAVID H. DAMERON and JAMES D. MEINDL. IEEE Trans. Semiconductor Mfg 1, 10 (1988). A novel etching technique designed to determine the extent of strictly photolithographic defects is described in this paper. This method employs accelerated electrolytic etching of metal by photoresist developer, and therefore permits developing and etching in one solution, eliminating the need for two separate process steps. This procedure is key to identifying strictly lithographic defects, and is applied to the verification of the voting lithography scheme. Defects were deliberately introduced on masks used in these experiments. Almost complete elimination of these defects on wafer patterns is achieved using vote-taking lithography.
Silicon dioxide removal in anhydrous HF gas. C. RINN CLEAVELIN and GARY T. DURANKO. Semiconductor int., 93 (November 1987). A gas phase oxide etching technique permits "HF last" processing with no particulate generation. Very sensitive detection for LSI's hot spot using liquid crystal. MASARA SANADA. Proceedings of the 17th Symposium on Reliability and Maintainability, Union of Japanese Scientists and Engineers, 53 (2-4 June 1987). This paper presents a fast, cheap and maximum sensitive method to detect the small power's hot spot and details detecting technique which uses a nematic liquid crystal. Using this technique, the 0.1 mW in terms of power dissipation was detected.
6. M I C R O E L E C T R O N I C S - - C O M P O N E N T S ,
Trends in channel-less gate arrays. MASURA HXTOSUGI. J. Electron, Engno, 28 (October 1987). Attention is now focused on channel-less gate arrays with 50,000 gates on one chip. The new gate array, called the Compacted Array, was jointly developed by Toshiba and LSI Logic. With this development the systems-on-a-chip era has arrived for ASICs. New integral representations of circuit models and elements for the circuit technique for semiconductor device analysis. C. T. SAH. Solid-St. Electron. 30, 1277 (1987). New integral representations of the distributed and one-lump circuit models and their circuit elements, accurate to mesh-size cubed (Ax)3 using the trapezoidal approximation, are presented for large-signal transient, d.c. and small-signal numerical and analytical simulations of semiconductor devices. Materials testing to avoid static problems with microelectronics. J. N. CHUBB. New Electron., 49 (April 1988). The two main problems which static cause are: first, immediate and latent damage of semiconductor devices by direct static discharges or by electric fields from nearby static charges; secondly, upset of the operation or data of microelectronic systems by signals coupling in from static discharges. The manufacture, handling and assembly of semiconductor devices into circuits and equipment can be, and needs to be, carried out in work areas where the static conditions are properly controlled--and checked so to be. The transport of devices and assemblies and the use of microelectronic equipment usually needs to take place in normal environments, where static conditions are not controlled. Static measurements fall into two main categories: first,
Comparison of two wafer inspection methods for particle monitoring in semiconductor manufacturing. LEON L. PESOTCHINSKYand ZXNOVFICHTENHOLZ. IEEE Trans. Semiconductor Mfg 1, 16 (1988). Two typical wafer inspection techniques employed in semiconductor manufacturing are analyzed. It is found that with the transition to a superclean production environment these inspection methods may not be equivalent in defect density estimation. Fundamental reasons for such a phenomenon are discussed and recommendations are made. An analytical explanation is given. The study is based on data collected in two manufacturing areas of Siliconix Inc.
SYSTEMS
AND
EQUIPMENTS
measurements of static voltages and charge levels in controlled work areas. This relates mainly to investigation of practical static conditions and to the static dissipation characteristics of materials. Secondly, measurements to ensure immunity to static fields and static discharges in uncontrolled environments. This is mainly a question of shielding and signal attenuation. The present article is concerned with measurements on materials in the first category. Triple diffused transistor for digital IC applications. BOGDAN M. WILAMOWSKI, MIROSLAW KORZENIOWSKI, ANDRZEJ SOBKOWIAK,BARBARAWELNIAK. WLADYSLAWWIELICH and ZBIGNIEW WIERZBICKI. Electron Technol. 19 (3/4), 91 (1986). A simplified bipolar transistor structure for digital integrated circuits has been developed. The fabrication process requires neither the epitaxial layer growth nor the buried layer diffusion. The design transistors were fabricated and tested. Both static and dynamic parameters of the developed transistor are comparable to parameters of the transistor fabricated with standard technology.
Reliable high speed bipolar ICs for long distance transmission. J. BRIERRE, J.-C. CADENE, J.-Y. FOUgRmR, J.-M. TmLLmZ and D. TRIBET. Electl Commun. 61, 396 (1987). Modern high speed transmission systems require advanced bipolar integrated circuits ff they are to achieve the high performance required by today's applications. For both terrestrial and undersea communication systems, emitter coupled logic technology offers a number of advantages. Gate array playing a main role in ASIC. KtmlO KOMATSU. J. Electron. Engno Japan, 52 (April 1988). ASIC has not only