Robust DPC-SVM control strategy for shunt active power filter based on H∞ regulators

Electrical Power and Energy Systems 117 (2020) 105699

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Robust DPC-SVM control strategy for shunt active power filter based on H∞ regulators

T

Sabir Ouchena, , Heinrich Steinharta, Mohamed Benbouzidb, Frede Blaabjergc ⁎

a

Laboratory of Power Electronics and Electrical Drives, Aalen University, Germany University of Brest, UMR CNRS 6027 IRDL, Brest, France c Department of Energy Technology, Aalborg University, Aalborg, Denmark b

ARTICLE INFO

ABSTRACT

Keywords: Shunt active power filter (SAPF) Space vector modulation (SVM) Direct power control (DPC) H∞ regulator

This paper proposes an improved direct power control (DPC) strategy for shunt active power filter (SAPF). The conventional DPC control suffers from variable switching frequency and high-power ripples due to hysteresis comparators used. In order to overcome the drawbacks and to ensure a fast response, a perfect reference tracking with required dynamic behavior and low power ripple level, a direct power control combined with space vector modulation DPC-SVM is proposed. An H∞ regulator is considered for the closed loop active and reactive power. The effectiveness of the proposed DPC-SVM control based on H∞ regulator is examined by simulation and experimental validation using Matlab/Simulink software with a real-time interface based on dSPACE 1104 under different loading conditions.

1. Introduction In the last decade, the intensive use of non-linear loads has caused serious disturbances, such as harmonics, unbalanced currents are injected into the power grid due to the development of power electronics [1,2]. Consequently, the generation of harmonics causing disturbances in the power quality has become a significant problem for the distributors and consumers of electric power as well. In order to eliminate such issues and improve the quality of power supply, active power filters (APFs) have been suggested. The most commonly used power circuit for power disturbances nullification and compensating reactive power is the shunt active power filter (SAPF) [3]. In the technical literature, different control strategies types have been proposed for the control of SAPF, voltage-oriented control (VOC) is a very common strategy because of its simplicity and its satisfying steady-state performance. In VOC, two integral proportional (PI) controllers are generally introduced in the synchronous reference frame for current adjustment. Nevertheless, the dynamic efficiency of a PI controller is usually reduced due to the trade-off between noise immunity, stability margin and overrunning during the transient process. DPC control is an alternative for VOC control. It was first proposed in 1991 by Ohnishi [4] for controlling the active and reactive instantaneous power of a three-phase PWM rectifier. This DPC technique comes from the direct torque control (DTC) proposed by Takahashi [5]

used for the control of electric machines. Later, in 1998, a similar algorithm was presented by Noguchi [6], which had a greater impact on the scientific community, and it is still considered as a reference point to which the new DPC implementations are compared. The principle of the DPC control is based on the calculation of the active and reactive powers through the current and input voltage measurements of the PWM converter and instantly performs the power control by using hysteresis comparators and switching table [7]. The voltage vector of the control is selected from a switching table, which consists of the active and reactive power errors as well as the angular position of the source voltage vector. In [8], Malinowski follows a control scheme similar to [6]. The main difference is that it proposes to estimate a vector called virtual flux instead of the source voltage vector. Unfortunately, this modification of the algorithm involves the calculation of the derivative of the measured currents. This calculation can become noisy, particularly at low current, and it strongly depends on system parameters such as inductance, as pointed out in [6]. Despite the merits of a simple structure, fast response and robustness, the DPC control has high steady state power ripples and a variable switching frequency that is caused by a switching table and using hysteresis controllers. In addition, the required sampling frequency is generally very high in order to obtain relatively satisfactory performance [9], which increases the CPU hardware load. To overcome these disadvantages, various modified DPC configurations have been

Corresponding author. E-mail addresses: [email protected], [email protected] (S. Ouchen), [email protected] (H. Steinhart), [email protected] (M. Benbouzid), [email protected] (F. Blaabjerg). ⁎

https://doi.org/10.1016/j.ijepes.2019.105699 Received 27 May 2019; Received in revised form 7 October 2019; Accepted 5 November 2019 0142-0615/ © 2019 Elsevier Ltd. All rights reserved.

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Nomenclature Ts es is idq eαβ Ls Rs Lf LL RL Lc Pref Qref C Vdc,Vdc

ref

Sa, Sb, Sc switching state Kp proportional gain integral gain Ki ωn natural frequency Θ phase angle H∞ H infinity control PI proportional-integral APF active power filtering DTC direct torque control DPC direct power control VOC voltage-oriented control SVM space vector modulation SAPF shunt active power filter THD total harmonic distortion PLL phase-locked loop EMF electromotive force SISO single input single output

sampling-time grid voltage grid current grid currents in dq system grid voltages in αβ system source inductance source resistance output filter inductance load inductance load resistance rectifier bridge input inductance reference active power reference reactive power DC bus capacitor actual and reference Vdc

proposed. In the past, some work has been done to improve conventional DPC by proposing new switching table [10,11]. In general, the proposed tables allow an improvement of the performance compared to the classical table proposed in [6]. However, most of them [12,13] are based on implicit or explicit assumptions to ensure that they are simple and depend only on the grid voltage angle as indicated in [11] to attain a more accurate and efficient switching table over a wide power range [6], line inductance information is needed [11]. Another control strategy called direct power control with vector modulation (DPC-SVM), proposed by Malinowski [14] is also used, which has the advantages of VOC and DPC [15]. One of the other advantages of the DPC-SVM strategy is the use of SVM block instead of the switching table, which leads to a fixed switching frequency [16]. However, since the traditional DPC-SVM method uses PI controller to calculate the control angle and amplitude on Vref, an overrun can appear in power if the PI controller gain values are not adjusted appropriately [17]. To avoid the problems mentioned above, this paper aims to present a closed loop power control DPC-SVM based on an H∞ regulator. This

regulator is used to obtain robust performance with respect to external disturbances at low frequencies and the measurement noise at high frequencies of a linear system with constant parameters, eliminate the undesirable harmonics and ensure a unity power factor. In addition, a PI regulator is proposed to control the DC bus voltage. The rest of the paper is organized as follows: in section II, the description of the system is given. While in section III, all proposed control techniques are more detailed. To test the efficiency of these approaches, section IV shows and comments the obtained results. Finally, section V concludes this study. 2. System description The proposed system consists of three main parts: the first is the three-phase network. The second one is the SAPF active power filter that is controlled by DPC-SVM based on H∞ regulators. Finally, the DC bus controller, the PI controller is used to control the DC bus voltage and then generate the active power reference for the power control strategy as depicted in Fig. 1:

Fig. 1. System description of the studied system. 2

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3. Control approaches

P = ed id + eq iq Q = ed iq ed iq

3.1. DC bus voltage regulator

where ed and eq: Grid's E.M.F in the Park plane. Assume that the source voltage vector is aligned with the d axis of the rotating dq, as shown in Fig. 4. Eq. (5) will then become:

To reduce variations and instability of the DC bus voltage, a proportional-integral (PI) controller with anti-windup compensation is proposed for the DC bus voltage regulation, as shown in Fig. 2. The regulator acts using a proportional gain Kp, improving the dynamic and the quantity of integrator via the gain Ki, for good operation in steady state. To avoid saturation of the output of the controller, caused by noise detection amplification, an anti-windup loop is added by a second integrator term, with a loop gain (1/Tu) chosen too high, without affecting the desired performances [18]. To identify the gains of the controller, the system transfer function is first defined. The synthesis of the Kp and Ki gains of the PI controller passes through placement of the poles of the direct closed loop, is given by the following transfer function:

Kp . s + K i

P = ed id Q = ed iq

ed = U =

n

S+

n

Ki = C .

n. n

As mentioned above, the control of the power switches via the SVM block is derived from the control loops of the active and reactive powers. The synthesis of the H∞ regulators can be performed analytically using a simplified model of the SAPF in the rotating dq reference, the where the voltage source is aligned on the d axis as showing in Fig. 4.

(2)

di

vd = Rid + L dtd

Liq + U diq

vq = Riq + L dt + Lid

(3)

(9)

As it can be seen in Fig. 5, the control of the active and reactive powers and consequently of the currents id and iq can be synthesized by the voltages vd, and vq via two regulators H∞, and the direct loop presents a first order transfer function. In order to obtain a robust performance against external disturbances at low frequencies (coupling term), and the high frequency measurement noise of a linear system with constant parameters, the H∞ control is used. The H∞ standard has a different physical interpretation. This is the maximum singular value of any transfer function in a closed loop. It can be considered as a maximum gain at any frequency for any Single Input Single Output (SISO) system [21,22]. The problem formulation is important in the controller design, as this design approach provides an optimal solution. The main objective of this design method is to make the H∞ standard of the system minimum. Indeed, the H∞ synthesis allows to take into account a priori and explicitly, frequency and time specifications (rise time, disturbance rejection, and noise attenuation). Generally, the looped scheme in Fig. 6 is used. For this representation: P represents the general process, including all weighting functions, K represents a central corrector, W represents the exogenous inputs of the system (inputs to be monitored and

Consequently, the reference of the active power is deducted as follows:

Pref = Vdc. Ism

(8)

b. Conception of H∞ regulators

(1)

C

2

(7)

P = Uid Q = Uiq

By equalizing (1) and (2), and adopting an optimal damping coefficient; the gains of the controller are quantified as follows:

Kp = 2. .

Um

Um is the magnitude of the network voltage. Eq. (7) will then be:

2 n.

3 2

eq = 0

From (1), we note that the closed loop is a canonical transfer function of second order:

Vdc = 2 Vdc ref s + 2. .

(6)

In a balanced three-phase system, we have:

K p C (s + K i K p )

Vdc = = 2 Vdc ref C . s 2 + Kp . s + K i s + Kp C . s + K i C

(5)

(4)

where Ism The amplitude of the fundamental current required ensuring the balance of the active powers. 3.2. Direct power control with space vector modulation strategy (DPCSVM) The weaknesses of the conventional DPC can be reduced by using an SVM block as a fixed switching frequency. In this method, the hysteresis controllers and the switching table are substituted by two controllers from the robust control H∞, and a vector modulation block (SVM), thus ensuring a constant switching frequency [12]. The DPC-SVM control strategy calculates the states (Sa, Sb, Sc) of the voltage inverter to meet the following two requirements: Reduced power ripples and constant switching frequency operation [19]. The DPC-SVM control algorithm consists of an instantaneous active and reactive power estimator; an external control loop for the DC bus voltage, determining the set point of the active power Pref, via a PI regulator, and two internal loops for the active and reactive powers using H∞ regulators. It should be noted that the reference of the reactive power Qref is kept equal to zero, thus ensuring a unity power factor operation. The signals at the output of the H∞ controllers in αβ coordinates are transmitted to the SVM block, which determines the current states of the IGBTs of the inverter, [20]. Fig. 3 illustrates the synoptic of such control. a. Calculation of active and reactive powers

Fig. 2. PI controller block diagram with anti-windup compensation for Dc-link voltage control.

The active and reactive power expressions are provided by (5), where the notional flux is aligned on q axis in quadrature. 3

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Fig. 3. Principle of the DPC-SVM based on H∞ regulator.

Fig. 6. Standard stricture of H∞ controller.

To achieve the objectives in terms of performance and robust stability, it is possible to introduce weighting functions at the levels of the signals to be optimized. These functions are in fact filters that allow particular frequency ranges to be favored, as shown in Fig. 7, where: Ws (t) is the low-pass transfer function with high gain at low frequencies, Wks (t) is the highpass transfer function with high gain in high frequencies and Wt (t) is the low-pass transfer function with high gain in high frequencies. The generalized plant P(s) is given as

Fig. 4. Voltage and current source in stationary αβ and rotating dq reference.

disturbance to be rejected), Z represents the vector of the signals to be minimized (e. g. Tracking error), v represents the input of the corrector and u represents the process control signals. To solve the problem H∞, it is generally convenient to use the following representation [23]:

x (t ) = Ax (t ) + Bx (t ) + BW (t ) + B2 u (t ) Z (t ) = C1 x (t ) + D11 W (t ) + D12 u (t ) v = C2 x (t ) + D21 W (t ) + D22 u (t )

z z z e

(10)

Ws 0 = 0 1

Ws G Wks Wt G G

w u

In regards to the following state space realizations

Fig. 5. Block diagram of active and reactive powers control loops with H∞ controllers. 4

(11)

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discussed in the robust control theory, controller synthesis requires the selection of two weight functions. There are several methods of weight selection in the literature In many of these design methods, the weighting functions are chosen by trial and error, then the H∞ controller is synthesized by the loop shaping technique [25]. S and T are the mixed sensitivity and sensitivity functions, which are determined as follows:

Fig. 7. Standard form of mixed sensitivity.

S=

1 1 + GK

(18)

T=

GK 1 + GK

(19)

S+T=1 G=

A B ,G = s C D

As Bs , Gks = Cs Ds

Aks Bks , Gt = Cks Dks

At Bt Ct Dt

The weights Ws, Wks and Wt are the tuning parameters and it typically requires some iterations to obtain weights, which will yield a good controller. These weights are given by:

(12)

A possible state space realization for P(s) may be written as follows:

Ws 0 P= 0 1

Ws G A B1 B1 Wks = C1 D11 D22 Wt G C2 D21 D22 G

Ws =

Wt =

K (s ) =

In case of mixed sensitivity problem, our aim is to identify a rational function controller K(s) and to render the closed loop system stable satisfying the following expression:

where P is the transfer function from W to Z.

(23)

2.388e07 s + 5.97e09 s2 + 1.679e07 s + 1.929e04

(21)

4. Simulation results

(16)

where |Tzw| = P is the cost function. By applying the minimum gain theorem, we can make the H∞ norm of Tzw less than unity [24]:

Ws S min Tzw = min Wks KS Wt T

(22)

A is the maximum permissible steady-state offset, 0 is the desired bandwidth and M is the peak sensitivity (M ≅ 1.5–2), A = 10−4. Fig. 6, illustrates the frequency plot of the two sensitivities S and T leading to a standard γ = 1.516. It should be noted that the H∞ regulator is valid for both types of active and reactive power control (see Fig. 8).

(15)

|Tzw| =

s+ 0 M As + 0

(21)

In the present work, the mixsyn function of the Matlab software has been used for the synthesis of the central controller K(s) with the following expressions:

(14)

Ws S min P = min Wks KS = Wt T

s M+ 0 s + 0A

Wks = const.

(13)

From (11) and (13), one can write a mixed sensitivity problem as follows:

Ws S P = Wks KS Wt T

(20)

Numerous simulations were performed to evaluate the described control method. The simulations focused on the properties of the DPCSVM control for the SAPF based on H∞ regulator during transients and steady state. The simulation models were developed in Matlab/ Simulink®. The electrical parameters of the modeled power circuit are listed in Table A in the Appendix. Fig. 9, shows respectively the plots of the source voltages es, the source current is, the load current iL, and that of the filter if. The filter is activated at t = 0.2 s, and after that, the following remarks are

1 (17)

Hence, one can obtain a stabilizing controller K(s) by solving the algebraic Riccati equations, thus minimizing the cost function γ. As

Fig. 8. Frequency response of T and S sensitivities. 5

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Fig. 9. Simulation results of source Voltage es, source current is, load current iL, filter current if waveforms at switched on filter steps, t = 0.2.

Fig. 10. Simulation results of source current spectrum before (a) filtering and after (b) filtering.

Fig. 11. simulation results of DC bus voltage waveform at switched on filter steps t = 0.2.

extracted:

as shown on the bottom of Fig. 10. 3. Fig. 12 shows the waveforms of the active and reactive powers. It may be noted that the two quantities effectively follow their references, which demonstrate the effectiveness of introducing H∞ regulators. In addition, the reactive power is maintained zero and ensuring unity power factor operation.

1. The DC bus voltage Vdc, meets its reference value (173 V), periodically during a response time t = 60 ms as shown in the top of Fig. 10 (see Fig. 11.). 2. The current iq shows the reactive power. It converges to a null value 6

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Fig. 12. Simulation results of Active P and reactive Q power waveforms at switched on filter steps t = 0.2.

Fig. 13. Simulation results of DC bus voltage Vdc, source voltage es, source current is, filter current and iL Transient responses during a load change, from R = 12 Ω to R = 24 Ω and inversely.

Fig. 14. Simulation results of Active power P transient responses during a load change, from R = 12 Ω to R = 24 Ω and inversely.

To show the good performance of the proposed DPC-SVM control based on H∞ regulators during a transient, the non-linear load is changed in t1 = 0.4 s and t2 = 0.6 s, from 12 Ω to 24 Ω and vice versa. From Fig. 13, the robustness of this control method is proved by the fact that the source current is remains purely sinusoidal and unaffected by the unexpected changes of the nonlinear load at t1 = 0.4 s and t2 = 0.6 s. At the double load change, the current is instantaneous and unaffected, neither of its sinusoidal form nor of its quality. However, there is a slight dip in the DC bus voltage during 60 ms transient. Furthermore, Fig. 14 shows the waveforms of the instantaneous active power P. It should be noted that as soon as the SAPF

is put into service at the instant t = 0.2 s and during the double jump of load at t1 and t2, the active power returns each time to its optimum value after a short transient (see Fig. 15). In conclusion, all these simulation results obtained confirm the robustness and good dynamic response of the proposed DPC-SVM control. 5. Experimental results To validate the simulation results of the proposed DPC-SVM based on H∞ regulators studied on the above section, an experimental test bench is designed by using a dSPACE 1104 board as illustrated in 7

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Fig. 15. Experimental test bench.

Fig. 16. Experimental results of Source voltage (es), source current (is), load current (iL) and filter current (if) when SAPF activated.

Fig. 18. Experimental results of Source current and its spectrum before filtering.

Fig. 17. Experimental results of DC bus voltage (Vdc) and source currents in dq frame when SAPF activated.

Fig. 19. Experimental results of source current and its spectrum after filtering.

and after filtering. From these results, we can clearly see that:

Fig. 16. The used parameters are the same as those listed in table A in the appendix, which are used for the simulation part. Figs. 16 and 17 respectively illustrate top-down the curves of the voltage source es, the source current is, and the DC bus voltage Vdc, source current in dq axis id, iq, source current and its spectrum before

1. After the implementation of the filter, the source current resumes to become sinusoidal; 2. The DC bus voltage reaches its reference without overflow or static error; 8

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which means a unity power factor operation. To prove the robustness of the proposed control, in this part, we will experimentally test the behavior of the system during a sudden change in the nonlinear load in order to evaluate the speed and robustness of the proposed DPC-SVM control based on H∞ regulators. Figs. 21 and 22 show a step in the DC bus voltage Vdc, the source current is, the filter current if, the active power P during a variation of the load. The robustness of this control is proven by the fact that the source current is remains purely sinusoidal and unaffected by this load variation. Furthermore, it can be seen that the DC bus voltage Vdc remains regulated at its reference value after a short transient of 60 ms. In addition, it is also seen that the active power P undergoes a relative increase in this load variation. Fig. 20. Experimental results of active (P) and reactive (Q) powers source when SAPF activated.

5.1. Comparative analysis In order to prove both robustness and effectiveness of the proposed DPC-SVM based on H∞ regulators, a comparative analysis with DPCSVM based on PI regulators is made. This comparative is based on ability to reject disturbances and the current THDi. Each system is simulated in the same conditions and with the same parameters. Through Figs. 23, 24 and Table 1, it is clear that the proposed DPCSVM control based on H∞ controllers has provided better results than the DPC-SVM based on PI controllers. One can see that the proposed DPC-SVM control based on H∞ controllers is able to reject almost the perturbations with what is a noise introduced to active and reactive powers. On the other hand, one can see also that the proposed DPCSVM control based on H∞ controllers has delivered a better THDi in both simulation and experimental tests.

3. The quadrature current iq is kept zero. Figs. 18–20 show the spectrum of the source current and the waveforms of the active P and reactive Q power after introducing the SAPF. From these graphs, it is noticed: 1. The source current rejoins its sinusoidal form with a spectral analysis devoid of low-order harmonics. The source current THD decrease from THDi = 23.6% to THDi = 3.53%, which is relatively low but complies with the IEEE-519 standard (≤5%). 2. The active and reactive powers reach their references after a short dynamic period. It is notable that the reactive power is almost null,

Fig. 21. Experimental results of DC bus voltage (Vdc), Transient responses during a load change, from R = 12 Ω to R = 24 Ω and inversely. 9

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Fig. 22. Experimental results of transient responses during a load change, from R = 12 Ω to R = 24 Ω and inversely.

Fig. 23. Active power under perturbation for DPCSVM based on H (a) PI(b).

Fig. 24. Active power under perturbation for DPCSVM based on H (a) PI(b).

6. Conclusion

Table 1 Comparative analysis. Simulations

In this paper, simulation and real time implementation study of DPC SVM based on H∞ is presented. For this purpose, simulation and experimental results show that the proposed control is able to handle all distorted conditions in the grid and give a purely sinusoidal source current with a good THDi that meets IEEE-519 standards. In addition, unity power factor is insured. The validity and efficiency of the proposed methodology have been proved through simulations and experiments.

Experiments

Control strategies

Sampling period

THD % Before

After

DPC SVM based on PI DPC SVM based on H∞

10−6 s

22.6%

0.82%

22.6%

0.71%

Sampling period

THD % Before

After

10−4 s

23.6%

3.63%

23.6%

3.53%

Declaration of Competing Interest The author declare that there is no conflict of interest.

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Appendix A See Table A1.

Table A1 Simulation and experimental parameters. Parameters Sampling time Source frequency ƒ Source voltage es Resistance (Rs), inductance (Ls) Resistance (RL), inductance (LL) Inductance of rectifier bridge input (Lc) Inductance, output filter (Lf) loop gain (1/Tu) Capacitor C Vdc reference

Values Simulation Experimental

10−6 s 10−4 s 50 Hz 53 V RMS 0.33 Ω, 1.32 mH 12 Ω, 0.56 mH 1 mH 3mH 10−3 s 1100 µF, 173 V

Appendix B. Supplementary material Supplementary data to this article can be found online at https://doi.org/10.1016/j.ijepes.2019.105699.

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