- Email: [email protected]
ROMs
BASIC compiler Futuredata have announced a universal BASIC compiler for their microprocessor systems. It produces code which can run on Intel 8080 and 8085, Motorola 6800 and Zilog Z80 microprocessors. The compiler eliminates the need to rewrite programs when switching from one microprocessor to another; in addition to the four micros already supported, versions of the compiler will be generated to support other processors as demand indicates. All standard BASIC statements are included as well as string variables, array variables, bit functions, PEEK/POKE for write/read to direct memory addresses and INP/OUT for moving data from and to I/O ports. A high-level debugger allows the user to set and clear breakpoints with BASIC statement numbers and, once the execution has stopped, to display variables in memory using the BASIC variable name. Futur.edata BASIC has the option of outputting an assembly language source code of the compiled program to an editor file. Each BASIC statement becomes a comment in the assembly listing; this allows the user to optimize sections of the program by editing the assembly language. The compilers run in systems with at least 32 kbytes of memory and are available for any of Futuredata's disc-based microsystems. (I 5 G Data
Sales Limited, 52 Moorbridge Road, Maidenhead, Berks, UK. Telephone: 0628 36828)
Fast single-chipper A single-chip NMOS microcomputer, the R6500/1, operating at 2 MHz with a 1/~s minimum instruction execution time, has been developed by Rockwell. The 40-pin R6500/1 is fully software compatible with the 6500 family. It operates from a single 5 V power supply, and features a separate power pin which allows RAM memory to function on 10% of the operating power.
vol 2 no 4 august 78
Onchip features include 2 k x 8-bit ROM, 64 x 8-bit RAM, 16-bit interval timer/event counter, and 32 bidirectional I/O lines. Additionally, it has maskable and nonmaskable interrupts and an event-in/timer-out line. The 32 bidirectional I/O lines are divided into four 8-bit ports (A, B, C and D). Each line can be selectively used as an input or an output. Two inputs to port A can be used as edge-sensing software-maskable interrupt inputs: one senses a rising edge; the other a falling edge. Four different counter modes of operation are programmable:
electrically identical to the standard R6500/1 part, to facilitate prototype system development. An R6500/1 personality module for software and hardware development and in-circuit emulation is available as an option to the System 65 microcomputer development system. Rockwell have also expanded their PPS range to eight models with a new device featuring A/D conversion multiplexed to two input ports. The table shows the complete range.
(Pelco Limited, Enterprise House, 83-85 Western Road, Hove, Sussex BN3 1JB, UK. Telephone: Brighton (0273) 722155)
•
free running with clock cycles counted for real-time reference • free running with output signal toggled by each counter overflow • external event counter • pulse-width measurement mode
ROMs GI Microelectronics have announced availability of two new 32k ROMs, the RO-3-9332B and RO-3-9332C. Both devices have fully static operation and offer 450 ns and 350 ns access times, respectively. (General Instru-
A 16-bit latch automatically reinitializes the counter to a present value. Interrupt on overflow is software maskable. Rockwell provides a 64-pin emulator part, of which 40 pins are
ment Microelectronics Corporation, Regency House, 1-4 Warwick Street, London WIR 5WB, UK. Telephone: 01-439 1891)
Rockwell PPS-4/1 one-chipmicrocomputers Features
MMT5
MM76
MM76C*
MM76E
MM77
MM78
MM76L
MM76EL
ROM (X8)
640
640
640
1024
1344
2048
640
1024
RAM (X4)
48
48
48
48
96
128
48
48
Total I/O lines
22
31
39
31
31
31
31
31
Conditional interrupt
I
2
2
2
2
2
2
2
Parallel input
4
8
8
8
8
8
8
8
Bidirectional parallel
8
8
8
8
8
8
8
8
Discrete
9
l0
I0
I0
I0
I0
I0
10
3
3
3
3
3
3
3
Serial Package (in-line) Power
-
28-pin 42-pin 52-pin dual quad quad
42-pin 42-pin 42-pin 40-pin 40-pin quad q u a d quad dual dual -6.5 V to-11 V -15 V at 70 mW (typical) at 15 mW (typical)
*Two 8-bit or one 16-bit presetable up/down counter
255
Sales Limited, 52 Moorbridge Road, Maidenhead, Berks, UK. Telephone: 0628 36828)
Fast single-chipper A single-chip NMOS microcomputer, the R6500/1, operating at 2 MHz with a 1/~s minimum instruction execution time, has been developed by Rockwell. The 40-pin R6500/1 is fully software compatible with the 6500 family. It operates from a single 5 V power supply, and features a separate power pin which allows RAM memory to function on 10% of the operating power.
vol 2 no 4 august 78
Onchip features include 2 k x 8-bit ROM, 64 x 8-bit RAM, 16-bit interval timer/event counter, and 32 bidirectional I/O lines. Additionally, it has maskable and nonmaskable interrupts and an event-in/timer-out line. The 32 bidirectional I/O lines are divided into four 8-bit ports (A, B, C and D). Each line can be selectively used as an input or an output. Two inputs to port A can be used as edge-sensing software-maskable interrupt inputs: one senses a rising edge; the other a falling edge. Four different counter modes of operation are programmable:
electrically identical to the standard R6500/1 part, to facilitate prototype system development. An R6500/1 personality module for software and hardware development and in-circuit emulation is available as an option to the System 65 microcomputer development system. Rockwell have also expanded their PPS range to eight models with a new device featuring A/D conversion multiplexed to two input ports. The table shows the complete range.
(Pelco Limited, Enterprise House, 83-85 Western Road, Hove, Sussex BN3 1JB, UK. Telephone: Brighton (0273) 722155)
•
free running with clock cycles counted for real-time reference • free running with output signal toggled by each counter overflow • external event counter • pulse-width measurement mode
ROMs GI Microelectronics have announced availability of two new 32k ROMs, the RO-3-9332B and RO-3-9332C. Both devices have fully static operation and offer 450 ns and 350 ns access times, respectively. (General Instru-
A 16-bit latch automatically reinitializes the counter to a present value. Interrupt on overflow is software maskable. Rockwell provides a 64-pin emulator part, of which 40 pins are
ment Microelectronics Corporation, Regency House, 1-4 Warwick Street, London WIR 5WB, UK. Telephone: 01-439 1891)
Rockwell PPS-4/1 one-chipmicrocomputers Features
MMT5
MM76
MM76C*
MM76E
MM77
MM78
MM76L
MM76EL
ROM (X8)
640
640
640
1024
1344
2048
640
1024
RAM (X4)
48
48
48
48
96
128
48
48
Total I/O lines
22
31
39
31
31
31
31
31
Conditional interrupt
I
2
2
2
2
2
2
2
Parallel input
4
8
8
8
8
8
8
8
Bidirectional parallel
8
8
8
8
8
8
8
8
Discrete
9
l0
I0
I0
I0
I0
I0
10
3
3
3
3
3
3
3
Serial Package (in-line) Power
-
28-pin 42-pin 52-pin dual quad quad
42-pin 42-pin 42-pin 40-pin 40-pin quad q u a d quad dual dual -6.5 V to-11 V -15 V at 70 mW (typical) at 15 mW (typical)
*Two 8-bit or one 16-bit presetable up/down counter
255