Simulation of reverse breakdown in planar P-N junctions

Simulation of reverse breakdown in planar P-N junctions

Solid-State Electronics Vol. 34, No. 9, pp. 983-993, 1991 0038-1101/'91 $3.00+ 0.00 Copyright © 1991 PergamonPress plc Printed in Great Britain.All ...

755KB Sizes 0 Downloads 54 Views

Solid-State Electronics Vol. 34, No. 9, pp. 983-993, 1991

0038-1101/'91 $3.00+ 0.00 Copyright © 1991 PergamonPress plc

Printed in Great Britain.All rights reserved

S I M U L A T I O N OF REVERSE B R E A K D O W N IN PLANAR P-N JUNCTIONS Q. HUANG,G. A. J. AMARATUNGA,E. M. SANKARANARAYANANand W. I. MILNE Department of Engineering, University of Cambridge, Cambridge CB2 1PZ, U.K. (Received 26 October 1990; in revised form 22 February 1991)

Abstrlct--The two-dimensionalnumerical simulator BAMBI has been modified to simulate reverse biased P - N junction characteristics. Complete I-V characteristics of the reverse biased P - N junction is obtained to predict the breakdown voltage rather than the ionization integral. Simulations are then applied to the field limiting ring (FLR) structure and the reduced surface field (RESURF) structure. A quasi-threedimensional approach is used to simulate cylindrically symmetric P - N junctions to model the threedimensional effects due to lateral curvature at corners of mask patterns, A resistive contact to the FLR is used to stabilize the numerical solution of floating FLRs. Simulation results suggest that the breakdown voltage of devices with smaller radii at the rounded corner are much lower as compared to predictions from two-dimensional simulation. In the case of the FLR and RESURF structures, three-dimensional effects play an important role in determining optimal design parameters.

!. INTRODUCTION It is well known that the junction curvature in a planar device severely lowers it breakdown voltage. To accurately predict the breakdown voltage of a planar junction device, numerical methods have to be used because the problem faced is always 2-D or even 3-D in nature. Most simulation of breakdown voltage carried out to date involves first solving the Poisson equation, and the breakdown voltage is then predicted by calculating the ionization integral. This simplification can cause significant error in estimating breakdown voltage especially when floating field limiting rings (FLRs) are used. This is because it is assumed that the current is constant in a one dimensional path for the ionization integral. Recently the current continuity equations and impact ionization have been included to self-consistently simulate the planar P +-N junction[l]. The breakdown voltage is then predicted directly by generated I - V characteristics of the reverse biased junction. Although 2-D simulation provides useful information such as the electric field and the potential distribution in a 2-D cross section of a device, it fails to predict the breakdown which can occur due to 3-D effects such as corner field crowding at mask edges. It has been shown[2, 3] that the lateral curvature at the corner of the masking pattern will cause degradation in the breakdown voltage well below the expected 2-D breakdown. The actual device breakdown voltage is lower than that predicted by the cylindrical approximation and higher than the spherical approximation. In this paper, the 2-D simulator BAMBI[4] has been used extensively for the analysis of the reverse biased P - N junction. Both the current continuity and Poisson equations are solved for electrons

and holes including the impact ionization effect. By self-consistently solving the differential equations, avalanche phenomena associated with breakdown can be observed numerically. When simulating floating planar P - N junctions such as those in field limiting rings (FLRs), a novel method of imposing a current boundary condition with a resistive contact to the FLR is used. Three-dimensional effects are simulated by extending BAMBI to a quasi-3-D simulator which models the lateral curvature caused by the diffusion at the rounded corner in masking patterns, p +-n diodes with and without FLRs as well as a RESURF[5] diode structure are used as examples for the investigating the capability of BAMBI in analysing 2-D and quasi-3-D breakdown voltages. 2. NUMERICALMETHOD 2.1. Impact ionization

When the breakdown behaviour of power devices is to be simulated, it is essential that impact ionization and current continuity conditions are modelled. In this section, a brief description is given of the impact ionization model used in this work. The simulator used solves the three basic semiconductor equations in 2-D space. Generated carriers contribute to device action due to their inclusion in the current continuity equations. Current continuity equations for electrons and holes under steady-state conditions are expressed as: div • Jn = q " ( G n - R~)

(la)

- d i v • Jp = q • (Gp - Rp)

(lb)

where G~ and Gp represent generation rates, Rn and Rp represent recombination rates. The generation rate of

983

Q. HUANGet al.

984

electron-hole pairs due to impact ionization is expressed as: 1 q

G a = - (~.l J.l + ctrl Jrl )

with their formulation in cartesian coordinates, the only differences are two additional terms:

-1 L

(2)

r

where ~. and ~r are the electron and hole ionization coefficients respectively. The expressions for ~. and ~p are:

and 1 -

OU/Or

r

( B, IJ, I ) • , = A , exp - I E • J,I

(3a)

(BplJ,,) c~,=Avexp - I E • J,I

(3b)

The ionization coefficients A,, B,, Ap, Bp are adopted from the experiments of Van Overstraeten and De Man[6]. Because only the electric field parallel to the current flow causes ionization, the electric field IE • J l / l J , I is used rather than IEI. Since the simulated current takes into account impact ionization and hence the generation of carriers, it is possible to self-consistently determine the avalanche process at high electric fields.

2.2. A quasi-three-dimensional approach In some cases the 3-D effects of the lateral curvature in masks have to be taken into account. It has been shown[l] that when the radius of rounded patterning is smaller than 200pm, the breakdown voltage is significantly lower than the one predicted by 2-D simulation. A fully 3-D simulation of such a rounded corner is needed and is expensive in terms of computational resources. As the maximum electric field appears at the rounded portion of the junction, it determines the breakdown voltage. It is therefore appropriate to concentrate the numerical solution on the rounded part of the junction. In order to do so, the device is assumed to by cylindrically symmetric and the basic semiconductor equations are solved in cylindrical coordinates. The basic semiconductor equations contain three differential operators: grad, div and div. grad. Their formulation in cylindrical coordinates contains additional terms compared to cartesian coordinates. The partial derivatives with respect to 0 vanish assuming that the functions are cylindrically symmetric. Therefore 3-D device behaviour can be described by only two coordinates z and r. The left hand side of the current continuity and Poisson equations can be written as: 1 div. J = - Jr + OJr~Or + OJzlOz

(4a)

r

div'grad U = 1 OU/Or + OzU/Or2 + O2U/Oz 2.

(4b)

r

Because the cylindrical domain is actually a result of rotating the 2-D domain (x, y) along the y axis, we have z = y and r = x, so the basic semiconductor equations can still be described by x and y. Compared

in the current continuity equation and Poisson's equation respectively. A 2-D device simulation system can thus be adapted to cylindrical coordinates by inserting the discretized form of these terms. In the "finite boxes" discretization scheme[7], the "div" operator reads after discretization: 2

d i v ' J = Jt+05j '

Arlq"

(

1+

Ar t_ ,'~

Ari-i

2ri

J

-Jt-o.sj Art+Art ~ 1 + OJ=/Oz

(5)

Compared with cartesian coordinates the coefficient of the function values in the r direction are multiplied by the following factors (6a) and (6b): rt - - ri

1+ -

1

2r,

(6a)

and 1

ri + 1 - - ri

2rt

(6b)

Equation (6b) may vanish if r t + l = 3r t and the iteration matrix becomes ill-conditioned. This can be avoided by checking the distances between the grid points. Beyond this the formulation of the system of equations in cylindrical coordinates has no other influence on the solution methods. Therefore, the facilities of the 2-D program such as the automatic grid generation, grid refinement and the flexibility of the device geometry remain unchanged.

2.3. Consideration of the field limiting ring Numerical experiments show that when a floating F L R exists as shown in Fig. 1, the convergence of the simulation program is greatly degraded, normally leading to divergence. This is because the quasi-Fermi potential in the F L R neutral region is unknown and changed with the applied voltage at the main junction. This differs from the main P - N junction where the quasi-Fermi potential in the neutral undepleted part is fixed by the applied voltage. In order to speed up the convergence, the following algorithm is applied. Consider a planar p +-n junction with a single F L R as shown in Fig. 1. There is little difference if we assume that there is a floating ohmic contact at the F L R p + region with variable voltage VvLR applied to it. The key criterion of a floating region like the one in Fig. 1 is that the current flow in or out of the ohmic

Simulation of reverse breakdown

N Substrate

Anode Fig. 1. Planar p +-n junction with a single field limiting ring (FLR). contact must be zero. In other words a current boundary condition has to be implemented. If the VFLR is tOO lOW, then the FLR junction is fully reverse biased along all its junction length which will have net leakage current flowing out as in a reverse biased P - N junction. On the other hand, if VFLRis tOO high, the FLR junction becomes forward biased causing current injection into the device. As the net zero current criterion has to be satisfied, the potential VFLR has to be such that it allows part of the FLR junction to be forward biased and part of it to be reverse biased so there could be a current path through but not in or out of the floating ohmic contact. Because the reverse leakage current is very much smaller than the forward current even when the forward biased voltage is marginally greater than the built in potential of a P - N junction, only a very small part of the FLR junction has to be forward biased. The position of such a point along the FLR junction should therefore be located where the substrate has its lowest potential so that the FLR voltage is equal to that potential minus the built in potential. This guarantees that the rest of the FLR junction is reverse biased. This criterion is a general one applied to the FLR structure working at, before or after punchthrough between the cathode depletion and the FLR or for either sign of surface charge. This criterion must be continuously enforced during iteration. In order to implement this criterion, the FLR contact is connected to a supply voltage via a resistor. The resistance is chosen to be higher than 101°fl and the supply voltage is larger than anode applied voltage so that (1) the FLR junction is never totally reverse biased, and (2) the current into the FLR is very small, typically of the order of 10-8 A. The first constraint is more important than the latter since if the FLR is reverse biased, the error of the simulated FLR voltage can be very large because the leakage current remains very small no matter how strong the reverse bias. However, the second constraint of limit-

985

ing the current into FLR to the level of 10-s A is sufficient to get the FLR potential accurately. This is because any slight increase of the FLR potential leads to rapid increase of FLR current to the order of 10-4A. Another fact which justifies this approximation is that such a resistive circuit represents the case when a very high impedance voltmeter is used to measure the FLR potential. In order to verify this, we have simulated the I - V characteristic of a single FLR located 10/~m away from the main junction, the result is shown in Fig. 2. The applied voltage at the main junction is 50 V (which is sufficient to deplete the region between main junction and FLR). At a voltage lower than 31.75V, the FLR is virtually reverse biased and the leakage current is at a level of 10-1°A flowing out of FLR region. When VFLR is larger than 31.75 V, FLR/substrate junction starts to be forward biased. With an increase of only 2 V in potential, the current increases from 10- ~ A to about 10-4 A. However, if we take the voltage when current equals to 10 -s A as the floated FLR voltage, then VFLR -----32.1 V, the error is only 0.35 V compared with the "ideal" floated voltage (31.75 V) in Fig. 2. The accuracy of this method is significantly better than those previously reported[8] where errors much greater than the built in potential of a P - N junction have been reported when using Adler's method[9]. A numerical algorithm has been implemented which starts with a trial voltage at the FLR contact and then adjusts the FLR potential continuously so that the current into it is larger than zero and less than 10 -8 A. To accurately and quickly adjust this voltage to the final floating value, the conductance gFLR and transconductance gAnodeat the FLR contact are evaluated after each numerical solution. g F L R = O I F L R / O VFL R

(6a)

gAnode ~-- t~IFLR/t~ VAnod e .

(6b)

Then the linear equation of the resistive circuit loop is solved to get the increment for the FLR voltage. Two or three iterations are adequate to reach the final target for FLR current. Finally checks are carried out as to whether new grid points are needed for the final accuracy. The algorithm described here also does 10"4

i



=

;~

,

;~



10"5 10 .6 10"7 10" S1 ,.a

10 " 91 10"1~ J-

10"1i 31

,

~ Vapplied=50V

~,

FLR Potential (V)

Fig. 2. / - V characteristics of a FLR after punchthrough.

Q. HUANGet al.

986

not limit the number of rings that can be simulated. For a multi-ring system, a set of linear equations are solved. Using this kind of algorithm, it is straightforward to generate the VFLR ~ VAnode curve. The coefficient which relates them can be stated as:

A VFLR gAnode (7) A VAnode gFLR Note here that VFLR is the absolute value of FLR voltage with respect to the cathode voltage and Vgnode is the applied voltage to the anode.

3. RESULTS AND DISCUSSION 3.1. p +-n junction Quasi-3-D simulation is used to simulate the breakdown voltage of a p+-n junction with cylindrical symmetry and compared with the result from 2-D simulation. In the case of quasi-3-D simulation, the radius of the lateral curvature in the rounded mask pattern is defined a s R m . The simulated structure has a substrate doping of 10~4cm -3, p ÷ junction depth of 6.0/~m with a Gaussian profile, and a surface concentration of about 1019cm-3. The lateral to vertical junction depth ratio is 0.8. The result of quasi-3-D analysis clearly shows the effect of lateral curvature on the potential distribution. A significant difference in breakdown voltage has been obtained for different radii of the lateral curvature. The breakdown voltage obtained by quasi3-D simulation is lower than that predicted by 2-D simulation where the device is assumed to have an infinite radius of lateral curvature. Figure 3 shows the potential distribution of the p+-n diode with R m= 10/~m and applied reverse voltage of 200V obtained by quasi-3-D simulation while Fig. 4 shows

O.

,

{

,

{

l

'~+ cathode

I

,

the result obtained by 2-D simulation. It is clearly seen in Fig. 3 that the lateral curvature causes much stronger field crowding near the surface in the quasi3-D case which is responsible for the lower breakdown voltage. The reverse I - V characteristics, which are obtained using quasi-3-D simulation with impact ionization taken into account, are shown in Fig. 5 for R m = 10#m and R~ = 3 0 # m respectively. A two dimensional result is also presented in Fig. 5 for comparison. The breakdown voltage is 215V for R m = 10/~m compared with the 340 V predicted by two dimensional simulation. Increasing R m increases the breakdown voltage as the lateral curvature becomes less important and the p+-n junction is better approximated by the 2-D model. For example, for Rm = 30/~m, the breakdown increases by about 50 V compared with R m = 10 tim. By implementing an impact ionization model in a standard simulator such as BAMBI, avalanche breakdown phenomena can also be observed directly from the solution of the classical semiconductor equations. After each accurate solution, the simulator automatically checks as to whether new grid points are needed to meet the current continuity criterion and current change criterion. At lower applied voltage, the impact ionization is so small that it does not introduce any extra grid updates and a stable accurate solution is obtained. At the point of avalanche breakdown, the current change criterion cannot be met and new points are always needed. Because the impact ionization rate is always calculated at the end of each iteration in order to obtain a self-consistent solution, the reverse current at the avalanche breakdown condition increases with each grid update. Figure 6 shows a numerical example for the R m= 10 # m device at an applied voltage of 215 V. The leakage current increases quickly after each grid {

,

{

,

{

,

/18J0 200

10.

~

{

20.

2 /

N substrate

30.

40.

~ j J -

50. o.

'

llo.

'

i 20.

'

{ 30.

'

I 40. X (urn)

'

l 50.

'

{ 60.

'

l 70.

'

so.

Fig. 3. Potential distribution of a p+-n junction at V = 200V, Rm= 10Mm obtained by quasi-3-D simulation.

Simulation of reverse breakdown o./

=

I

I

I

J

I

/

I

t

I

I

I

987

I

I

I,

I

,

I

t 30.j

~'~80

N substrate

/

' t 0 '21,/

J0 '

'40'

I0

'1

0

X (um) Fig. 4. Potential distribution of a p+-n junction at V = 200 V, obtained by 2-D simulation.

update because of the avalanche effect. At a lower voltage, carrier multiplication due to impact ionization is not strong and the leakage current is about 2 x 10-~° A and does not change with introduction of new grid points. At the avalanche voltage of 215 V, final accuracy is never reached simply because of avalanching which makes the numerical assumption of a stable solution invalid.

3.2. Floating field limiting ring structure The quasi-3-D- simulation is also used to simulate a planar junction with a floating field limiting ring (FLR). Previous work[8-11] solved only Poisson's equation in a 2-D area or a quasi three dimensional area[ 12]. It is expected that the lateral curvature at the mask pattern also affects the potential distribution of the planar junction with the FLR (which certainly leads to different optimal design). It is also important 10"

10-8,

~

that inclusion of the current continuity equation gives a more accurate prediction of the breakdown voltage when a FLR exists. We have applied the simulation algorithm described to a p +-n junction with a single FLR structure. The doping and junction depth are the same as those described in the last section except that a floated FLR is located about 10/zm away from the main junction. It is worth noting that this is not an optimal design. It is simply used to test the simulator and the lateral curvature effect as well as the algorithm for FLR regions described before. To show how the lateral curvature effects the potential distribution in FLR devices, the potential distribution at a voltage of 300 V is shown for the FLR structure with and without inclusion of the lateral curvature effect (Fig. 7 by quasi-3-D simulation and R m= 10/~m, Fig. 8 by 2-D simulation). A more dense potential distribution is found when the lateral curvature effect is considered. At this bias potential, the FLR potential is 143.9 V in Fig. 7 and 97.16V in Fig. 8.

" 10"3

~ 10.4 -

10.9'

8

I0.5" •~ 10.6.

10.11

10-1

=

simulation quasi3-D,Rm-30um quasi3-D,Rm=10um i I , I 1O0 200 300 400 Applied Voltage (Y)

Fig. 5. Simulated l - V characteristics of reverse biased p +--n junction. Breakdown voltage is obtained directly from the I-V when current increases quickly.

i

I0.7 '

10"8, 10"0

0

20

30

40

50

Iteration time (arbitrary

60

scale)

70

Fig. 6. Avalanche breakdown phenomena observed in the simulation of a p*-n junction, Va~u~= 215 V.

988

Q. HUANGet al.

I

0.

I

i

i.[

i

[

i

[

)

i

[

i

I

i

I

i

I

~

7 30.

N substrate

40.

,

s0. 0.

I

'

10.

I

'

I

20.

'

I

30.

'

I

40.

'

I

50.

'

I

60.

'

I

70.

'

80.

90.

100.

X (um) Fig. 7. Potential distribution of p+-n junction with single FLR at the voltage of 300 V obtained by quasi-3-D simulation. The FLR potential is 143.9V. lateral part of the main junction. This shows that an optimal design obtained using 2-D simulation is inaccurate, and that the breakdown can occur first at the main junction simply because of the lateral curvature. A closer placing of the FLR is needed in such a case. In our example, the 2-D simulation predicts a breakdown voltage of 520 V compared with 345 V from quasi-3-D simulation. We can also plot the generation-recombination rate at the voltage near breakdown to examine the location of avalanche. Such data is shown in Fig. 10 and Fig. 11 for the above device at the voltage of 320

The most important relationship for FLR structures is that between the FLR potential and the applied voltage. The simulated results of such a FLR structure with R m= 10 #m by quasi-3-D simulation is shown in Fig. 9 together with results from two dimensional simulation. A significant difference emerges when the lateral curvature effect is taken into account. The explanation for a smaller coefficient between FLR potential and applied voltage in the quasi-3-D simulation is that the lateral curvature causes a much slower spreading of the depletion layer towards the FLR and a stronger field crowding at the

0.

i

I

i

I

i

I

i

1

I

1

i

I

i

1

i

I

i

I

i

. P + cathocl..............~ .

20.

S

30.

40. ~275

'

s0 0.

I 10.

'

I 20.

'

I 30.

N substrate

'

I 40.

'

I 50.

J

I 60.

300

'

I 70.

I

' 80.

'

I 90.

' 100.

X (urn) Fig. 8. Potential distribution ofp+-n junction with single FLR at the voltage of 300 V obtained by 2-D simulation. The FLR potential is 97.16 V.

Simulation of reverse breakdown 400 -----t-----a0o.

*

. . . . , tWO dimensional, BV=525V

i

.

quasi*three dimensional, B V ~

/ ~,,m

100

0

i

i 100

i

I. . . . . .

I

200

i

I

i

300

deplri°on-la-yc-r °"*

I

400

,

=

t

500

,

600

Applied Voltage (V)

Fig. 9. Simulated FLR potential as a function of the applied voltage. Two-dimensional simulation gives a coefficient of about 0.76 while quasi-3-D simulation gives coefficient of 0.72. and 500 V respectively. Only the areas within 10/~m of the surface are shown. Figure l0 is obtained by quasi-3-D simulation and Fig. 11 by 2-D simulation. In the 2-D simulation case, the breakdown happens at both the ring/substrate junction and main junction resulting in two peaks at the surface. In the quasi-3-D situation, only one peak appears at the surface of the main junction. The location of generationrecombination peaks suggest that the FLR is quite effective in our example if lateral curvature effects are ignored, and results in a higher breakdown voltage (525 V, cf. to Fig. 9). However, lateral curvature has an important effect on the potential distribution which makes the FLR in our example ineffective. The breakdown voltage is 345 V, about 200 V lower than that predicted by 2-D simulation. Increasing the

989

lateral radius R m will thus increase the breakdown voltage which eventually saturates at the 2-D breakdown voltage. This is shown in Fig. 12 where simulated breakdown voltages against different lateral radii R mare shown. At R m= 130/~m, the breakdown voltage is about 92% of the 2-D breakdown voltage. Also shown in Fig. 12 is the percentage of the FLR potential (referenced to the cathode) over the breakdown voltage which decreases with the increase of the Rm suggesting more effective voltage sharing by the FLR. The simulation time to generate a curve like the one in Fig. 9 takes about 2 hours on a Sun-4 workstation. Convergence is fast and is always reached with less than l0 cycles of Newton iteration. No significant increase in CPU time is needed for quasi-3-D simulation. Numerical experiments showed that using a resistive contact on the FLR is capable of providing reliable and accurate analysis of FLR structures. 3.3. R E S U R F diode structure

In high voltage integrated circuits (HVICs), RESURF[5] is the commonly used method to achieve high breakdown voltage. The principle of a basic RESURF structure, shown in Fig. 13, is to reduce the surface electric field by 2-D electric field shaping through depletion of the n drift region in both the vertical and the lateral directions. For an optimal design it is necessary to control the total charge inside the n drift region when the substrate doping and device geometry are fixed. Previous analyses[13, 14] have been carried out using 2-D simulators assuming the diode has an infinite dimension in the z direction. In practical applications, the RESURF structure is

.7

6 o

p.7 1.5

Fig. 10. Generation-recombination rate of p+-n junction with a single FLR obtained by quasi-3-D simulation. Applied voltage is 320 V.

990

Q. HUANG et al.

.I

r3

1.9 ,d 1.7 1.5

Fig. 11. Generation-recombination rate ofp +-n junction with a single FLR obtained by 2-D simulation. Applied voltage is 500 V. normally realized by having an oval like cathode fully surrounding the anode area resulting in a lateral curvature in the rounded portion of the device. The extension of depletion in this region is therefore actually a 3-D one rather than a 2-D one. We have simulated a basic R E S U R F diode using the quasi-3-D simulation. The simulated structure is assumed to be circular with the n + anode in the center surrounded by the p well/base cathode. The radius of n ÷ anode is 10/am, n drift region thickness and length 10 and 50/~m respectively, and a doping of 1015cm -3 for both the n drift region and the p substrate. The simulated breakdown voltage is 265 V compared to 305 V obtained by 2-D simulation. The lower breakdown voltage is the result of more rapid 600

. . . . .

i

. . . . .

i

. . . . .

500

extension of the depletion layer in the n drift region towards the n + anode due to 3-D charge sharing. This is demonstrated in Figs 14 and 15 where the potential contours obtained by quasi3-D simulation and 2-D simulation are shown at the voltage of 255 V. Faster extension of depletion toward to n+ anode results in electric field crowding near the n ÷ anode and avalanche breakdown occurs there first. The net generation-recombination rates are also plotted in Figs 16 and 17 respectively, one can see that the avalanche in both cases is located at the n ÷ anode. However, the magnitude in

0.5

' 0,4

cathode

;>

....

e

d

>

400

' 0.3

n drift

region

p- substrate

300

. . . . .

~

. . . . .

50

Lateral Radius Rrn

J

. . . . .

100

0.2

150

(urn)

Fig. 12. Simulated breakdown voltage as a function of the lateral radius in a single FLR structure using quasi-3-D simulation.

Fig. 13. Cross section of the basic RESURF diode structure used in the simulation. Rm= 10 pm.

Simulation of reverse breakdown

~, : ~ / ~17.5 " 0 I~. .....~-, . ,-/-,5. (0 - -

0.

10.

991

/

20.

30.

40.

50.

60.

70 .

80.

90.

X (urn) Fig. 14. Simulated RESURF diode potential contours at the applied voltage of 255 V obtained by quasi-3-D simulation. Fig. 16 is about two orders higher than in Fig. 17 at the applied voltage of 255 V. Indeed, Fig. 16 breaks down at a much lower voltage (265 V) compared to 305V for the case shown in Fig. 17. In this particular example, the n drift region doping level should be higher in order to achieve an optimal design (higher breakdown voltage). This is shown in Fig. 18 in which the simulated quasi-3-D breakdown voltage against the increased n drift doping is given when Rm = 10#m. Also shown in Fig. 18, as a comparison, is the simulated breakdown voltage using the traditional ionization integral obtained from MFIELD[15]. A 20% higher breakdown voltage is predicted by MFIELD. The experimental result from a R E S U R F diode with dimensions

corresponding to those in the simulated structures confirms that the approach reported in this work gives a better prediction of the breakdown voltage.

4. CONCLUSION In this paper, the numerical methods used to include impact ionization and 3-D lateral curvature effects in a standard 2-D device simulator such as BAMBI for breakdown voltage analysis of planar junctions are described. Self-consistent solution is obtained by solving Poisson's equation and current continuity equations simultaneously. Use of a cylindrical symmetry approximation allows lateral

0

7.5

/25

N drift region

!2.5

tr-'-"--'-

17.5

,0--,--t-"

22.5

P substrate

27.5, 32.5 0.

10.

20.

30.

40.

50.

60.

70.

80.

90.

X (um) Fig. 15. Simulated RESURF diode potential contours at the applied voltage of 255 V obtained by 2-D simulation.

992

Q. HUANG et al.

.5

6 O

~.1~

~"

Fig. 16. Generation-recombination rate of the RESURF diode at the applied voltage of 255 V obtained by quasi-3-D simulation. This device breaks down at 265 V. curvature effects of planar junctions to be taken into account without losing the simplicity and automatic grid generation capability of a 2-D simulator. N o additional C P U time is needed for quasi-3-D simulation. A simple and efficient algorithm is adopted to simulate planar junctions with FLRs. Numerical experiments show that using such a resistive contact on the F L R is capable

of providing reliable and accurate analysis of F L R structures. Breakdown voltage for a p +-n diode without an F L R and with an F L R are used to illustrate the simulation capability. The I - V curve is directly generated and used to predict breakdown voltage. Much lower breakdown voltage predictions are obtained when lateral curvature effects are taken

6 O

Fig. 17. Generation-recombination rate of the RESURF diode at the applied voltage of 255 V obtained by 2-D simulation. This device breaks down at 305 V.

Simulation of reverse breakdown

993 REFERENCES

work

ee

250

. . . . .

' . . . . . 1.0

,I

quasi 3-D,MFIELD[16]



experiment

' . . . . . 1.1

'

. . . . .

1.2 N drift region dose (1012/era 2)

' . . . . . 1.3

1.4

Fig. 18. Simulated quasi-3-D breakdown voltage in the RESURF structure as a function of the drift region doping when Rm= 10#m. Simulated results obtained using the ionization integral and an experimental result are also shown for comparison.

into account by quasi-3-D simulation. Potential distributions obtained for F L R structures can be quite different depending on whether quasi-3-D or 2-D simulation is used. This is further demontrated in the application to a R E S U R F diode. Quasi3-D simulation provides a more realistic view of the actual device and is therefore useful to accurately design devices with F L R structures and R E S U R F diodes. Numerical experiments also show that the simulation time required is within the capabilities of a workstation based computation environment.

1. A. Yabutat, C. G. Hwang, M. Suzumura and R. W. Dutton, IEEE Trans. Electron Devices E!~37, 1132 (1990). 2. C. Basavanagoud and K. N. Bhat, IEEE Electron Device Lett. EDL..6, 276 (1985). 3. J. Ueda and N. Taksuka, Solid-St. Electron. 28, 1245 (1985). 4. B A M B I Vet 1.2 Users' Guide. Technical University, Vienna (1985). 5. J. A. Appels and H. M. J. Vaes, IEDM Teeh. Dig., 238 (1979). 6. R. Van Overstraeten and H. De. Man, Solid-St. Electron. 13, 503 (1970). 7. G. A. Franz, A. F. Franz, S. Selberherr and P. Markowich, NASECODE HI, 122 (1983). 8. M. S. Adler, V. A. K. Temple, A. P. Ferro and R. C. Rustay, 1EEE Trans. Electron Devices ED-24, 107 (1977). 9. K. R. Whight and D. J. Coe, Solid-St. Electron. 27, 1021 (1984). 10. S. Yasuda and T. Yonezawa, Solid-St. Electron. 25, 423 (1982). 11. K. P. Brieger, W. Gerlach and J. Pelka, Solid-St. Electron. 26, 739 (1983). 12. K. R. Whight, D. J. Coe, R. J. Tree and A. J. Veveris, NASECODE IlI, 299 (1983). 13. G. Charitat, A. Nezar and P. Ross¢l, Proe. Syrup. High Voltage and Smart Power ICs, p. I1, Electrochemical Society (1989). 14. Z. Parpia and C. A. T. Salama, Proc. Syrup. High Voltage and Smart Power lCs, p. 23, Electrochemical Society (1989). 15. MFIELD User Manual, Rockfield Software (1989). 16. M. R. Pinto, C. S. Rafferty and R. W. Dutton, Standford Electronic Laboratory Technical Report, Standford (1984).