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Study on thermal and optical properties of high power infrared emitter by utilizing dual interface method
International Journal of Heat and Mass Transfer 58 (2013) 578–584
Contents lists available at SciVerse ScienceDirect
International Journal of Heat and Mass Transfer journal homepage: www.elsevier.com/locate/ijhmt
Study on thermal and optical properties of high power infrared emitter by utilizing dual interface method Chin Peng Ching ⇑, Mutharasu Devarajan Nano Optoelectronics Research Laboratory (NOR Lab), School of Physics, Universiti Sains Malaysia, 11800 USM, Pulau Pinang, Malaysia
a r t i c l e
i n f o
Article history: Received 5 May 2012 Accepted 21 November 2012
Keywords: Dual interface method Thermal transient measurement Real junction-to-board thermal resistance Thermal interface material Structure function High power infrared emitter
a b s t r a c t This paper signifies the importance of dual interface method in the determination of real junctionto-board thermal resistance, RthJB for high power infrared (IR) emitter. Thermal transient measurement and optical test are performed to investigate thermal and optical properties of the IR emitter. In order to identify the exact point of separation between the IR package and cold-plate, dual interface method has been utilized by comparing the structure functions obtained from two thermal transient measurements with different thermal interface layers between the metal-core-printed-circuit-board (MCPCB) and cold-plate. It is found that the real junction-to-board thermal resistance, RthJB which is the separation point obtained from the structure functions with optical power consideration is 10.15 ± 0.05 K/W. In addition, comparison between the IR emitter with different types of die attach (solder and epoxy glue) has also been studied by employing dual interface method to obtain the junction-to-chip thermal resistance RthJP of 3.79 ± 0.05 K/W. Ó 2012 Elsevier Ltd. All rights reserved.
1. Introduction Light-emitting diodes (LEDs) are highly efficient electronicto-photonic devices that emit light via injection electroluminescence [1]. High power LEDs keep attracting researchers’ interests and attention due to their significant impacts on illumination industry and increasing market [2]. Performance of LEDs in optical power and efficiency has been increasingly improved due to the extending knowledge in LEDs’ characteristics [3,4]. Nowadays, technology of LEDs has caused revolution in lighting systems by virtue of their power saving, environmental friendly, high brightness, efficiency and reliability [5,6]. LEDs that emit infrared are commonly known as infrared LEDs or infrared emitter. Early in the 20th century, remote control with the use of infrared LEDs was one of the most important inventions for operator convenience as infrared region represented a more effective method to control remotely performed operations [7]. Recently, IR emitter has been used extensively in many applications such as infrared illumination for CCTV, camera, machine systems and also as remote control for consumer products. Thermal management of solid state devices is of great concern nowadays especially for high power LEDs and IR emitters that involve large amount of power dissipation, as poor thermal management will cause excessive rise in junction temperature that will reduce the reliability performance and lifespan, and subsequently ⇑ Corresponding author. E-mail address: [email protected] (C.P. Ching). 0017-9310/$ - see front matter Ó 2012 Elsevier Ltd. All rights reserved. http://dx.doi.org/10.1016/j.ijheatmasstransfer.2012.11.067
cause breakdown of these devices [8]. Thus, low junction temperature operation is desirable to prevent these devices from overheating, and hence to achieve optimal performance and reliability [9]. Conventionally, thermocouple method that requires the measurement of junction temperature, case temperature and power dissipation has been used to measure the junction-to-case thermal resistance, RthJC. However, reproducibility of this method is low since the measured temperature depends on the exact position of thermocouple [10]. Several new approaches have been made to investigate an accurate and repeatable measurement for junction-to-case thermal resistance of high power semiconductor devices [11,12]. Recently, transient dual interface measurement with different interface materials between the package and a heat-sink that identifies RthJC in the structure functions of a heat flow path has been proposed [13–15]. In this paper, thermal and optical properties of the high power IR emitter with different thermal interface materials are studied. Dual interface method that based on the comparison of structure functions obtained by two thermal transient measurements with different thermal interface layers between the IR package and cold-plate has been utilized to identify the real junction-to-board thermal resistance, RthJB. One of the thermal transient measurements is performed with a thin layer of thermal paste and the other measurement with a thin layer of thermal tape placed in between the MCPCB and cold-plate. Besides, we also vary the die attach materials of the IR emitter (one with solder layer as die attach and the other with epoxy glue) to determine the junction-to-chip
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thermal resistance, RthJP. Furthermore, optical test has been carried out and optical power obtained through the optical test is used to correct the power dissipation for the computation of Zth-curve and structure functions to obtain accurate values of real thermal resistance. 2. Theoretical background 2.1. Thermal transient measurement Thermal transient measurement has a long history in investigating the thermal properties of solid-state device packages and has been recognized as an excellent non-destructive investigation method to detect heat conduction anomalies of chip assemblies [16]. It is also a method of recording the thermal step response functions of a structure for step function excitation, which is highly characteristic that temperature changes in an extremely wide time range [17]. Hence, thermal transient response functions such as cooling curve are usually plotted on logarithmic time axis [18]. RC network consists of two forms, which are Foster network with chain model and Cauer network with ladder model as shown in Fig. 1(a) and (b), respectively [19]. In order to identify a heatflow path, transformation of the Foster network into Cauer equivalent is necessary as ladder model is more suitable to be used to investigate the thermal properties of a system. At a large number of RC stages, it is convenient to use a graphic representation and structure function, where cumulative thermal capacitance CR is plotted as a function of the cumulative thermal resistance RR as illustrated in Fig. 2 [20]. Structure functions, which are the thermal resistance and capacitance map of a heat flow path, can be used to study the material transitions in the heat flow path and also the changes in cross sectional area of the heat flow [21]. Usually, horizontal axis of a structure function refers to thermal resistance values and vertical axis denotes thermal capacitances of a sample. Cumulative structure function which was first introduced in [22] is defined as the sum of the thermal capacitance CR with respect to the sum of the thermal resistance RR measured from excitation point towards the ambient. In a cumulative structure function, plateau commonly represents insulator materials with high thermal resistance value but lower thermal capacitance, whereas region with steeply slope indicates more conductive materials. Differential structure function is defined as the derivative of the cumulative thermal capacitance with respect to the cumulative thermal resistance [23] as following equation,
Fig. 2. Example of cumulative structure function and graphic representation of thermal RC equivalent of a system [22].
KðRe Þ ¼
Substituting
KðRe Þ ¼
ð1Þ dC e dx
¼ cA and
dRe dx
1 ¼ kA into Eq. (1),
cAdx ; ðdx=kAÞ
KðRe Þ ¼ ckA2 ;
ð2Þ
where c is volumetric heat capacitance, k is thermal conductivity and A is cross-sectional area of the heat flow path. For differential structure function, each peak indicates that heat flow is entering a new layer of material and thermal resistance values can be determined from the distance on the horizontal axis. Peaks in the differential structure function are commonly pointing to the middle of a region. 2.2. Junction-to-board thermal resistance, RthJB Thermal resistance of LED packages together with maximum operation temperature determines the maximum thermal power of a package that can be dissipated [24]. Hence, thermal management of LEDs is of great interest especially for high power LEDs that involve large amount of power dissipation. Common definition for thermal resistance, Rth is the rate of temperature increase for the input power supplied. It is also a measure of capability to dissipate heat. According to JEDEC standard [25], junction-to-board thermal resistance RthJB is defined as the thermal resistance from the operating portion of a semiconductor device to outside surface of a package closet to the chip mounting area where the same surface is properly heat sunk to minimize temperature variation across that surface.
RthJB ¼
Fig. 1. (a) Foster network and (b) Cauer network [19].
dC e : dRe
TJ TB ; Ph
ð3Þ
where TJ is junction temperature, TB is board temperature and Ph is power dissipated. In reality, once electrical power is applied, optical power will be emitted as light source and heat will be dissipated [26]. In order to obtain real thermal resistance values, real thermal resistance equation that takes into consideration of optical power emitted and
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heat dissipated should be involved since electrical thermal resistance considers only power supplied.
Electrical thermal resistance; RthE ¼
Real thermal resistance; RthR ¼
DT : P el
DT : Ph
ð4Þ
paste as interface material. The IR emitter was then driven by forward current of 1.0 A at an ambient temperature of 25.0 ± 1.0 °C maintained by using cold-plate. In order to obtain cooling curve, the IR emitter has been heated for 5–10 min to reach thermal equilibrium with ambient temperature environment and allowed to cool down.
ð5Þ 3.2. Optical test
with P h ¼ P el P op , Eq. (5) becomes,
RthR ¼
DT ; Pel Pop
ð6Þ
where Pel is input power, Pop is optical power and DT is temperature difference between junction and board in this case [27]. 3. Experimental work For thermal characterization, calibration and dual interface method have been performed on a commercial high power IR emitter with different types of thermal interface layer between the IR package and cold-plate. In addition, optical test has been carried out to obtain real thermal resistance values. Calibration was carried out by using Thermal Transient Tester (T3Ster) machine and ambient temperature was varied from 25 to 85 °C with a spacing of 15 °C by using cold-plate. Sensor current of 1.0 mA was then applied to the IR emitter at each temperature. Small value of sensor current was used to eliminate self heating effect. Once the IR emitter reached thermal equilibrium with the ambient temperature environment, forward voltage at each temperature was measured to obtain K-factor.
The IR emitter went through optical test to obtain optical power value. Optical test was carried out in an integrating sphere at constant current of 1.0 A and ambient temperature of 25.0 ± 1.0 °C. Optical power obtained was used to correct the power dissipation for the computation of Zth-curve and structure functions by using T3Ster evaluation software. The methodology was repeated for the IR emitter with thermal tape as thermal interface layer between the IR package and cold-plate. The junction-to-board thermal resistance was identified from the point of separation in the structure functions obtained by measurements with different thermal interface layers between the MCPCB and cold-plate. 4. Results and discussions 4.1. Determination of K-factor Fig. 4 shows a graph of forward voltage versus ambient temperature obtained in calibration. Temperature sensitive
3.1. Dual interface method Transient dual interface measurement is now a new JEDEC standard for power semiconductor devices with heat flow through a single dominant path [28]. In dual interface method, two thermal transient measurements of a same IR emitter were required. Each measurement was performed with a different thermal interface layer between the IR package and cold-plate as shown in Fig. 3, causing both of the structure functions to separate at a point in between the MCPCB and cold-plate. In this study, one of the thermal transient measurements was performed with a thin layer of thermal paste as the thermal interface layer between the IR package and cold-plate while another measurement was carried out with a thin layer of thermal tape. Thermal transient measurement that based on the evaluation of structure functions was performed by connecting the IR emitter to the T3Ster machine and placed on the cold-plate with thermal
Fig. 3. Schematic diagram of the IR package placed on the cold-plate.
Fig. 4. Forward voltage versus ambient temperature.
Fig. 5. Temperature distribution of the IR emitter using thermal imaging camera.
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Fig. 6. Cumulative structure function of a complete heat flow path for the IR emitter.
parameter, K-factor which was the slope of the forward voltage versus ambient temperature was obtained from the following equation:
K¼
Vf1 Vf2 ; T a1 T a2
ð7Þ
where K is K-factor, Vf1 is forward voltage at ambient temperature Ta1 and Vf2 is forward voltage at temperature Ta2. K-factor of 1.71 mV/°C has been obtained from the slope of the graph. This value denoted that an increase of 1 °C in ambient temperature would cause a forward voltage drop of 1.71 mV. Such phenomenon is the concept used in forward voltage drop method for junction temperature determination. 4.2. Dual interface method: junction-to-board thermal resistance, RthJB In general, the heat generated in the junction will first be conducted from chip to metal slug followed by MCPCB and finally towards the ambient via convection. This is the case of a nearly perfect one-dimensional heat flow. Although, there is heat loss through the surrounding of lead frame and lens, this loss is reported to be insignificant as the thermal conductivity of the materials is very small [29]. Fig. 5 displays the temperature distribution of the IR emitter placed on a heat sink, captured by using thermal imaging camera at forward current of 1.0 A and ambient temperature of around 25 °C. Temperature distribution is clearly represented by the color indicator1 ranging from deep blue (25 °C) to pink (50 °C). From the figure, it is obvious that the heat is spreading in one-dimensional direction from the chip (red color) towards the MCPCB (reddish) and external heat sink (yellowish). Cumulative and differential structure functions have been extensively used for identification of different regions in a heat 1 For interpretation of color in Fig. 5, the reader is referred to the web version of this article.
flow path of a sample. Fig. 6 illustrates a cumulative structure function for the IR emitter, it is a complete heat-flow path of the package driven at 1.0 A at an ambient temperature of 25 °C under still air condition. Since heat is flowing in a nearly perfect one-dimensional direction, heat generated at the junction will spread towards the board of the package then dissipate to ambient via convection. In Fig. 6, the left-hand side of the structure function refers to the junction in a chip whereas the right-hand side denotes the ambience. Region I represents partial thermal resistance from junction to chip, RthJP while Region II indicates the partial thermal resistance from junction to board, RthJB of the IR emitter. In this study, junction-to-chip thermal resistance, RthJP is determined by comparing the structure functions of the IR emitter with different types of die attach materials. Correspondingly, junction-to-board thermal resistance, RthJB is obtained from the exact point of separation between the MCPCB and cold-plate by utilizing dual interface method. At the point right after the Region I, heat starts to enter the die attach layer after dissipating from the junction in the chip. Then, heat will flow through the metal slug, MCPCB, thermal interface layer and finally towards the ambient. Region III denotes partial thermal resistance from junction to ambient, RthJA or simply known as total thermal resistance. Sample with different thermal interface materials will have different values of thermal resistance for the interface layer. The real junction-to-board thermal resistance, RthJB which is the point of separation in the structure functions obtained by two thermal transient measurements with different thermal interface layers, could be accurately determined by utilizing dual interface method with optical power consideration [30]. Fig. 7 demonstrates cumulative structure functions corrected with optical power for the determination of real junction-to-board thermal resistance, RthJB by utilizing dual interface method for the IR emitter with thermal paste and thermal tape as thermal interface layers. Measurements have been performed at an input current of 1.0 A and ambient temperature of 25.0 °C maintained by using cold-plate.
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C.P. Ching, M. Devarajan / International Journal of Heat and Mass Transfer 58 (2013) 578–584 T3Ster Master: cumulative structure function(s) 10.1468 unit 1_solder_paste_1.0A_25C_optical power correction_part2 - Ch. 0
RthJA (thermal paste)
unit 1_solder_tape_1.0A_25C_optical power correction_part2 - Ch. 0 10000
RthJA (thermal tape) 100
Cth [Ws/K]
Junction-to-board thermal resistance, RthJB = 10.15 K/W 1
0.01
Point of Separation
1e-4
0
2
4
6
8
10
12
14
16
Rth [K/W]
Fig. 7. Real junction-to-board thermal resistance, RthJB determination by utilizing dual interface method with optical power consideration.
Table 1 Comparison of real and electrical junction-to-board thermal resistance, RthJB. Thermal resistance
Real value with optical power consideration (K/W)
Electrical value without optical power consideration (K/W)
Junction-to-board thermal resistance, RthJB
10.15
5.60
As observed in Fig. 7, both of the structure functions run in parallel started at the origin and begin to diverge beyond the separation point, 10.15 ± 0.05 K/W. This indicates that spreading of heat from junction towards the board of the IR package is analogous for both of the measurements. However, divergence occurs once the heat is flowing from the board of the IR package towards the thermal interface layer. Hence, the real junction-to-board thermal resistance, RthJB of the high power IR emitter is 10.15 ± 0.05 K/W. By considering optical power in the measurement as indicated in Eq. (6), the junctionto-board thermal resistance obtained through the structure functions above is a real thermal resistance value. According to Eqs. (4) and (6), when optical power is taken into consideration, real thermal resistance value obtained would be higher than the electrical thermal resistance. Correspondingly, neglecting optical power in the measurement will yield a much lower electrical thermal resistance value. The comparison of real and electrical junction-to-board thermal resistance, RthJB values are tabulated in Table 1. From the table, the electrical junction-to-board thermal resistance, RthJB obtained is 44.8% lower than its real value when optical power is not taken into consideration. This shows that it is necessary to include optical power for the computation of structure functions to obtain accurate thermal resistance values [31].
Since about 30–40% of the input power will leave the system as light for IR emitter [32], neglecting optical power in thermal resistance determination will yield a value which is much lower than the reality. In addition, it is found that junction-to-ambient thermal resistance RthJA for the measurement with thermal paste and thermal tape is 12.46 ± 0.05 and 15.75 ± 0.05 K/W, respectively. The IR emitter with thermal paste as thermal interface layer requires less total thermal resistance for heat to flow through the IR package to reach cold-plate. While the IR emitter with the use of thermal tape needs more thermal resistance for heat to dissipate to the ambient. This is because of the thermal conductivity value for thermal paste, 0.90 W/mK [33] is higher than the thermal conductivity of thermal tape, 0.16 W/mK [34]. Since, thermal conductivity is inversely proportional to thermal resistance. Thus, the total thermal resistance achieved for higher thermal conductivity of thermal paste is lower compared to thermal tape. Besides, the variation in total thermal resistance might also be due to surface contact problem between the IR package and coldplate. Since, the surface of MCPCB and cold-plate are not perfectly smooth. Thermal paste which is a grease or semi-liquid material could effectively fill up the air gaps between the surface of the board and cold-plate results in good surface contact. However, thermal tape which is a solid material would cause the existence of air gaps between the surface of the board and cold-plate. In case of using the thermal paste as thermal interface layer, good surface contact between the IR package and cold-plate will result in less total thermal resistance. Therefore, heat is able to dissipate from the package more easily for IR emitter with thermal paste as thermal interface layer compared to that with the use of thermal tape.
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T3Ster Master: cumulative structure function(s) 3.79061
1.01805
1.53791
unit 4_glue_paste_1.0A_25C_optical power correction_part2 - Ch. 0 unit 4_glue_tape_1.0A_25C_optical power correction_part2 - Ch. 0 unit 1_solder_paste_1.0A_25C_optical power correction_part2 - Ch. 0 unit 1_solder_tape_1.0A_25C_optical power correction_part2 - Ch. 0
10000
100
Cth [Ws/K]
Junction-to-chip thermal resistance, RthJP = 3.79 K/W 1
Rth solder
0.01
Rth epoxy glue
1e-4
0
2
4
6
8
10
12
14
16
18
Rth [K/W] Fig. 8. Comparison of the IR emitter with different types of die attach.
4.3. Dual interface method: junction-to-chip thermal resistance, RthJP Fig. 8 illustrates the comparison of the IR emitter with different types of die attach, solder and epoxy glue recorded at constant current of 1.0 A and ambient temperature of 25.0 °C. As found in the figure, real junction-to-chip thermal resistance RthJP obtained from the structure functions with optical power consideration is 3.79 ± 0.05 K/W. Beyond this value, divergence occurs as heat is spreading through the die attach layer towards metal slug and MCPCB of the IR package. Furthermore, thermal resistance of solder and epoxy glue is 1.02 ± 0.05 and 2.56 ± 0.05 K/W, respectively. It is observed that heat is able to reach metal slug with less thermal resistance for the IR emitter with solder as die attach compared to that using epoxy glue. For the IR emitter with solder as die attach, a lower thermal resistance has been achieved due to the material property of the solder paste. Solder which is a highly thermal conductive compound has a better heat spreading effect compared to the epoxy glue. Besides, it is a fact that thermal conductivity of solder, 60 W/mK [35] is much higher than that of epoxy glue, 4.5 W/mK [36]. Hence, using solder as die attach could effectively conduct the heat that is spreading from the junction towards the metal slug, results in less thermal resistance compared to epoxy glue as the die attach. For most of the LEDs, when input current is applied to a sample, only a small portion of input power will be emitted as optical power and most of the input power will be dissipated as heat through the junction. In addition, larger the thermal resistance value, lesser the capability of the sample to dissipate heat to the surrounding. Since poor thermal management will cause excessive rise in junction temperature that will influence and reduce the reliability performance and lifespan, and subsequently cause breakdown of these devices. Therefore, thermal management of solid
state devices such as LEDs and infrared emitter is becoming more crucial now in order to achieve expected reliability and performance especially for high power solid state devices that involve large amount of power dissipation. 5. Summary and conclusion In this study, dual interface method that based on the comparison of structure functions obtained by two thermal transient measurements with different thermal interface layer between the IR package and cold-plate has been utilized to identify the real junction-to-board thermal resistance, RthJB. It was found that the real junction-to-board thermal resistance, RthJB which was the exact point of separation obtained from the structure functions with optical power consideration was 10.15 ± 0.05 K/W. When optical power was not taken into consideration, the electrical junctionto-board thermal resistance, RthJB obtained was 44.8% lower than its real value. Hence, it was necessary to include optical power for the computation of structure functions to obtain accurate thermal resistance values. In addition, junction-to-ambient thermal resistance RthJA for the measurement with thermal paste and thermal tape as the thermal interface layer between the MCPCB and cold-plate was 12.46 ± 0.05 and 15.75 ± 0.05 K/W, respectively. The total thermal resistance achieved for higher thermal conductivity of thermal paste was lower compared to thermal tape. Thus, heat was able to dissipate from the package more easily for IR emitter with thermal paste as thermal interface layer between the IR package and cold-plate compared to that with the use of thermal tape. Furthermore, comparison of the IR emitter with different types of die attach, solder and epoxy glue has also been investigated. The real junction-to-chip thermal resistance RthJP obtained from the structure functions with optical power consideration was
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3.79 ± 0.05 K/W. Besides, it was observed that thermal resistance of solder and epoxy glue was 1.02 ± 0.05 and 2.56 ± 0.05 K/W, respectively. Therefore, it has been proved that using solder as die attach could effectively conduct the heat that was spreading from the junction towards the metal slug, resulted in less thermal resistance compared to epoxy glue as solder was a highly thermal conductive compound. Acknowledgements Ching gratefully acknowledges Institute of Postgraduate Studies (IPS) of Universiti Sains Malaysia for the financial support of USM Fellowship. This work was also supported by PRGS Grant No. 1001/PFIZIK/834073. References [1] Bahaa E.A. Saleh, Malvin Carl Teich, Fundamentals of Photonics, second ed., John Wiley & Sons, Inc., New York, 2007. [2] Lianqiao Yang, Jianzheng Hu, Moo Whan Shin, Degradation of high power LEDs at dynamic working conditions, Solid-State Electronics 53 (2009) 567–570. [3] Yukio Narukawa, Masahiko Sano, Masatsugu Ichikawa, Shunsuke Minato, Takahiko Sakamoto, Takao Yamada, Takashi Mukai, Improvement of luminous efficiency in white light emitting diodes by reducing a forward-bias voltage, Jpn. J. Appl. Phys. 46 (2007) L963–L965. [4] Lianqiao Yang, Jianzheng Hu, Sunho Jang, Moo Whan Shin, Thermal design of ceramic packages for high power light-emitting diodes, Semicond. Sci. Technol. 22 (2007) 705–708. [5] Ting Cheng, Xiaobing Luo, Suyi Huang, Sheng Liu, Thermal analysis and optimization of multiple LED packaging based on a general analytical solution, Int. J. Therm. Sci. 49 (2010) 196–201. [6] Jianzheng Hu, Lianqiao Yang, Moo Whan Shin, Electrical, optical and thermal degradation of high power GaN/InGaN light-emitting diodes, J. Phys. D Appl. Phys. 41 (2008) 035107. [7] Gilbert Held, Introduction to Light Emitting Diode Technology and Applications, Taylor & Francis Group, New York, 2009. [8] Chun-Jen Weng, Advanced thermal enhancement and management of LED packages, Int. Commun. Heat Mass Transfer 36 (2009) 245–248. [9] Mitsuo Fukuda, Optical Semiconductor Devices, John Wiley & Sons, Inc., New York, 1999. [10] D. Schweitzer, H. Pape, R. Kutscherauer, M. Walder, Semiconductor Thermal Measurement and Management Symposium, 2009. 25th IEEE SEMI-THERM, 2009, pp. 172–179. [11] B. Siegal, An alternative approach to junction-to-case thermal resistance measurements, Electronics Cooling 7 (2001) 52–57. [12] O. Steffens, P. Szabo, M. Lenz, G. Farkas, Semiconductor Thermal Measurement and Management Symposium, 2005. 21st IEEE SEMI-THERM, 2005, pp. 313– 321.
[13] D. Schweitzer, H. Pape, Liu Chen, Semiconductor Thermal Measurement and Management Symposium, 2008. 24th IEEE SEMI-THERM, 2008, pp. 191–197. [14] D. Schweitzer, Semiconductor Thermal Measurement and Management Symposium, 2010. 26th IEEE SEMI-THERM, 2010, pp. 151–156. [15] D. Schweitzer, H. Pape, Liu Chen, R. Kutscherauer, M. Walder, Semiconductor Thermal Measurement and Management Symposium, 2011. 27th IEEE SEMITHERM, 2011, pp. 222–229. [16] V. Székely, A new evaluation method of thermal transient measurement results, Microelectron. J. 28 (1997) 277–292. [17] V. Székely, M. Rencz, B. Courtois, A step forward in the transient thermal characterization of chips and packages, Microelectron. Reliab. 39 (1999) 89– 96. [18] V. Székely, Enhancing reliability with thermal transient testing, Microelectron. Reliab. 42 (2002) 629–640. [19] N.Y.A. Shammas, M.P. Rodriguez, F. Masana, A simple method for evaluating the transient thermal response of semiconductor devices, Microelectron. Reliab. 42 (2002) 109–117. [20] P. Szabo, O. Steffens, M. Lenz, G. Farkas, Transient Junction-to-Case Thermal Resistance Measurement Methodology of High Accuracy and High Repeatability, IEEE Trans. Compon. Packag. Technol. 28 (2005) 630–636. [21] M. Rencz, V. Szekely, A. Morelli, C. Villa, Semiconductor Thermal Measurement and Management, 2002. 18th IEEE SEMI-THERM, 2002, pp. 15–20. [22] E.N. Protonotarios, O. Wing, Theory of Nonuniform RC Lines, Part II: Analytic Properties in the Time Domain, IEEE Trans. Circuit Theory 14 (1967) 13–20. [23] M.R. Rencz, V. Szekely, Measuring Partial Thermal Resistances in a Heat-Flow Path, IEEE Trans. Compon. Packag. Technol. 25 (2002) 547–553. [24] E. Fred Schubert, Light-Emitting Diodes, second ed., Cambridge University Press, New York, 2006. [25] EIA/JEDEC Standard No. 51-1. [26] Lan. Kim, Moo Whan Shin, Thermal Resistance Measurement of LED Package with Multichips, IEEE Trans. Compon. Packag. Technol. 30 (2007) 632–636. [27] Lianqiao Yang, Hu Jianzheng, Lan Kim, Moo Whan Shin, Variation of thermal resistance with input power in LEDs, Phys. Stat. Solid 3 (2006) 2187–2190. [28]. [34] . [35] .
Contents lists available at SciVerse ScienceDirect
International Journal of Heat and Mass Transfer journal homepage: www.elsevier.com/locate/ijhmt
Study on thermal and optical properties of high power infrared emitter by utilizing dual interface method Chin Peng Ching ⇑, Mutharasu Devarajan Nano Optoelectronics Research Laboratory (NOR Lab), School of Physics, Universiti Sains Malaysia, 11800 USM, Pulau Pinang, Malaysia
a r t i c l e
i n f o
Article history: Received 5 May 2012 Accepted 21 November 2012
Keywords: Dual interface method Thermal transient measurement Real junction-to-board thermal resistance Thermal interface material Structure function High power infrared emitter
a b s t r a c t This paper signifies the importance of dual interface method in the determination of real junctionto-board thermal resistance, RthJB for high power infrared (IR) emitter. Thermal transient measurement and optical test are performed to investigate thermal and optical properties of the IR emitter. In order to identify the exact point of separation between the IR package and cold-plate, dual interface method has been utilized by comparing the structure functions obtained from two thermal transient measurements with different thermal interface layers between the metal-core-printed-circuit-board (MCPCB) and cold-plate. It is found that the real junction-to-board thermal resistance, RthJB which is the separation point obtained from the structure functions with optical power consideration is 10.15 ± 0.05 K/W. In addition, comparison between the IR emitter with different types of die attach (solder and epoxy glue) has also been studied by employing dual interface method to obtain the junction-to-chip thermal resistance RthJP of 3.79 ± 0.05 K/W. Ó 2012 Elsevier Ltd. All rights reserved.
1. Introduction Light-emitting diodes (LEDs) are highly efficient electronicto-photonic devices that emit light via injection electroluminescence [1]. High power LEDs keep attracting researchers’ interests and attention due to their significant impacts on illumination industry and increasing market [2]. Performance of LEDs in optical power and efficiency has been increasingly improved due to the extending knowledge in LEDs’ characteristics [3,4]. Nowadays, technology of LEDs has caused revolution in lighting systems by virtue of their power saving, environmental friendly, high brightness, efficiency and reliability [5,6]. LEDs that emit infrared are commonly known as infrared LEDs or infrared emitter. Early in the 20th century, remote control with the use of infrared LEDs was one of the most important inventions for operator convenience as infrared region represented a more effective method to control remotely performed operations [7]. Recently, IR emitter has been used extensively in many applications such as infrared illumination for CCTV, camera, machine systems and also as remote control for consumer products. Thermal management of solid state devices is of great concern nowadays especially for high power LEDs and IR emitters that involve large amount of power dissipation, as poor thermal management will cause excessive rise in junction temperature that will reduce the reliability performance and lifespan, and subsequently ⇑ Corresponding author. E-mail address: [email protected] (C.P. Ching). 0017-9310/$ - see front matter Ó 2012 Elsevier Ltd. All rights reserved. http://dx.doi.org/10.1016/j.ijheatmasstransfer.2012.11.067
cause breakdown of these devices [8]. Thus, low junction temperature operation is desirable to prevent these devices from overheating, and hence to achieve optimal performance and reliability [9]. Conventionally, thermocouple method that requires the measurement of junction temperature, case temperature and power dissipation has been used to measure the junction-to-case thermal resistance, RthJC. However, reproducibility of this method is low since the measured temperature depends on the exact position of thermocouple [10]. Several new approaches have been made to investigate an accurate and repeatable measurement for junction-to-case thermal resistance of high power semiconductor devices [11,12]. Recently, transient dual interface measurement with different interface materials between the package and a heat-sink that identifies RthJC in the structure functions of a heat flow path has been proposed [13–15]. In this paper, thermal and optical properties of the high power IR emitter with different thermal interface materials are studied. Dual interface method that based on the comparison of structure functions obtained by two thermal transient measurements with different thermal interface layers between the IR package and cold-plate has been utilized to identify the real junction-to-board thermal resistance, RthJB. One of the thermal transient measurements is performed with a thin layer of thermal paste and the other measurement with a thin layer of thermal tape placed in between the MCPCB and cold-plate. Besides, we also vary the die attach materials of the IR emitter (one with solder layer as die attach and the other with epoxy glue) to determine the junction-to-chip
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thermal resistance, RthJP. Furthermore, optical test has been carried out and optical power obtained through the optical test is used to correct the power dissipation for the computation of Zth-curve and structure functions to obtain accurate values of real thermal resistance. 2. Theoretical background 2.1. Thermal transient measurement Thermal transient measurement has a long history in investigating the thermal properties of solid-state device packages and has been recognized as an excellent non-destructive investigation method to detect heat conduction anomalies of chip assemblies [16]. It is also a method of recording the thermal step response functions of a structure for step function excitation, which is highly characteristic that temperature changes in an extremely wide time range [17]. Hence, thermal transient response functions such as cooling curve are usually plotted on logarithmic time axis [18]. RC network consists of two forms, which are Foster network with chain model and Cauer network with ladder model as shown in Fig. 1(a) and (b), respectively [19]. In order to identify a heatflow path, transformation of the Foster network into Cauer equivalent is necessary as ladder model is more suitable to be used to investigate the thermal properties of a system. At a large number of RC stages, it is convenient to use a graphic representation and structure function, where cumulative thermal capacitance CR is plotted as a function of the cumulative thermal resistance RR as illustrated in Fig. 2 [20]. Structure functions, which are the thermal resistance and capacitance map of a heat flow path, can be used to study the material transitions in the heat flow path and also the changes in cross sectional area of the heat flow [21]. Usually, horizontal axis of a structure function refers to thermal resistance values and vertical axis denotes thermal capacitances of a sample. Cumulative structure function which was first introduced in [22] is defined as the sum of the thermal capacitance CR with respect to the sum of the thermal resistance RR measured from excitation point towards the ambient. In a cumulative structure function, plateau commonly represents insulator materials with high thermal resistance value but lower thermal capacitance, whereas region with steeply slope indicates more conductive materials. Differential structure function is defined as the derivative of the cumulative thermal capacitance with respect to the cumulative thermal resistance [23] as following equation,
Fig. 2. Example of cumulative structure function and graphic representation of thermal RC equivalent of a system [22].
KðRe Þ ¼
Substituting
KðRe Þ ¼
ð1Þ dC e dx
¼ cA and
dRe dx
1 ¼ kA into Eq. (1),
cAdx ; ðdx=kAÞ
KðRe Þ ¼ ckA2 ;
ð2Þ
where c is volumetric heat capacitance, k is thermal conductivity and A is cross-sectional area of the heat flow path. For differential structure function, each peak indicates that heat flow is entering a new layer of material and thermal resistance values can be determined from the distance on the horizontal axis. Peaks in the differential structure function are commonly pointing to the middle of a region. 2.2. Junction-to-board thermal resistance, RthJB Thermal resistance of LED packages together with maximum operation temperature determines the maximum thermal power of a package that can be dissipated [24]. Hence, thermal management of LEDs is of great interest especially for high power LEDs that involve large amount of power dissipation. Common definition for thermal resistance, Rth is the rate of temperature increase for the input power supplied. It is also a measure of capability to dissipate heat. According to JEDEC standard [25], junction-to-board thermal resistance RthJB is defined as the thermal resistance from the operating portion of a semiconductor device to outside surface of a package closet to the chip mounting area where the same surface is properly heat sunk to minimize temperature variation across that surface.
RthJB ¼
Fig. 1. (a) Foster network and (b) Cauer network [19].
dC e : dRe
TJ TB ; Ph
ð3Þ
where TJ is junction temperature, TB is board temperature and Ph is power dissipated. In reality, once electrical power is applied, optical power will be emitted as light source and heat will be dissipated [26]. In order to obtain real thermal resistance values, real thermal resistance equation that takes into consideration of optical power emitted and
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heat dissipated should be involved since electrical thermal resistance considers only power supplied.
Electrical thermal resistance; RthE ¼
Real thermal resistance; RthR ¼
DT : P el
DT : Ph
ð4Þ
paste as interface material. The IR emitter was then driven by forward current of 1.0 A at an ambient temperature of 25.0 ± 1.0 °C maintained by using cold-plate. In order to obtain cooling curve, the IR emitter has been heated for 5–10 min to reach thermal equilibrium with ambient temperature environment and allowed to cool down.
ð5Þ 3.2. Optical test
with P h ¼ P el P op , Eq. (5) becomes,
RthR ¼
DT ; Pel Pop
ð6Þ
where Pel is input power, Pop is optical power and DT is temperature difference between junction and board in this case [27]. 3. Experimental work For thermal characterization, calibration and dual interface method have been performed on a commercial high power IR emitter with different types of thermal interface layer between the IR package and cold-plate. In addition, optical test has been carried out to obtain real thermal resistance values. Calibration was carried out by using Thermal Transient Tester (T3Ster) machine and ambient temperature was varied from 25 to 85 °C with a spacing of 15 °C by using cold-plate. Sensor current of 1.0 mA was then applied to the IR emitter at each temperature. Small value of sensor current was used to eliminate self heating effect. Once the IR emitter reached thermal equilibrium with the ambient temperature environment, forward voltage at each temperature was measured to obtain K-factor.
The IR emitter went through optical test to obtain optical power value. Optical test was carried out in an integrating sphere at constant current of 1.0 A and ambient temperature of 25.0 ± 1.0 °C. Optical power obtained was used to correct the power dissipation for the computation of Zth-curve and structure functions by using T3Ster evaluation software. The methodology was repeated for the IR emitter with thermal tape as thermal interface layer between the IR package and cold-plate. The junction-to-board thermal resistance was identified from the point of separation in the structure functions obtained by measurements with different thermal interface layers between the MCPCB and cold-plate. 4. Results and discussions 4.1. Determination of K-factor Fig. 4 shows a graph of forward voltage versus ambient temperature obtained in calibration. Temperature sensitive
3.1. Dual interface method Transient dual interface measurement is now a new JEDEC standard for power semiconductor devices with heat flow through a single dominant path [28]. In dual interface method, two thermal transient measurements of a same IR emitter were required. Each measurement was performed with a different thermal interface layer between the IR package and cold-plate as shown in Fig. 3, causing both of the structure functions to separate at a point in between the MCPCB and cold-plate. In this study, one of the thermal transient measurements was performed with a thin layer of thermal paste as the thermal interface layer between the IR package and cold-plate while another measurement was carried out with a thin layer of thermal tape. Thermal transient measurement that based on the evaluation of structure functions was performed by connecting the IR emitter to the T3Ster machine and placed on the cold-plate with thermal
Fig. 3. Schematic diagram of the IR package placed on the cold-plate.
Fig. 4. Forward voltage versus ambient temperature.
Fig. 5. Temperature distribution of the IR emitter using thermal imaging camera.
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Fig. 6. Cumulative structure function of a complete heat flow path for the IR emitter.
parameter, K-factor which was the slope of the forward voltage versus ambient temperature was obtained from the following equation:
K¼
Vf1 Vf2 ; T a1 T a2
ð7Þ
where K is K-factor, Vf1 is forward voltage at ambient temperature Ta1 and Vf2 is forward voltage at temperature Ta2. K-factor of 1.71 mV/°C has been obtained from the slope of the graph. This value denoted that an increase of 1 °C in ambient temperature would cause a forward voltage drop of 1.71 mV. Such phenomenon is the concept used in forward voltage drop method for junction temperature determination. 4.2. Dual interface method: junction-to-board thermal resistance, RthJB In general, the heat generated in the junction will first be conducted from chip to metal slug followed by MCPCB and finally towards the ambient via convection. This is the case of a nearly perfect one-dimensional heat flow. Although, there is heat loss through the surrounding of lead frame and lens, this loss is reported to be insignificant as the thermal conductivity of the materials is very small [29]. Fig. 5 displays the temperature distribution of the IR emitter placed on a heat sink, captured by using thermal imaging camera at forward current of 1.0 A and ambient temperature of around 25 °C. Temperature distribution is clearly represented by the color indicator1 ranging from deep blue (25 °C) to pink (50 °C). From the figure, it is obvious that the heat is spreading in one-dimensional direction from the chip (red color) towards the MCPCB (reddish) and external heat sink (yellowish). Cumulative and differential structure functions have been extensively used for identification of different regions in a heat 1 For interpretation of color in Fig. 5, the reader is referred to the web version of this article.
flow path of a sample. Fig. 6 illustrates a cumulative structure function for the IR emitter, it is a complete heat-flow path of the package driven at 1.0 A at an ambient temperature of 25 °C under still air condition. Since heat is flowing in a nearly perfect one-dimensional direction, heat generated at the junction will spread towards the board of the package then dissipate to ambient via convection. In Fig. 6, the left-hand side of the structure function refers to the junction in a chip whereas the right-hand side denotes the ambience. Region I represents partial thermal resistance from junction to chip, RthJP while Region II indicates the partial thermal resistance from junction to board, RthJB of the IR emitter. In this study, junction-to-chip thermal resistance, RthJP is determined by comparing the structure functions of the IR emitter with different types of die attach materials. Correspondingly, junction-to-board thermal resistance, RthJB is obtained from the exact point of separation between the MCPCB and cold-plate by utilizing dual interface method. At the point right after the Region I, heat starts to enter the die attach layer after dissipating from the junction in the chip. Then, heat will flow through the metal slug, MCPCB, thermal interface layer and finally towards the ambient. Region III denotes partial thermal resistance from junction to ambient, RthJA or simply known as total thermal resistance. Sample with different thermal interface materials will have different values of thermal resistance for the interface layer. The real junction-to-board thermal resistance, RthJB which is the point of separation in the structure functions obtained by two thermal transient measurements with different thermal interface layers, could be accurately determined by utilizing dual interface method with optical power consideration [30]. Fig. 7 demonstrates cumulative structure functions corrected with optical power for the determination of real junction-to-board thermal resistance, RthJB by utilizing dual interface method for the IR emitter with thermal paste and thermal tape as thermal interface layers. Measurements have been performed at an input current of 1.0 A and ambient temperature of 25.0 °C maintained by using cold-plate.
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RthJA (thermal paste)
unit 1_solder_tape_1.0A_25C_optical power correction_part2 - Ch. 0 10000
RthJA (thermal tape) 100
Cth [Ws/K]
Junction-to-board thermal resistance, RthJB = 10.15 K/W 1
0.01
Point of Separation
1e-4
0
2
4
6
8
10
12
14
16
Rth [K/W]
Fig. 7. Real junction-to-board thermal resistance, RthJB determination by utilizing dual interface method with optical power consideration.
Table 1 Comparison of real and electrical junction-to-board thermal resistance, RthJB. Thermal resistance
Real value with optical power consideration (K/W)
Electrical value without optical power consideration (K/W)
Junction-to-board thermal resistance, RthJB
10.15
5.60
As observed in Fig. 7, both of the structure functions run in parallel started at the origin and begin to diverge beyond the separation point, 10.15 ± 0.05 K/W. This indicates that spreading of heat from junction towards the board of the IR package is analogous for both of the measurements. However, divergence occurs once the heat is flowing from the board of the IR package towards the thermal interface layer. Hence, the real junction-to-board thermal resistance, RthJB of the high power IR emitter is 10.15 ± 0.05 K/W. By considering optical power in the measurement as indicated in Eq. (6), the junctionto-board thermal resistance obtained through the structure functions above is a real thermal resistance value. According to Eqs. (4) and (6), when optical power is taken into consideration, real thermal resistance value obtained would be higher than the electrical thermal resistance. Correspondingly, neglecting optical power in the measurement will yield a much lower electrical thermal resistance value. The comparison of real and electrical junction-to-board thermal resistance, RthJB values are tabulated in Table 1. From the table, the electrical junction-to-board thermal resistance, RthJB obtained is 44.8% lower than its real value when optical power is not taken into consideration. This shows that it is necessary to include optical power for the computation of structure functions to obtain accurate thermal resistance values [31].
Since about 30–40% of the input power will leave the system as light for IR emitter [32], neglecting optical power in thermal resistance determination will yield a value which is much lower than the reality. In addition, it is found that junction-to-ambient thermal resistance RthJA for the measurement with thermal paste and thermal tape is 12.46 ± 0.05 and 15.75 ± 0.05 K/W, respectively. The IR emitter with thermal paste as thermal interface layer requires less total thermal resistance for heat to flow through the IR package to reach cold-plate. While the IR emitter with the use of thermal tape needs more thermal resistance for heat to dissipate to the ambient. This is because of the thermal conductivity value for thermal paste, 0.90 W/mK [33] is higher than the thermal conductivity of thermal tape, 0.16 W/mK [34]. Since, thermal conductivity is inversely proportional to thermal resistance. Thus, the total thermal resistance achieved for higher thermal conductivity of thermal paste is lower compared to thermal tape. Besides, the variation in total thermal resistance might also be due to surface contact problem between the IR package and coldplate. Since, the surface of MCPCB and cold-plate are not perfectly smooth. Thermal paste which is a grease or semi-liquid material could effectively fill up the air gaps between the surface of the board and cold-plate results in good surface contact. However, thermal tape which is a solid material would cause the existence of air gaps between the surface of the board and cold-plate. In case of using the thermal paste as thermal interface layer, good surface contact between the IR package and cold-plate will result in less total thermal resistance. Therefore, heat is able to dissipate from the package more easily for IR emitter with thermal paste as thermal interface layer compared to that with the use of thermal tape.
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T3Ster Master: cumulative structure function(s) 3.79061
1.01805
1.53791
unit 4_glue_paste_1.0A_25C_optical power correction_part2 - Ch. 0 unit 4_glue_tape_1.0A_25C_optical power correction_part2 - Ch. 0 unit 1_solder_paste_1.0A_25C_optical power correction_part2 - Ch. 0 unit 1_solder_tape_1.0A_25C_optical power correction_part2 - Ch. 0
10000
100
Cth [Ws/K]
Junction-to-chip thermal resistance, RthJP = 3.79 K/W 1
Rth solder
0.01
Rth epoxy glue
1e-4
0
2
4
6
8
10
12
14
16
18
Rth [K/W] Fig. 8. Comparison of the IR emitter with different types of die attach.
4.3. Dual interface method: junction-to-chip thermal resistance, RthJP Fig. 8 illustrates the comparison of the IR emitter with different types of die attach, solder and epoxy glue recorded at constant current of 1.0 A and ambient temperature of 25.0 °C. As found in the figure, real junction-to-chip thermal resistance RthJP obtained from the structure functions with optical power consideration is 3.79 ± 0.05 K/W. Beyond this value, divergence occurs as heat is spreading through the die attach layer towards metal slug and MCPCB of the IR package. Furthermore, thermal resistance of solder and epoxy glue is 1.02 ± 0.05 and 2.56 ± 0.05 K/W, respectively. It is observed that heat is able to reach metal slug with less thermal resistance for the IR emitter with solder as die attach compared to that using epoxy glue. For the IR emitter with solder as die attach, a lower thermal resistance has been achieved due to the material property of the solder paste. Solder which is a highly thermal conductive compound has a better heat spreading effect compared to the epoxy glue. Besides, it is a fact that thermal conductivity of solder, 60 W/mK [35] is much higher than that of epoxy glue, 4.5 W/mK [36]. Hence, using solder as die attach could effectively conduct the heat that is spreading from the junction towards the metal slug, results in less thermal resistance compared to epoxy glue as the die attach. For most of the LEDs, when input current is applied to a sample, only a small portion of input power will be emitted as optical power and most of the input power will be dissipated as heat through the junction. In addition, larger the thermal resistance value, lesser the capability of the sample to dissipate heat to the surrounding. Since poor thermal management will cause excessive rise in junction temperature that will influence and reduce the reliability performance and lifespan, and subsequently cause breakdown of these devices. Therefore, thermal management of solid
state devices such as LEDs and infrared emitter is becoming more crucial now in order to achieve expected reliability and performance especially for high power solid state devices that involve large amount of power dissipation. 5. Summary and conclusion In this study, dual interface method that based on the comparison of structure functions obtained by two thermal transient measurements with different thermal interface layer between the IR package and cold-plate has been utilized to identify the real junction-to-board thermal resistance, RthJB. It was found that the real junction-to-board thermal resistance, RthJB which was the exact point of separation obtained from the structure functions with optical power consideration was 10.15 ± 0.05 K/W. When optical power was not taken into consideration, the electrical junctionto-board thermal resistance, RthJB obtained was 44.8% lower than its real value. Hence, it was necessary to include optical power for the computation of structure functions to obtain accurate thermal resistance values. In addition, junction-to-ambient thermal resistance RthJA for the measurement with thermal paste and thermal tape as the thermal interface layer between the MCPCB and cold-plate was 12.46 ± 0.05 and 15.75 ± 0.05 K/W, respectively. The total thermal resistance achieved for higher thermal conductivity of thermal paste was lower compared to thermal tape. Thus, heat was able to dissipate from the package more easily for IR emitter with thermal paste as thermal interface layer between the IR package and cold-plate compared to that with the use of thermal tape. Furthermore, comparison of the IR emitter with different types of die attach, solder and epoxy glue has also been investigated. The real junction-to-chip thermal resistance RthJP obtained from the structure functions with optical power consideration was
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3.79 ± 0.05 K/W. Besides, it was observed that thermal resistance of solder and epoxy glue was 1.02 ± 0.05 and 2.56 ± 0.05 K/W, respectively. Therefore, it has been proved that using solder as die attach could effectively conduct the heat that was spreading from the junction towards the metal slug, resulted in less thermal resistance compared to epoxy glue as solder was a highly thermal conductive compound. Acknowledgements Ching gratefully acknowledges Institute of Postgraduate Studies (IPS) of Universiti Sains Malaysia for the financial support of USM Fellowship. This work was also supported by PRGS Grant No. 1001/PFIZIK/834073. References [1] Bahaa E.A. Saleh, Malvin Carl Teich, Fundamentals of Photonics, second ed., John Wiley & Sons, Inc., New York, 2007. [2] Lianqiao Yang, Jianzheng Hu, Moo Whan Shin, Degradation of high power LEDs at dynamic working conditions, Solid-State Electronics 53 (2009) 567–570. [3] Yukio Narukawa, Masahiko Sano, Masatsugu Ichikawa, Shunsuke Minato, Takahiko Sakamoto, Takao Yamada, Takashi Mukai, Improvement of luminous efficiency in white light emitting diodes by reducing a forward-bias voltage, Jpn. J. Appl. Phys. 46 (2007) L963–L965. [4] Lianqiao Yang, Jianzheng Hu, Sunho Jang, Moo Whan Shin, Thermal design of ceramic packages for high power light-emitting diodes, Semicond. Sci. Technol. 22 (2007) 705–708. [5] Ting Cheng, Xiaobing Luo, Suyi Huang, Sheng Liu, Thermal analysis and optimization of multiple LED packaging based on a general analytical solution, Int. J. Therm. Sci. 49 (2010) 196–201. [6] Jianzheng Hu, Lianqiao Yang, Moo Whan Shin, Electrical, optical and thermal degradation of high power GaN/InGaN light-emitting diodes, J. Phys. D Appl. Phys. 41 (2008) 035107. [7] Gilbert Held, Introduction to Light Emitting Diode Technology and Applications, Taylor & Francis Group, New York, 2009. [8] Chun-Jen Weng, Advanced thermal enhancement and management of LED packages, Int. Commun. Heat Mass Transfer 36 (2009) 245–248. [9] Mitsuo Fukuda, Optical Semiconductor Devices, John Wiley & Sons, Inc., New York, 1999. [10] D. Schweitzer, H. Pape, R. Kutscherauer, M. Walder, Semiconductor Thermal Measurement and Management Symposium, 2009. 25th IEEE SEMI-THERM, 2009, pp. 172–179. [11] B. Siegal, An alternative approach to junction-to-case thermal resistance measurements, Electronics Cooling 7 (2001) 52–57. [12] O. Steffens, P. Szabo, M. Lenz, G. Farkas, Semiconductor Thermal Measurement and Management Symposium, 2005. 21st IEEE SEMI-THERM, 2005, pp. 313– 321.
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