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System design with MOS dynamic shift registers
92
WORLD
ABSTRACTS
ON M I C R O E L E C T R O N I C S
* C o m p u t e r p r o g r a m for d e s i g n i n g o p t i m a l netw o r k s w i t h M O S gates. T. SHINOZAKI. Illinois University, Computer Science Department, Urbana, U.S.A. U I U CDCS-R-72-502, April (1972), pp. 121. An MOS gate can realize a considerably complex negative function. In this paper, first an algorithm which realizes a logic network for a given function with a minimal number of negative gates is described. This algorithm is a modification of Liu's early algorithm to make program implementation easy. Second, a computer program which implements the algorithm is described and the computational results for more than 4000 functions are discussed. Finally, as a further consideration, a modified algorithm which was developed based on Liu's algorithm and Kasami et al. is described, and the advantages of this algorithm is discussed. On-line integrated circuit design system using g r a p h i c display. K. TAMARU, N. SHIMOMURA, K. YOSHIDA, N. NAKAYAMA, N. KURAMOCHI and Y. TOKUTOME. Trans. Inst. Electron. Commun. Engrs, Japan 55, No. 9, September (1972), p. 30. The C A D L I C system (computer aided design system of linear integrated circuits), described here, is an on-line integrated circuit design system using a graphic display. The main part of this system consists of a circuit design system and a mask pattern design system. In addition to these there are the device file for the data of standard elements and a subsystem in which the data for driving an autodrafter is generated. In this system bipolar linear integrated circuits which consist of as many as 100 elements can be designed. C u s t o m - d e s i g n e d M O S a r r a y s for u s e i n digital s y s t e m s . S. PATEL. Electron. Engng, October (1972). Total custom-design of L S I / M O S arrays can offer many advantages to the digital-systems designer. These include greater flexibility of design, minimal number of bonds required and the use of chip sizes that are optimum for the particular IC process used. The latter can also offer overall cost benefits. C o m p l e m e n t a r y M O S c i r c u i t s in p r o c e s s c o n t r o l i n s t r u m e n t a t i o n . W. F. KALIN. Microelectronics 4, No. 1 (1972), p. 35. Apart from discussing the merits and application of C M O S circuits, this article points out the important points of cost and reliability. The operating principle of CMOS is reviewed and the technology is compared with other types of transistor circuits. S y s t e m d e s i g n w i t h M O S d y n a m i c shift r e g i s t e r s . T. J. BUTLIN and W. A. WXLKE. E E N , June (1972), p. 45. To fully realize the advantages of the dynamic shift register that are not offered by conventional memory elements, such as magnetic cores, it is necessary to understand the design problems associated with it. This article covers the operation of the dynamic shift register with system design aids.
AND RELIABII. ITY
I n f l u e n c e of s u r f a c e e n e r g i e s on l i n e r e s o l u t i o n i n s c r e e n printing. J. R. LARRY. Solid St. Technol., June (1972), p. 48. Line resolution in the screen printing process is improved through proper surface energy relationships of the printing ink, screen and substrate. Paste wettability of surfaces is decreased by reducing the surface energy of the substrate or screen below the surface energy of printing ink. Surface energies can be controlled by selectively depositing organic chemical monolayers on to screen and substrate surfaces. The reduction in wettability improves paste release from the screen and prevents paste flow on the substrate during air and oven drying. By employing surface forces, less demanding rheological properties of the ink are required and uniform paste transfer is possible. Surface coating properties for screens and substrates are discussed.
N o n - c o n t a c t printing a n d a u t o m a t i c a l i g n m e n t o f c h r o m i u m m a s k patterns o n s i l i c o n s l i c e s . J. WILSON and S. C. BOTTOMLEY. Solid St. Technol., June (1972), p. 37. "Microliner" non-contact printing ensures that the mask working surface never contacts the surface of the resist coated slices. Automatic alignment reduces tedium of visually superimposing and manually positioning the various integrated circuit layers. These features combined can lead to a significant reduction in mask damage and a possibility of an overall improved yield. Developed models have shown the viability of noncontact printing of circuit feature sizes down to 0-0001 in. (2.5 gm) and automatic alignment repetition of 12 gin. (0.3 gm). Once set up, the equipment only requires the operator to place a coated slice on an input station and after 25 sec, assuming the use of a negative resist, this slice is ejected, exposed and ready for chemical processing. A n e x p e r i m e n t a l m o d e l o f the m i c r o e l e c t r o n i c u l t r a s o n i c w i r e b o n d i n g m e c h a n i s m . G. G. HARMAN and K. O. LEERY. lOth I E E E Annual Proceedings, Reliability Physics (1972), p. 49. Various concepts of the microelectronic ultrasonic bonding mechanism have been expounded for many years. The present work attempts to resolve some of the conflicts by experimentally examining each step in the ultrasonic aluminum wire bonding process. Measurements made with a capacitor microphone during bonding are correlated with appropriate SEM pictures of bond lift-off patterns. A series of inductive experiments have been performed, the results of which can be summarized as follows: Heat generation in the weldments is insufficient to cause the observed welding. The deforming wire breaks up and sweeps aside oxide, exposing clean metal surfaces which are then able to form metallurgical welds. The bonding tool does not grip the wire and slide it back and forth across the bonding pad. The use of a grooved tool does not improve the welding process. The tool-towire coupling takes place by a series of microwelds that are repeatedly made and broken as the tool moves back and forth across the wire surface.
WORLD
ABSTRACTS
ON M I C R O E L E C T R O N I C S
* C o m p u t e r p r o g r a m for d e s i g n i n g o p t i m a l netw o r k s w i t h M O S gates. T. SHINOZAKI. Illinois University, Computer Science Department, Urbana, U.S.A. U I U CDCS-R-72-502, April (1972), pp. 121. An MOS gate can realize a considerably complex negative function. In this paper, first an algorithm which realizes a logic network for a given function with a minimal number of negative gates is described. This algorithm is a modification of Liu's early algorithm to make program implementation easy. Second, a computer program which implements the algorithm is described and the computational results for more than 4000 functions are discussed. Finally, as a further consideration, a modified algorithm which was developed based on Liu's algorithm and Kasami et al. is described, and the advantages of this algorithm is discussed. On-line integrated circuit design system using g r a p h i c display. K. TAMARU, N. SHIMOMURA, K. YOSHIDA, N. NAKAYAMA, N. KURAMOCHI and Y. TOKUTOME. Trans. Inst. Electron. Commun. Engrs, Japan 55, No. 9, September (1972), p. 30. The C A D L I C system (computer aided design system of linear integrated circuits), described here, is an on-line integrated circuit design system using a graphic display. The main part of this system consists of a circuit design system and a mask pattern design system. In addition to these there are the device file for the data of standard elements and a subsystem in which the data for driving an autodrafter is generated. In this system bipolar linear integrated circuits which consist of as many as 100 elements can be designed. C u s t o m - d e s i g n e d M O S a r r a y s for u s e i n digital s y s t e m s . S. PATEL. Electron. Engng, October (1972). Total custom-design of L S I / M O S arrays can offer many advantages to the digital-systems designer. These include greater flexibility of design, minimal number of bonds required and the use of chip sizes that are optimum for the particular IC process used. The latter can also offer overall cost benefits. C o m p l e m e n t a r y M O S c i r c u i t s in p r o c e s s c o n t r o l i n s t r u m e n t a t i o n . W. F. KALIN. Microelectronics 4, No. 1 (1972), p. 35. Apart from discussing the merits and application of C M O S circuits, this article points out the important points of cost and reliability. The operating principle of CMOS is reviewed and the technology is compared with other types of transistor circuits. S y s t e m d e s i g n w i t h M O S d y n a m i c shift r e g i s t e r s . T. J. BUTLIN and W. A. WXLKE. E E N , June (1972), p. 45. To fully realize the advantages of the dynamic shift register that are not offered by conventional memory elements, such as magnetic cores, it is necessary to understand the design problems associated with it. This article covers the operation of the dynamic shift register with system design aids.
AND RELIABII. ITY
I n f l u e n c e of s u r f a c e e n e r g i e s on l i n e r e s o l u t i o n i n s c r e e n printing. J. R. LARRY. Solid St. Technol., June (1972), p. 48. Line resolution in the screen printing process is improved through proper surface energy relationships of the printing ink, screen and substrate. Paste wettability of surfaces is decreased by reducing the surface energy of the substrate or screen below the surface energy of printing ink. Surface energies can be controlled by selectively depositing organic chemical monolayers on to screen and substrate surfaces. The reduction in wettability improves paste release from the screen and prevents paste flow on the substrate during air and oven drying. By employing surface forces, less demanding rheological properties of the ink are required and uniform paste transfer is possible. Surface coating properties for screens and substrates are discussed.
N o n - c o n t a c t printing a n d a u t o m a t i c a l i g n m e n t o f c h r o m i u m m a s k patterns o n s i l i c o n s l i c e s . J. WILSON and S. C. BOTTOMLEY. Solid St. Technol., June (1972), p. 37. "Microliner" non-contact printing ensures that the mask working surface never contacts the surface of the resist coated slices. Automatic alignment reduces tedium of visually superimposing and manually positioning the various integrated circuit layers. These features combined can lead to a significant reduction in mask damage and a possibility of an overall improved yield. Developed models have shown the viability of noncontact printing of circuit feature sizes down to 0-0001 in. (2.5 gm) and automatic alignment repetition of 12 gin. (0.3 gm). Once set up, the equipment only requires the operator to place a coated slice on an input station and after 25 sec, assuming the use of a negative resist, this slice is ejected, exposed and ready for chemical processing. A n e x p e r i m e n t a l m o d e l o f the m i c r o e l e c t r o n i c u l t r a s o n i c w i r e b o n d i n g m e c h a n i s m . G. G. HARMAN and K. O. LEERY. lOth I E E E Annual Proceedings, Reliability Physics (1972), p. 49. Various concepts of the microelectronic ultrasonic bonding mechanism have been expounded for many years. The present work attempts to resolve some of the conflicts by experimentally examining each step in the ultrasonic aluminum wire bonding process. Measurements made with a capacitor microphone during bonding are correlated with appropriate SEM pictures of bond lift-off patterns. A series of inductive experiments have been performed, the results of which can be summarized as follows: Heat generation in the weldments is insufficient to cause the observed welding. The deforming wire breaks up and sweeps aside oxide, exposing clean metal surfaces which are then able to form metallurgical welds. The bonding tool does not grip the wire and slide it back and forth across the bonding pad. The use of a grooved tool does not improve the welding process. The tool-towire coupling takes place by a series of microwelds that are repeatedly made and broken as the tool moves back and forth across the wire surface.