- Email: [email protected]
Tackling the very large-scale problems of VLSI: a special report
World Abstracts on Microelectronics and Reliability complex with a high information capacity an attempt is made to estimate the further trend of development on the basis of the status attained. Possible variants of realizing information displays include the consideration of the plasma display, injection luminescence, electroluminescence, liquid crystals, and vacuum tube. Common market eyes VLSI effort. JAMESSMITH. Electronics p. 92 (28 September 1978). It is almost impossible to get factional national electronics producers together on advanced projects in computers or microelectronics, but Common Market experts are trying anyway. Their goal: to remedy Western Europe's dangerously growing gap in very-large-scale integrated-circuit technology. Microcomputers do on-chip a-d conversion. Electronics p. 67 (20 July 1978). One-chip controllers from two Japanese companies have software to accomplish analog-to-digital conversion. Techmology update. Electronics p. 110 (26 October 1978). Semiconductor technology continues to be the engine that drives electronics past existing limits. And 1978 has proved no exception, as semiconductor manufacturers pass the threshold of a new era ushered in by very large-scale integration. The announcement of the first 64-K randomaccess memory and the entry into the 16-bit realm by micro-computer chip families signal the advent of devices with unprecedented density and performance. The ultimate effect stretches the imagination, but already the capabilities afforded by VLSI are breaking new ground as minicomputer manufacturers turn to new architectures built around high-performance chips, as communications engineers plan systems with the growing supply of chip codecs, as instruments that intelligently measure and manipulate signals proliferate, and as talking toys delight and enlighten children. All these presage another remarkable year ahead. Second-generation microcontrollers take on dedicatedfunction tasks. JOHN BEASTON. Electronics p. 127 (23 November 1978). Two new series further reduce demands on microcomputer system's CPU, increasing system throughput and reliability while simplifying design.
5. M I C R O E L E C T R O N I C S
Equipment costs worry chip makers. WILLIAM F. ARNOLD. Electronics p. 87 (23 November 1978). Added to the costs of R & D needed to keep up with VLSI, prices could cause next shakeout of semiconductor companies. Tackling the very large-scale problems of VLSi: a special report. RAYMOND P. CAPECE. Electronics p. 111 (23 November 1978). From tens of devices per chip Io tens of thousands the increase over the last few years in the number of transistors in an integrated circuit has been nothing less than explosive. But the growth process has been evolutionary, not revolutionary. Continual process improvements and the confidence gained with the production of hundreds of thousands of chips per month have enabled manufacturers to shrink transistor dimensions and increase producible die sizes. But now the increasing complexity of logic circuits, layout topology, and lithographic processes have compounded to create a design-management problem of mammoth proportions. Anticipating unprecedented design problems and greater risks of investment capital, manpower, and development time than ever before, leading-edge semiconductor manufacturers have initiated long-term programs to address the challenge of what has come to be called very largescale integration. A prognosis of the impending intercontinental LSI battle. IAN M. MACKINTOSH. Microelectron. J. 9, (2) 24 (1978). Ever since the inventions of the integrated circuit and the silicon planar process, American semiconductor producers have dominated the world markets for ICs. especially at the leading-edge of each new generation of technology. This is certainly the ease today for products of LSI complexity. However, there are increasing signs that things might be changing. For example, competitive memory products are now being produced in substantial quantities in Japan, and there is a growing interest by European companies in acquiring a stake in US semiconductor companies. A key question, therefore, is whether the global domination by American IC companies will be seriously threatened, particularly as the VLSI era approaches, and it is to au examination of the major facets of this question that this paper is directed.
DESIGN
Recombination level selection criteria for lifetime r&luction in integrated circuits. B. JAYANT BALIGA. Solid-St. Electron. 21, 1033 (1978). In the past, lifetime control in integrated circuits has been done on an empirical basis. This paper introduces selection criteria for recombination centers which are to be used for reducing minority carrier lifetime in integrated circuits. It is shown that the recombination level should have a large lifetime ratio (rsc/~,D in order to obtain minority carrier lifetime reduction with minimal increase in the leakage current, and should possess large capture cross section values in order to minimize compensation effects. Using these criteria, preferred locations for the recombination center have been defined for both p and n type silicon, and the trade-off between reduction of lifetime and increase in leakage current has been shown to degrade with increase in resistivity and ambient temperature. These criteria have also allowed a quantitative comparison between various lifetime control techniques for the first time, and platinum doping has been identified as the most favorable lifetime control process at the present time.
191
AND
CONSTRUCTION
A van der Pauw resistor structure for determining mask superposition errors on semiconductor slices. DAVID S. PERLOFF. Solid-St. Electron. 21, 1013 (1978. A symmetric eight-point van der Pauw resistor structure is described which makes it possible to determine the x- and ),-axis vector components of mask superposition error on specially processed semiconductor slices. The structure is fabricated by first delineating a corner-contacted square van der Pauw resistor geometry. A second masking step adds sensor arms at the midpoints of the sides of the square body if the two masks have been correctly superimposed. The actual location of the sensor arms is determined by carrying out a series of four-point resistance measurements after doping the structure. Control geometries, in which the eight sensor arms are delineated on the same masking step, are used to investigate the accuracy and precision of the measurement technique. It is found that the vector components of mask superposition error can be determined, in the absence of mask-to-mask registration errors, with an absolute accuracy in the range _+O.101Lm and standard error below 0.015/tm. Examples of vector displacement maps are pre-
5. M I C R O E L E C T R O N I C S
Equipment costs worry chip makers. WILLIAM F. ARNOLD. Electronics p. 87 (23 November 1978). Added to the costs of R & D needed to keep up with VLSI, prices could cause next shakeout of semiconductor companies. Tackling the very large-scale problems of VLSi: a special report. RAYMOND P. CAPECE. Electronics p. 111 (23 November 1978). From tens of devices per chip Io tens of thousands the increase over the last few years in the number of transistors in an integrated circuit has been nothing less than explosive. But the growth process has been evolutionary, not revolutionary. Continual process improvements and the confidence gained with the production of hundreds of thousands of chips per month have enabled manufacturers to shrink transistor dimensions and increase producible die sizes. But now the increasing complexity of logic circuits, layout topology, and lithographic processes have compounded to create a design-management problem of mammoth proportions. Anticipating unprecedented design problems and greater risks of investment capital, manpower, and development time than ever before, leading-edge semiconductor manufacturers have initiated long-term programs to address the challenge of what has come to be called very largescale integration. A prognosis of the impending intercontinental LSI battle. IAN M. MACKINTOSH. Microelectron. J. 9, (2) 24 (1978). Ever since the inventions of the integrated circuit and the silicon planar process, American semiconductor producers have dominated the world markets for ICs. especially at the leading-edge of each new generation of technology. This is certainly the ease today for products of LSI complexity. However, there are increasing signs that things might be changing. For example, competitive memory products are now being produced in substantial quantities in Japan, and there is a growing interest by European companies in acquiring a stake in US semiconductor companies. A key question, therefore, is whether the global domination by American IC companies will be seriously threatened, particularly as the VLSI era approaches, and it is to au examination of the major facets of this question that this paper is directed.
DESIGN
Recombination level selection criteria for lifetime r&luction in integrated circuits. B. JAYANT BALIGA. Solid-St. Electron. 21, 1033 (1978). In the past, lifetime control in integrated circuits has been done on an empirical basis. This paper introduces selection criteria for recombination centers which are to be used for reducing minority carrier lifetime in integrated circuits. It is shown that the recombination level should have a large lifetime ratio (rsc/~,D in order to obtain minority carrier lifetime reduction with minimal increase in the leakage current, and should possess large capture cross section values in order to minimize compensation effects. Using these criteria, preferred locations for the recombination center have been defined for both p and n type silicon, and the trade-off between reduction of lifetime and increase in leakage current has been shown to degrade with increase in resistivity and ambient temperature. These criteria have also allowed a quantitative comparison between various lifetime control techniques for the first time, and platinum doping has been identified as the most favorable lifetime control process at the present time.
191
AND
CONSTRUCTION
A van der Pauw resistor structure for determining mask superposition errors on semiconductor slices. DAVID S. PERLOFF. Solid-St. Electron. 21, 1013 (1978. A symmetric eight-point van der Pauw resistor structure is described which makes it possible to determine the x- and ),-axis vector components of mask superposition error on specially processed semiconductor slices. The structure is fabricated by first delineating a corner-contacted square van der Pauw resistor geometry. A second masking step adds sensor arms at the midpoints of the sides of the square body if the two masks have been correctly superimposed. The actual location of the sensor arms is determined by carrying out a series of four-point resistance measurements after doping the structure. Control geometries, in which the eight sensor arms are delineated on the same masking step, are used to investigate the accuracy and precision of the measurement technique. It is found that the vector components of mask superposition error can be determined, in the absence of mask-to-mask registration errors, with an absolute accuracy in the range _+O.101Lm and standard error below 0.015/tm. Examples of vector displacement maps are pre-