- Email: [email protected]
The clean room as a system for contamination control
l 194
World Abstracts on Microelectronics and Reliability
Adding intelligence to the proper/handler-tester interface. RON LECKIE. Semiconductor int., 106 (September 1985). Test equipment and proper manufacturers have started to develop standards at three levels: the physical interface, protocol requirements and applications level definitions. Vacuum pump fluids for semiconductor processing. MARTIN J. MASTROIANNI, MARC C. TARPLEE and LAWRENCE GILBERT. Semiconductor int., 62 (November 1985). Many factors enter into the selection of fluids for mechanical vacuum pumps to meet specific process requirements involved in semiconductor fabrication. Cost effectiveness leads the list.
Vacuum pumps: the critical component. RON ISCO~. Semiconductor int., 46 (November 1985). Although a vacuum pump has little utility by itself, when teamed with equipment for an application under vacuum, it becomes the key component in many production systems for semiconductor manufacturing. A test structure for the electrkal measurement of the misafignment between gate and dilhsion regions in MOS/LSI e i l ~ t s . ALICJA GLUZINSKA, ANORZm A. CZERWINSgI and MARIA CZERWINSKA. Electron Technol., Warsaw 17(1/2), 39 (1984). A test structure has been proposed for the electrical measurement of the misalignment between gate and diffusion regions in MOS/LSI circuits. It has been performed and verified as a diagnostic tool for the gate photolitography process in the manufacturing of the PMOS/LSI circuits with aluminium gate. A simple bet effective methnd of electrical enonections checking of IC layout and its implemmtatien. JANUSZ GAI.~SlCl. Electron Technol., Warsaw 17(1/2), 71 (1984). An approach to the problem of verification of electrical connections in IC layout, in hierarchical system of IC design, is presented. This approach is based on distinguishing the electrical tracks in layout description. Advantages of this solution resulting from nonstandard electrical checking scheme are given. Finally the multivarient electrical checks of contact windows are described, and exemplary set of tests is given. The solution is independent of the technology of IC fabrication. High-speed integrated ¢ireuim based on InP-MISFETs with plasma StO2 gate imulator, K. P. PANDE and D. Gu'nmtgEz. Solid St. Electron. 28(10), 1045 (1985). High-speed, directcoupled FET logic and inverter integrated circuits were fabricated with InP-MISFETs incorporating, for the first time, a plasma-SiO 2 gate insulator. These circuits employed 3-/~m gate-length MISFET drivers and MESFETs as the load. The MISFET drivers showed channel mobilities in the range of 2100cm 2 V-~ sec-~ and negligible current drift up to 104 sec. The DCFL circuit, with a power supply voltage of 4 V, showed a typical propagation delay per stage of 80 pS with an associated power-delay product of 57fJ. For inverters, a logic swing of 3.38 V, a d.c. gain of 1.9 in the linear region and noise margins of 0.92 and 0.80 V were observed. FLORET: a sinmintioa approneh m verifying MOS-LSI logic design. ANDRZEJTOMASZROSINSKI,MAClF_JCHACHULSKIand AN'tONI MICtlXLSL Electron Technol., Warsaw 15(1/2), 3 (1982). A simulation method being developed at the Institute of Electron Technology, CEMI, and the Institute of Computer Science, Polish Academy of Sciences, is presented. The method applies to checking the correctness of logic designs and is based on the usage of software simulation at the register transfer level. In the paper some examples of MOS-LSI structure descriptions are shown and results of simulation experiments are discussed. Reticle ~i~i~ for optimized CD control TERRY V. NORDSTROM. Semiconductor int., 158 (September 1985).
Single-layer photoresist using a post exposure bake can be combined with correct reticle sizing to achieve excellent CD control. The clean room as a system for contamination control. STUART A. HOENIG. Solid St. Technol., 129 (September 1985). Recognition that a clean room is part of a system for contamination control is absolutely critical if we expect to build cost effective/efficient facilities for semiconductor manufacturing. This suggests that builders/users of clean rooms consider a number of topics, such as: air filtration and the proper direction of the filtered air to keep the wafers clean; employee training and motivation: wafer handling technology; procurement, transport, and use of chemicals, solvents, and gases that will come in contact with the wafers; development of systems for isolation of wafers from the employees to reduce the hazard of contamination and the requirement for elaborate clean room facilities; and on-line monitoring of all the parameters that can result in wafer contamination. Clean rooms for ULSi manufacturing: class 1 practice. JAMES BURNETr. Solid St. Technol., 121 (September 1985). Userdriven improvements now appearing in the new generation of ULSI-capable microelectronic manufacturing plants are described. Topics covered include latest steps to control major sources of wafer contamination, both in operation and in the facility. The next generation, the Class I clean room, is described along with differences from the Class 100 and Class 10 clean room practices. New inner lead bonder for muiti~tion tape automated bonding. TAr,~AKI TSUDA and MASAO HAYAKAWA.Solid St. Technol., 167 (August 1985). While the use of Tape Automated Bonding has grown because of its adaptability to mass-production, compared with wire bonding, where speed has been improved and where one operator can now manipulate several bonders, the relative merits of TAB have decreased. However, by improving the equipment, we have succeeded in almost full automation of the TAB inner lead bonding operation. These improvements include automated mechanisms for the detection and pick up of good chips, bump-inner lead alignment, and tool-lapping, etc. By introducing these new bonders, we have reduced the number of the operators by about half, and made the TAB process cost competitive with respect to wire bonding. Recent advances in ~ tecbeelogy. SrI~CAMP. MURAgKA. Solid St. Technol., 181 (September 1985). Recent advances in silicide technology are reviewed. Single target sputtering, CVD techniques, awareness of properly carried out oxidation, use of self-aligned silicides and rapid thermal annealing, and new applications are discussed. Noncontamimtting gas diatribetioa systems. ROI~ERT C. THOMAS. Solid St. Technol., 153 (September 1985). Clean gases, free from contamination in any form, are required in many industrial and laboratory applications. Remote location of gas sources for reasons of convenience or safety makes distribution systems for high purity gases necessary. Improperly installed or managed systems can be the -source of added contamination. Correct designs, proper materials and components, and careful construction techniques are available for installing noncontaminating distribution systems. Effective point of use and source management techniques maintain system cleanliness. Is there a future fur TAB?. DONALD B. BROWN and MARTIN G. FREEDMAN.Solid St. Technoi., 173 (September 1985). Few products utilize the once very promising Tape Automated Bonding (TAB) technology because of its limited flexibility, and therefore high cost. Two new applications are now being actively considered: one is direct chip on board (COB)
World Abstracts on Microelectronics and Reliability
Adding intelligence to the proper/handler-tester interface. RON LECKIE. Semiconductor int., 106 (September 1985). Test equipment and proper manufacturers have started to develop standards at three levels: the physical interface, protocol requirements and applications level definitions. Vacuum pump fluids for semiconductor processing. MARTIN J. MASTROIANNI, MARC C. TARPLEE and LAWRENCE GILBERT. Semiconductor int., 62 (November 1985). Many factors enter into the selection of fluids for mechanical vacuum pumps to meet specific process requirements involved in semiconductor fabrication. Cost effectiveness leads the list.
Vacuum pumps: the critical component. RON ISCO~. Semiconductor int., 46 (November 1985). Although a vacuum pump has little utility by itself, when teamed with equipment for an application under vacuum, it becomes the key component in many production systems for semiconductor manufacturing. A test structure for the electrkal measurement of the misafignment between gate and dilhsion regions in MOS/LSI e i l ~ t s . ALICJA GLUZINSKA, ANORZm A. CZERWINSgI and MARIA CZERWINSKA. Electron Technol., Warsaw 17(1/2), 39 (1984). A test structure has been proposed for the electrical measurement of the misalignment between gate and diffusion regions in MOS/LSI circuits. It has been performed and verified as a diagnostic tool for the gate photolitography process in the manufacturing of the PMOS/LSI circuits with aluminium gate. A simple bet effective methnd of electrical enonections checking of IC layout and its implemmtatien. JANUSZ GAI.~SlCl. Electron Technol., Warsaw 17(1/2), 71 (1984). An approach to the problem of verification of electrical connections in IC layout, in hierarchical system of IC design, is presented. This approach is based on distinguishing the electrical tracks in layout description. Advantages of this solution resulting from nonstandard electrical checking scheme are given. Finally the multivarient electrical checks of contact windows are described, and exemplary set of tests is given. The solution is independent of the technology of IC fabrication. High-speed integrated ¢ireuim based on InP-MISFETs with plasma StO2 gate imulator, K. P. PANDE and D. Gu'nmtgEz. Solid St. Electron. 28(10), 1045 (1985). High-speed, directcoupled FET logic and inverter integrated circuits were fabricated with InP-MISFETs incorporating, for the first time, a plasma-SiO 2 gate insulator. These circuits employed 3-/~m gate-length MISFET drivers and MESFETs as the load. The MISFET drivers showed channel mobilities in the range of 2100cm 2 V-~ sec-~ and negligible current drift up to 104 sec. The DCFL circuit, with a power supply voltage of 4 V, showed a typical propagation delay per stage of 80 pS with an associated power-delay product of 57fJ. For inverters, a logic swing of 3.38 V, a d.c. gain of 1.9 in the linear region and noise margins of 0.92 and 0.80 V were observed. FLORET: a sinmintioa approneh m verifying MOS-LSI logic design. ANDRZEJTOMASZROSINSKI,MAClF_JCHACHULSKIand AN'tONI MICtlXLSL Electron Technol., Warsaw 15(1/2), 3 (1982). A simulation method being developed at the Institute of Electron Technology, CEMI, and the Institute of Computer Science, Polish Academy of Sciences, is presented. The method applies to checking the correctness of logic designs and is based on the usage of software simulation at the register transfer level. In the paper some examples of MOS-LSI structure descriptions are shown and results of simulation experiments are discussed. Reticle ~i~i~ for optimized CD control TERRY V. NORDSTROM. Semiconductor int., 158 (September 1985).
Single-layer photoresist using a post exposure bake can be combined with correct reticle sizing to achieve excellent CD control. The clean room as a system for contamination control. STUART A. HOENIG. Solid St. Technol., 129 (September 1985). Recognition that a clean room is part of a system for contamination control is absolutely critical if we expect to build cost effective/efficient facilities for semiconductor manufacturing. This suggests that builders/users of clean rooms consider a number of topics, such as: air filtration and the proper direction of the filtered air to keep the wafers clean; employee training and motivation: wafer handling technology; procurement, transport, and use of chemicals, solvents, and gases that will come in contact with the wafers; development of systems for isolation of wafers from the employees to reduce the hazard of contamination and the requirement for elaborate clean room facilities; and on-line monitoring of all the parameters that can result in wafer contamination. Clean rooms for ULSi manufacturing: class 1 practice. JAMES BURNETr. Solid St. Technol., 121 (September 1985). Userdriven improvements now appearing in the new generation of ULSI-capable microelectronic manufacturing plants are described. Topics covered include latest steps to control major sources of wafer contamination, both in operation and in the facility. The next generation, the Class I clean room, is described along with differences from the Class 100 and Class 10 clean room practices. New inner lead bonder for muiti~tion tape automated bonding. TAr,~AKI TSUDA and MASAO HAYAKAWA.Solid St. Technol., 167 (August 1985). While the use of Tape Automated Bonding has grown because of its adaptability to mass-production, compared with wire bonding, where speed has been improved and where one operator can now manipulate several bonders, the relative merits of TAB have decreased. However, by improving the equipment, we have succeeded in almost full automation of the TAB inner lead bonding operation. These improvements include automated mechanisms for the detection and pick up of good chips, bump-inner lead alignment, and tool-lapping, etc. By introducing these new bonders, we have reduced the number of the operators by about half, and made the TAB process cost competitive with respect to wire bonding. Recent advances in ~ tecbeelogy. SrI~CAMP. MURAgKA. Solid St. Technol., 181 (September 1985). Recent advances in silicide technology are reviewed. Single target sputtering, CVD techniques, awareness of properly carried out oxidation, use of self-aligned silicides and rapid thermal annealing, and new applications are discussed. Noncontamimtting gas diatribetioa systems. ROI~ERT C. THOMAS. Solid St. Technol., 153 (September 1985). Clean gases, free from contamination in any form, are required in many industrial and laboratory applications. Remote location of gas sources for reasons of convenience or safety makes distribution systems for high purity gases necessary. Improperly installed or managed systems can be the -source of added contamination. Correct designs, proper materials and components, and careful construction techniques are available for installing noncontaminating distribution systems. Effective point of use and source management techniques maintain system cleanliness. Is there a future fur TAB?. DONALD B. BROWN and MARTIN G. FREEDMAN.Solid St. Technoi., 173 (September 1985). Few products utilize the once very promising Tape Automated Bonding (TAB) technology because of its limited flexibility, and therefore high cost. Two new applications are now being actively considered: one is direct chip on board (COB)