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World abstracts on microelectronics and reliability
which it can be efficiently implemented on a computer. The work to date shows a substantial improvement in computational effort for large, complex fault trees analysed with this method in comparison to the traditional approach. The Binary Decision Diagram method has the additional advantage that approximations are not required, exact calculations for the top event parameters can be performed. 4. MICROELECTRONICS~GENERAL
Commercial-components initiative: ground benign systems--plastic encapsulated microcircuits. EDWARD J. KROSS and MICHAEL A. SICURANZA. IEEE Transactions on Reliability, 1996, 45(2), 180. The purpose of the "Commercial Components Initiative--Ground Benign Systems" was to determine if commercial off-the-shelf PEM (plastic-encapsulated microcircuits) are suitable for use in ground-benign, dynamically-fixed military electronic systems. If so, they could replace the more expensive components presently specified by DoD (U.S. Dept, of Defense), resulting in appreciable life-cycle cost savings. At issue is whether the components produced for the commercial industry are reliable and durable enough to withstand the environments and life expectancies of military systems. In response to shifting semiconductor market conditions, the U.S. Air Force Electronics Systems Center contracted DSD Laboratories Inc. (Sudbury, Massachusetts) in July 1993 to conduct an experiment wherein electronic hardware from an existing DoD system would be replaced with commercial hardware built using best commercial practice. Goals were established by which the success of the experiment would be measured. These goals involved material cost savings, as well as the ease of incorporating these commercial components into the system. The system chosen for the experiment was the existing North Warning System (NWS) Unattended Short Range Radar, AN/FPS-124, for which development began in 1984. This system operates in a temperature-controlled ground shelter, but does have a cold-storage ( - 4 0 ° C ) requirement. Using several existing PCB (printed circuit board) designs from the AN/FPS-124 Signal Processor, military IC (integrated circuits) were replaced with functionally equivalent commercial PEM to build the commercial hardware. To prove functional equivalency, the commercial hardware was tested under the same military-approved test procedures and in the same way as the military versions. The assembly and testing of the hardware was flawless, and an IC cost savings of 88% was realized. These results far exceeded the established goals. As of this writing, the experimental hardware has run for 2 years, as of April 1996 (over 14.106 device-hours) without a failure, and there are no plans to
discontinue its operation. Only 13 PCB were built and tested, with three unique designs. Each 8 × 10 inch PCB contained 75-100 IC, mostly digital technology. Three sets of PCB (9 total) were deployed for active use at remote radar sites. The success of this experiment shows that commercial components can easily be incorporated into a military system without sacrificing performance. Reliability was not formally proven. A more practical informal reliability test for this project, which DSD dubbed "Run for Reliability", was to install the PCB in the system and let the operational hours accrue beyond the subsystem and Signal Processor lifetime allocations. The Run for Reliability shows promise that commercial hardware could be proven in a formal reliability demonstration test. 5. MICROELECTRONICS DESIGN AND CONSTRUCTION
Silicon mieromachining technique for fabricating high temperature superconducting microbolometers. R. BARTH, el al., Vocttum, 1996, 47(9), 1129. Infrared detectors have been based on high temperature superconductors as bolometer resistors. To achieve low thermal mass and good thermal isolation of the bolometer device the concept of air-bridge microbolometers is introduced. Silicon micromachining technology is applied to prepare free-standing YBa2Cu3Ov structures on silicon substrates. This paper describes the overall concept of air-bridge microbolometers and demonstrates the superiority of these devices compared to conventional bolometers.
Millimeter-wave monolithic integrated circuit interconnects using electromagnetic field coupling. IEEE Transactions on Components, Packaging and Manufacturing Technology--Part B, 1996, 19(2), 278. Standard interconnect and packaging techniques for millimeter-wave monolithic integrated circuits (MIMIC's) tend to get more and more difficult at millimeter-wave frequencies due to the increased influence of discontinuities and tolerances, especially in conjunction with temperature and hermetic sealing. To overcome these problems, a novel concept is proposed based on electromagnetic field coupling. On this basis, coupling structures for feed-throughs out of a package, as well as chip interconnects have been designed, fabricated, and tested in a scaled frequency range and in the original millimeter-wave frequency range showing good results with acceptable tolerance requirements.
The evolution of interconnection technology at IBM. J. G. RYAN, R, M, GEFFKEN, N. R. POULINand J. R. PARASZCZAK.I B M J. Res. Develop., 1995, 39(4), 371. Advances in interconnection technology have played a key role in allowing continued improvements in integrated circuit density, performance, and cost.
World abstracts on microelectronics and reliability IBM contributions to interconnection technology over approximately the last ten generations of semiconductor products are reviewed. The development of a planar, back-end-of-line (BEOL) technology, used in IBM DRAM, bipolar, and CMOS logic products since 1988, has led to a threefold increase in the number of wiring levels, aggressive wiring pitches at all interconnection levels, and high-leverage design options such as stacked contacts and vias. Possible future BEOL technologies are also discussed, with emphasis on the use of higher-conductivity wiring and lower-dielectric-constant insulators. It is expected that their use will result in higher performance and reliability. Applications include future, lowerpower devices, as well as more cost-effective, higher-performance versions of present-day designs.
VLSI on-chip interconnection performance simulations and measurements. D. C. EDELSTEIN, G. A. SAI-HALASZand Y.-J. MII. IBM J. Res. Develop., 1995, 39(4), 383. We examine electrical performance issues associated with advanced VLSI semiconductor on-chip interconnections or "interconnects." Performance can be affected by wiring geometry, materials, and processing details, as well as by processor-level needs. Simulations and measurements are used to study details of interconnect and insulator electrical properties, pulse propagation, and CPU cycle-time estimation, with particular attention to potential advantages of advanced materials and processes for wiring of high-performance CMOS microprocessors. Detailed performance improvements are presented for migration to copper wiring, low-E dielectrics, and scaled-up interconnects on the final levels for long-line signal propagation. Effect of PCB finish on the reliability and wettability of ball grid array packages. EDWIN BRADLEYand KINGSHUK BANERJI. [EEE Transactions on Components, Packaging and Manufacturing Technology-Part B, 1996, 19(2), 320. Organic protective coatings (OPC) and metallic plating chemistries have emerged as alternatives to traditional hot air solder leveling (HASL) to ensure the solderability of printed circuit boards (PCB). This study examined a number of commercially-available printed circuit board finishes to determine their intrinsic solderability and their effect on the solder joint reliability of ball grid array (BGA) packages. The PCB finishes included OPC (Entek Plus CU-106A and MEC-seal), immersion Au over electroless Ni (LeaRonal, MacDermid, Shipley, and Technique), electroless Pd over Ni, electroless Sn over Cu, immersion Bi over Cu, and HASL. Solderability tests were performed by reflowing 20-mil diameter solder spheres on variously aged test coupons and then quantitatively measuring the area and shape of the solder after cooling. The immersion Au finishes generally exhibited excellent wettability as a function of N2 reflow aging as compared with the OPC's and HASL. The Pd-Ni, Sn, and one of the
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Ni-Au finishes exhibited poor wetting when exposed to an 85°C/85% RH environment. Solder joint reliability was measured for a 41 I/O ceramic BGA using cyclic thermal shock (nominally - 55-125°C) and three point bending. All finishes tested behaved similarly in thermal shock. The Au finishes generally performed worse in three-point bending as compared to OPC and HASL. The wetting and reliability results are correlated with the structure and composition of the finishes and the solder joints.
Corrosion and adhesion of multilayer pad structures for packaging applications. GERALD S. FRANKEL, SAMP A T H PURUSHOTHAMAN, TINA A. PETERSEN, SHAJI FAROOQ, SRINI N. REDDY and VLASTABRUSIC. IEEE
Transactions on Components, Packaging and Manufacturing Technology--Part B, 1995, 18(4), 709. Corrosion resistance and adhesive strength for different multilayer pad structures used in electronic packaging applications are examined. In particular, multilayer pad structures with Cr/Cu interfaces are compared to similar Cr/Ni/Cu structures containing a layer of Ni between the Cr and Cu layers. Structures with Cr/Cu interfaces are found to be susceptible to delamination following exposure to highly corrosive conditions. Corrosion apparently results in the formation of crack initiators at the edge of the multilayer pad structure. Ni interlayers between the Cr and Cu layers very effectively reduce this susceptibility to delamination because mutual solubility of Ni with both Cr and Cu causes better adhesive strength by interlocking of the layers. Improved yield and performance of ball-grid array packages: design and processing guidelines for uniform and nonuniform arrays. STEPHENM. HEINR1CH,SHILAK SHAKYA,YANHUAWANG, PING S. LEE and SCOTT A. SCHROEDER. ]EEE Transactions on Components,
Packaging and Manufacturing Technology--Part B, 1996, 19(2), 310. Two models are presented for analyzing ball-grid array (BGA) solder interconnects: (a) a model for predicting solder joint geometries after an upright or inverted reflow process and (h) a reliability model for estimating maximum shear strain and fatigue life under a global thermal mismatch load condition. The reliability model includes a newly derived closed-form expression relating the maximum shear strain in a solder joint to the load, material, and joint shape parameters. The models are used to generate design/processing guidelines that may be used to improve the yield of a BGA soldering operation and the in-service reliability of the interconnect. Potential benefits of using a nonuniform array (i.e. one including joints of different size and shape) are explored. Modeling and analysis of mnitichip module power supply planes. KEUNMYUNG LEE and ALAN BARBER. 1EEL Transactions on Components, Packaging, and ManuJbcturing Technology--Part B, i 995, 18(4), 628. A method that would allow accurate modeling of