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Ge interface quality
ARTICLE IN PRESS
Materials Science in Semiconductor Processing 9 (2006) 679–684
Thin epitaxial Si films as a passivation method for Ge(1 0 0): Influence of deposition temperature on Ge surface segregation and the high-k/Ge interface quality F.E. Leysa,, R. Bonzoma,b, B. Kaczera, T. Janssensa, W. Vandervorsta,b, B. De Jaegera, J. Van Steenbergena, K. Martensa,b, D. Hellina,b, J. Ripa, G. Dilliwaya, A. Delabiea, P. Zimmermana,d, M. Houssaa, A. Theuwisc, R. Looa, M. Meurisa, M. Caymaxa, M.M. Heynsa,b a IMEC, Kapeldreef 75, B-3001 Leuven, Belgium KU Leuven, Kasteelpark Arenberg 10, B-3001 Leuven, Belgium c Umicore, Watertorenstraat 33, B-2250 Olen, Belgium d Intel Corporation Assignee at IMEC, Belgium
b
Available online 15 September 2006
Abstract Epitaxial fully strained Si films are known to form an effective passivation of the Ge(1 0 0) surface. However, we show using low-energy secondary ion mass spectrometry (SIMS) that considerable Ge surface segregation occurs for Si films grown from SiH4 at 500 1C. In this study, we develop an alternative deposition process at 350 1C using Si3H8 which significantly decreases the Ge peak at the Si surface. We attribute this strong reduction mainly to the fact that growth at 350 1C from trisilane proceeds below the Si–H desorption temperature. Charge pumping measurements on n-type Ge devices show a reduction by approximately a factor three in the high-k/substrate interface trap density for the samples with 350 1C Si passivation, compared to those using a Si passivation deposited at 500 1C. r 2006 Elsevier Ltd. All rights reserved. Keywords: Ge mosfet; Si-passivation; Epitaxy; Surface segregation
1. Introduction Germanium is a potential and promising candidate for future PMOS devices because of the high hole mobility. One of the key requirements for the successful use of this material for MOS-applications concerns its possible integration with high-k materiCorresponding author. Tel.: +32 16 281 497; fax: +32 16 281 214. E-mail address: [email protected] (F.E. Leys).
1369-8001/$ - see front matter r 2006 Elsevier Ltd. All rights reserved. doi:10.1016/j.mssp.2006.08.034
als. However, most of the current high-k materials suffer from a high trap density Nit at their interface with Ge [1]. (By Nit we denote the total number of interface traps, per cm2.) The precise origin of these interface states is currently under investigation, but it is generally believed that the formation of Ge–O bonds or Ge–O–Hf bonds is responsible for energy levels in the band gap. For the HfO2/Ge interface, a fully strained epitaxial Si film at the interface was shown to strongly reduce Nit, and the best result (5 1011 cm2, from capacitance measurements)
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F.E. Leys et al. / Materials Science in Semiconductor Processing 9 (2006) 679–684
was obtained for a thickness of four monolayers (ML, 1 ML ¼ 6.25 1014 cm2). Growth of these Si-films was done using SiH4 at 500 1C [2]. The optimized value of Nit, however, still remains considerably higher than expected. A possible and straightforward explanation is Ge surface segregation during Si growth. In this work, we show that segregation occurs and that it is strongly reduced when considerably lowering the Si deposition temperature. This also leads to a significant reduction in Nit, thus further supporting our starting hypothesis. We start in Section 2 by exploring how far the deposition temperature can be lowered, first using SiH4, then also using Si3H8 (commercially available as Silcores). In Section 3, we report on a qualitative assessment of the Ge profile in the Si layers using secondary ion mass spectrometry (SIMS). Section 4 summarizes the results from the electrical characterization on P-MOSFETS and Section 5 ends the paper with the main conclusions and future directions. 2. Growth kinetics of thin Si films on Ge(1 0 0) from SiH4 and Si3H8 2.1. Experimental setup All experiments were done in a cold-wall singlewafer AP/RP ASM Epsilon 2000s reactor with rectangular tube. The samples were either 4 in ptype Ge(1 0 0) wafers from Umicore (for the growth rate experiments and SIMS analysis) or 8 in Ge on Si wafers provided by ASM (devices). Prior to
deposition all wafers received a 2% HF-dip, followed by a DI-water rinse and a dry under N2 atmosphere. After loading at Tp250 1C, a 100 in situ bake in H2 ambient at 650 1C was given to remove any remaining oxide. All growth was done at a total pressure of 5.3 103 Pa (40 torr), using N2 as a carrier gas. The Si thickness of these very thin layers was calculated from the dose as obtained from total reflection X-ray fluorescence (TXRF). An accurate calibration of the TXRF measurement for thicknesses below 1 nm is difficult and currently still in progress. Based on comparative SIMS measurements, the real values could be systematically up to a factor two higher. This, however, does not influence any of the main conclusions reached in this work. 2.2. Low temperature results from SiH4 Fig. 1 shows the Si dose as a function of deposition time for growth from SiH4 at 500 and 450 1C, for a constant SiH4 partial pressure of 4 Pa (30 mtorr). The growth rate is expected to decrease exponentially with temperature in this region, and from TXRF we indeed observe a strong decrease in the initial growth rate from 0.5 nm/min at 500 1C, to a mere 0.08 nm/min at 450 1C. Note that in both cases, the average growth rate gradually decreases with total thickness. This is a transient effect, since at 500 1C we find for thicknesses above 2 nm that the growth rate again increases. We demonstrate elsewhere [3] that the intermediate plateau is related to the switch from epitaxial to amorphous growth. As discussed in [3],
Fig. 1. Thickness vs. deposition time of Si on Ge(1 0 0) from SiH4 at 450 and 500 1C, as converted from the TXRF dose (2.5 1015 cm2 ¼ 0.5 nm). The 500 1C data refers to the bottom axis, the 450 1C data to the top one.
ARTICLE IN PRESS F.E. Leys et al. / Materials Science in Semiconductor Processing 9 (2006) 679–684
this switch is probably induced by the changing Ge content at the growing surface, which, as we show in Section 3, can be expected to decrease with increasing Si thickness. At 350 1C, growth from SiH4 on Ge was found to be self-limiting (Fig. 2). The surface coverage is shown to stabilize (slowly) with time around 7 1014 cm2, i.e. approximately one ML. This observation is consistent with results previously reported in literature [4,5], where growth on Ge(1 0 0) from SiH4 at 350 1C (or lower) is used as the first step in an atomic layer epitaxy process of Si on Ge. This self-limiting behavior is directly related to the changing H-coverage during growth. At 350 1C, the initial Ge surface is free of H, thus allowing growth of the first Si ML to proceed. However, due to the higher bond strength of the Si–H bond (3.42 eV) compared to the Ge–H bond (3.12 eV), the H coming from the dissociation of SiH4 remains on the Si surface at 350 1C, and growth is limited after the first Si ML is formed, since SiH4 does not adsorb further onto Hterminated surface sites. 2.3. Low temperature results from Si3H8 In order to reach a Si thickness of four MLs at these very low temperatures, a different precursor is required. Fig. 3 shows TXRF results for growth from Si3H8 at 400 and 350 1C. Reasonable growth rates are achieved at both temperatures, and the growth process at 350 1C is not self-limiting. This result strongly suggests trisilane adsorbs on Hpassivated surface sites. The growth curve at 350 1C shows a similar plateau to that observed using SiH4. The two data points at 400 1C are already on the plateau of the growth regime at that temperature.
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A more exhaustive study of the growth kinetics from Si3H8 on Ge is currently in progress. 3. Characterization of the Ge profile in the Si films using SIMS and discussion Although the extremely thin Si layers on top of Ge are a real challenge to measure, the use of a low energy O+ beam (250 eV) at normal incidence 2 results in enough depth resolution to qualitatively assess the temperature dependent variations of the Ge profiles in Si [6]. The ionization probabilities and erosion rate are strongly matrix dependent, preventing an easy conversion from intensity to concentration and time to depth for this multilayer system. To get an approximate idea of the depth, the erosion rate in bulk Si was used for the full multilayer. The intensity vs. depth profiles are shown in Fig. 4 for Si on Ge layers grown with SiH4 at 500 1C and Si3H8 at 350 1C. Both profiles are matched at their respective Si/Ge interface, as determined from TXRF. Note that the ratio of the Si to Ge ion intensity is not representative for the actual concentration ratio in the solid due to the aforementioned matrix dependent ionization effects. Both these Ge profiles clearly show an apparent Ge diffusion into the Si film combined with a clear Gepeak at the surface, suggesting that Ge surface segregation occurs during growth. Prior to interpreting these results one should note that the ion beam mixing process during the SIMS analysis may induce some ‘‘artificial’’ Ge-pile up at the surface [7]. When considering the strength of this pile-up, it was shown that for a single growth temperature, the Ge peak decreases with increasing Si layer thickness. This could reflect a reduced Ge-surface segregation and/or a reduced surface transport, as the Si/Ge
Fig. 2. Coverage vs. deposition time of Si on Ge(1 0 0) from SiH4 at 350 1C from TXRF. The deposition is self-limiting after one monolayer.
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Fig. 3. Thickness vs. deposition time of Si on Ge(1 0 0) from Si3H8 at 350 and 400 1C, as converted from the TXRF dose. The 350 1C data refers to the bottom axis, the 400 1C data to the top one. The Si3H8 mass-flow was in both cases 100 mg/min. Deposition from Si3H8 is not self-limiting below the Si–H desorption temperature.
lon intensity
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depth (nm) Fig. 4. Raw SIMS data of Ge samples passivated with Si at 350 (solid line) and 500 1C (circles). The depth scale is approximate and based on the erosion speed of bulk Si 0.25 nm/min. The thickness of the Si film as derived from TXRF is 0.64 nm (3.2e15 atoms/cm2) and 1.14 nm (5.7e15 atoms/cm2), respectively, and the SIMS profiles for both samples are matched at their respective Si/Ge interfaces. The 350 1C sample shows a reduced Ge peak at the top surface compared to the 500 1C sample, as well as steeper indiffusion profiles.
boundary will be located deeper relative to the extent of the mixing front. Notwithstanding these limitations a relevant relative comparison of the profiles for the different temperatures is possible. The Ge surface peak is considerably smaller at 350 1C compared to 500 1C, despite the fact that the Si-layer grown at 350 1C is also thinner (which thus would lead to a larger SIMS-related surface peak). The latter indicates that the temperature dependence is real. Note that the 4 in pure Ge substrates on which these experiments were done were first coated with 100 nm of poly-Si on the backside, to avoid cross contamination of Ge from the backside of the wafer
through the gas phase during growth of the thin epitaxial Si passivating film on top. The reasons for the decrease in the Ge surface peak with temperature are probably two-fold. On the one hand, normal solid-state diffusion of Ge in Si is expected to decrease exponentially with temperature. On the other hand, as discussed in Refs. [2,7], the main driving force for Ge surface segregation during Si growth is the fact that the Ge surface energy is lower compared to that of Si. This is, however, only true in the absence of H-passivation, and since for growth with Si3H8 at 350 1C the growing Si surface is expected to be fully H-passivated at all times (see Fig. 2), we expect surface segregation to be strongly
ARTICLE IN PRESS F.E. Leys et al. / Materials Science in Semiconductor Processing 9 (2006) 679–684
reduced compared to growth from SiH4 at 500 1C. From the present study, it is, however, not possible to deduce how much of the observed reduction in the Ge surface peak is related to temperature, and how much to the reduced surface energy. A more detailed comparison at intermediate temperatures is required for this. 4. Electrical characterization through charge pumping (CP) measurements The electrical characterization of devices was carried out on n-type Ge with four MLs of Si grown at 350 and 500 1C, respectively. Further gate-stack processing is identical and consists first of the partial oxidation of the upper most ML of Si to 0.4 nm SiO2 through a rinse in a O3/H2O solution. The oxidation provides O–H bonds at the surface which greatly facilitates a 2D atomic layer deposition (ALD) of the high-k layer. More importantly, similar to the high-k/Si interface, an SiO2 interlayer can serve to screen the channel from soft-phonons present at the interface with the high-k. This approach sets the lower limit for Nit to that of a perfect and strained Si/SiO2 interface. Note that recent work [8] showed that tensile-strained Si has a better match with SiO2 compared to relaxed Si. ALD was then used to grow 4 nm of HfO2 at 300 1C, followed by a TaN/TiN metal-gate deposition. No post deposition anneal was done. The resulting CET at a surface voltage of 1.5 V and 10 kHz frequency is on average (1.4270.02) nm, independent of the Si deposition temperature. CP measurements were done to estimate Nit on 10 10 mm2 P-MOSFETs using this gate stack. In this measurement, source, drain and substrate are grounded, and a constant base voltage Vbase is applied to the gate. Superposed on Vbase is an oscillating voltage Vamp, with frequency f and a fixed amplitude of 0.7 V. As the device is swept between inversion and accumulation, charges supplied from source and drain are captured by interface traps and emitted into the substrate. This so-called CP current is thus directly proportional to the total number of interface defects Nit. More details on the CP method can be found in [9]. As an approximate measure for the more commonly used quantity Dit, (number of interface traps per cm2 and per eV) one can assume DitENit/0.67 eV. This approximation, however, assumes a constant Dit over the bandgap, which was shown not to be a good approximation for Ge, at least not at 80 K (see
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also Ref. [10]). Because of the increased junction leakage, the CP-current could only be accurately extracted at megahertz frequencies and, consequently, only the fast traps were assessed. Fig. 5 shows the results on samples passivated at 500 and 350 1C, respectively. A clear reduction from 1.5 1011 to 5 1010 cm2 in interface states is observed when going from 500 to 350 1C. This trend is confirmed in the conductance component G of the CV measurements on the same samples (not shown). For the 500 1C passivation, peaks in the conductance are apparent at f 1 MHz, corresponding to approx. 2 1011 cm2 interface states, in good agreement with the result from CP measurements. For the 350 1C sample, no peaks can be discerned. Note, however, that the possibility of additional interface states close to band edges cannot be excluded [10].
5. Conclusions and future directions Epitaxial fully strained Si layers have been shown to strongly reduce the interface trap density Nit between Ge(1 0 0) and HfO2 [1]. The main results of the present work suggest strongly that the remaining interface trap density of 1.5 1011 cm2 is directly related to Ge present at the top surface of the Si film, and that this Ge results from a surface segregation effect during growth of the Si film. We show that the surface segregation is reduced significantly by growing at considerably lower temperatures (350 1C or lower), but this inevitably requires the use of higher order silanes, such as Si3H8. A much broader physical characterization of these low temperature Si-films, using among others high resolution cross-section TEM and RHEED, is currently ongoing and is expected to shed more light on the good result for Nit obtained in this work, and how it compares to the results at 500 1C. Also the effect on Ge updiffusion of thermal steps further down the flow, such as the dopant activation anneal, will be investigated. Electrically, the present study is being extended also to NMOS. The effect on mobility for both Pand NMOS will be examined. As to the fundamental origin of the interface states, ab initio studies using density functional theory are currently in progress to clarify the nature of the Ge–O bond at the Ge surface.
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Fig. 5. A significant reduction in interface state density is observed in charge pumping data on the 500 1C (a) and 350 1C (b) samples (Vamp ¼ 0.7 V, trise ¼ tfall ¼ 100 ns). The charge pumping current has been corrected for junction leakage. Good scaling with frequency is observed. The leading edge corresponds to VFB–Vamp. A flat band shift of about 0.3 V (typical value) between 500 1C (a) and 350 1C (b) is apparent.
Acknowledgments The authors are grateful to ASM for providing epitaxial Ge on Si layers and Voltaix for providing us with Silcores (Silcores is a proprietary ASM version of specifically purified and packaged Si3H8). References [1] De Jaeger B, et al. MicroElectron Eng 2005;80:82. [2] Leys FE, et al. Thin Solid Films 2006;508:292.
[3] R. Bonzom et al., In preparation. [4] Watanabe T, Sakuraba M, Matsuura T, Murota J. Jpn J Appl Phys 1997;36:4042. [5] Ikeda K, Sugahara S, Ichida Y, Nagai T, Matsumura M. Jpn J Appl Phys 1998;37:1311. [6] Vandervorst W, Janssens T, Buyuklimanli T, Kimura K. SIMS-XV, Manchester, 2005 [abstract only]. [7] Tsu R, Xiao HZ, Kim Y-W, Hasan M-A, Birnbaum HK, Greene JE, et al. J Appl Phys 1994;75:240. [8] Stesmans A, Somers P, Afanas’ev VV. Appl Phys Lett, submitted for publication. [9] Groeseneken G, Maes HE, Beltran N, De Keersmaecker RF. IEEE Trans Electron Devices 1984;31:42. [10] Martens K, et al. IEEE Electron Device Lett 2006;27:405.
Materials Science in Semiconductor Processing 9 (2006) 679–684
Thin epitaxial Si films as a passivation method for Ge(1 0 0): Influence of deposition temperature on Ge surface segregation and the high-k/Ge interface quality F.E. Leysa,, R. Bonzoma,b, B. Kaczera, T. Janssensa, W. Vandervorsta,b, B. De Jaegera, J. Van Steenbergena, K. Martensa,b, D. Hellina,b, J. Ripa, G. Dilliwaya, A. Delabiea, P. Zimmermana,d, M. Houssaa, A. Theuwisc, R. Looa, M. Meurisa, M. Caymaxa, M.M. Heynsa,b a IMEC, Kapeldreef 75, B-3001 Leuven, Belgium KU Leuven, Kasteelpark Arenberg 10, B-3001 Leuven, Belgium c Umicore, Watertorenstraat 33, B-2250 Olen, Belgium d Intel Corporation Assignee at IMEC, Belgium
b
Available online 15 September 2006
Abstract Epitaxial fully strained Si films are known to form an effective passivation of the Ge(1 0 0) surface. However, we show using low-energy secondary ion mass spectrometry (SIMS) that considerable Ge surface segregation occurs for Si films grown from SiH4 at 500 1C. In this study, we develop an alternative deposition process at 350 1C using Si3H8 which significantly decreases the Ge peak at the Si surface. We attribute this strong reduction mainly to the fact that growth at 350 1C from trisilane proceeds below the Si–H desorption temperature. Charge pumping measurements on n-type Ge devices show a reduction by approximately a factor three in the high-k/substrate interface trap density for the samples with 350 1C Si passivation, compared to those using a Si passivation deposited at 500 1C. r 2006 Elsevier Ltd. All rights reserved. Keywords: Ge mosfet; Si-passivation; Epitaxy; Surface segregation
1. Introduction Germanium is a potential and promising candidate for future PMOS devices because of the high hole mobility. One of the key requirements for the successful use of this material for MOS-applications concerns its possible integration with high-k materiCorresponding author. Tel.: +32 16 281 497; fax: +32 16 281 214. E-mail address: [email protected] (F.E. Leys).
1369-8001/$ - see front matter r 2006 Elsevier Ltd. All rights reserved. doi:10.1016/j.mssp.2006.08.034
als. However, most of the current high-k materials suffer from a high trap density Nit at their interface with Ge [1]. (By Nit we denote the total number of interface traps, per cm2.) The precise origin of these interface states is currently under investigation, but it is generally believed that the formation of Ge–O bonds or Ge–O–Hf bonds is responsible for energy levels in the band gap. For the HfO2/Ge interface, a fully strained epitaxial Si film at the interface was shown to strongly reduce Nit, and the best result (5 1011 cm2, from capacitance measurements)
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F.E. Leys et al. / Materials Science in Semiconductor Processing 9 (2006) 679–684
was obtained for a thickness of four monolayers (ML, 1 ML ¼ 6.25 1014 cm2). Growth of these Si-films was done using SiH4 at 500 1C [2]. The optimized value of Nit, however, still remains considerably higher than expected. A possible and straightforward explanation is Ge surface segregation during Si growth. In this work, we show that segregation occurs and that it is strongly reduced when considerably lowering the Si deposition temperature. This also leads to a significant reduction in Nit, thus further supporting our starting hypothesis. We start in Section 2 by exploring how far the deposition temperature can be lowered, first using SiH4, then also using Si3H8 (commercially available as Silcores). In Section 3, we report on a qualitative assessment of the Ge profile in the Si layers using secondary ion mass spectrometry (SIMS). Section 4 summarizes the results from the electrical characterization on P-MOSFETS and Section 5 ends the paper with the main conclusions and future directions. 2. Growth kinetics of thin Si films on Ge(1 0 0) from SiH4 and Si3H8 2.1. Experimental setup All experiments were done in a cold-wall singlewafer AP/RP ASM Epsilon 2000s reactor with rectangular tube. The samples were either 4 in ptype Ge(1 0 0) wafers from Umicore (for the growth rate experiments and SIMS analysis) or 8 in Ge on Si wafers provided by ASM (devices). Prior to
deposition all wafers received a 2% HF-dip, followed by a DI-water rinse and a dry under N2 atmosphere. After loading at Tp250 1C, a 100 in situ bake in H2 ambient at 650 1C was given to remove any remaining oxide. All growth was done at a total pressure of 5.3 103 Pa (40 torr), using N2 as a carrier gas. The Si thickness of these very thin layers was calculated from the dose as obtained from total reflection X-ray fluorescence (TXRF). An accurate calibration of the TXRF measurement for thicknesses below 1 nm is difficult and currently still in progress. Based on comparative SIMS measurements, the real values could be systematically up to a factor two higher. This, however, does not influence any of the main conclusions reached in this work. 2.2. Low temperature results from SiH4 Fig. 1 shows the Si dose as a function of deposition time for growth from SiH4 at 500 and 450 1C, for a constant SiH4 partial pressure of 4 Pa (30 mtorr). The growth rate is expected to decrease exponentially with temperature in this region, and from TXRF we indeed observe a strong decrease in the initial growth rate from 0.5 nm/min at 500 1C, to a mere 0.08 nm/min at 450 1C. Note that in both cases, the average growth rate gradually decreases with total thickness. This is a transient effect, since at 500 1C we find for thicknesses above 2 nm that the growth rate again increases. We demonstrate elsewhere [3] that the intermediate plateau is related to the switch from epitaxial to amorphous growth. As discussed in [3],
Fig. 1. Thickness vs. deposition time of Si on Ge(1 0 0) from SiH4 at 450 and 500 1C, as converted from the TXRF dose (2.5 1015 cm2 ¼ 0.5 nm). The 500 1C data refers to the bottom axis, the 450 1C data to the top one.
ARTICLE IN PRESS F.E. Leys et al. / Materials Science in Semiconductor Processing 9 (2006) 679–684
this switch is probably induced by the changing Ge content at the growing surface, which, as we show in Section 3, can be expected to decrease with increasing Si thickness. At 350 1C, growth from SiH4 on Ge was found to be self-limiting (Fig. 2). The surface coverage is shown to stabilize (slowly) with time around 7 1014 cm2, i.e. approximately one ML. This observation is consistent with results previously reported in literature [4,5], where growth on Ge(1 0 0) from SiH4 at 350 1C (or lower) is used as the first step in an atomic layer epitaxy process of Si on Ge. This self-limiting behavior is directly related to the changing H-coverage during growth. At 350 1C, the initial Ge surface is free of H, thus allowing growth of the first Si ML to proceed. However, due to the higher bond strength of the Si–H bond (3.42 eV) compared to the Ge–H bond (3.12 eV), the H coming from the dissociation of SiH4 remains on the Si surface at 350 1C, and growth is limited after the first Si ML is formed, since SiH4 does not adsorb further onto Hterminated surface sites. 2.3. Low temperature results from Si3H8 In order to reach a Si thickness of four MLs at these very low temperatures, a different precursor is required. Fig. 3 shows TXRF results for growth from Si3H8 at 400 and 350 1C. Reasonable growth rates are achieved at both temperatures, and the growth process at 350 1C is not self-limiting. This result strongly suggests trisilane adsorbs on Hpassivated surface sites. The growth curve at 350 1C shows a similar plateau to that observed using SiH4. The two data points at 400 1C are already on the plateau of the growth regime at that temperature.
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A more exhaustive study of the growth kinetics from Si3H8 on Ge is currently in progress. 3. Characterization of the Ge profile in the Si films using SIMS and discussion Although the extremely thin Si layers on top of Ge are a real challenge to measure, the use of a low energy O+ beam (250 eV) at normal incidence 2 results in enough depth resolution to qualitatively assess the temperature dependent variations of the Ge profiles in Si [6]. The ionization probabilities and erosion rate are strongly matrix dependent, preventing an easy conversion from intensity to concentration and time to depth for this multilayer system. To get an approximate idea of the depth, the erosion rate in bulk Si was used for the full multilayer. The intensity vs. depth profiles are shown in Fig. 4 for Si on Ge layers grown with SiH4 at 500 1C and Si3H8 at 350 1C. Both profiles are matched at their respective Si/Ge interface, as determined from TXRF. Note that the ratio of the Si to Ge ion intensity is not representative for the actual concentration ratio in the solid due to the aforementioned matrix dependent ionization effects. Both these Ge profiles clearly show an apparent Ge diffusion into the Si film combined with a clear Gepeak at the surface, suggesting that Ge surface segregation occurs during growth. Prior to interpreting these results one should note that the ion beam mixing process during the SIMS analysis may induce some ‘‘artificial’’ Ge-pile up at the surface [7]. When considering the strength of this pile-up, it was shown that for a single growth temperature, the Ge peak decreases with increasing Si layer thickness. This could reflect a reduced Ge-surface segregation and/or a reduced surface transport, as the Si/Ge
Fig. 2. Coverage vs. deposition time of Si on Ge(1 0 0) from SiH4 at 350 1C from TXRF. The deposition is self-limiting after one monolayer.
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Fig. 3. Thickness vs. deposition time of Si on Ge(1 0 0) from Si3H8 at 350 and 400 1C, as converted from the TXRF dose. The 350 1C data refers to the bottom axis, the 400 1C data to the top one. The Si3H8 mass-flow was in both cases 100 mg/min. Deposition from Si3H8 is not self-limiting below the Si–H desorption temperature.
lon intensity
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1000 0
0.5
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3
depth (nm) Fig. 4. Raw SIMS data of Ge samples passivated with Si at 350 (solid line) and 500 1C (circles). The depth scale is approximate and based on the erosion speed of bulk Si 0.25 nm/min. The thickness of the Si film as derived from TXRF is 0.64 nm (3.2e15 atoms/cm2) and 1.14 nm (5.7e15 atoms/cm2), respectively, and the SIMS profiles for both samples are matched at their respective Si/Ge interfaces. The 350 1C sample shows a reduced Ge peak at the top surface compared to the 500 1C sample, as well as steeper indiffusion profiles.
boundary will be located deeper relative to the extent of the mixing front. Notwithstanding these limitations a relevant relative comparison of the profiles for the different temperatures is possible. The Ge surface peak is considerably smaller at 350 1C compared to 500 1C, despite the fact that the Si-layer grown at 350 1C is also thinner (which thus would lead to a larger SIMS-related surface peak). The latter indicates that the temperature dependence is real. Note that the 4 in pure Ge substrates on which these experiments were done were first coated with 100 nm of poly-Si on the backside, to avoid cross contamination of Ge from the backside of the wafer
through the gas phase during growth of the thin epitaxial Si passivating film on top. The reasons for the decrease in the Ge surface peak with temperature are probably two-fold. On the one hand, normal solid-state diffusion of Ge in Si is expected to decrease exponentially with temperature. On the other hand, as discussed in Refs. [2,7], the main driving force for Ge surface segregation during Si growth is the fact that the Ge surface energy is lower compared to that of Si. This is, however, only true in the absence of H-passivation, and since for growth with Si3H8 at 350 1C the growing Si surface is expected to be fully H-passivated at all times (see Fig. 2), we expect surface segregation to be strongly
ARTICLE IN PRESS F.E. Leys et al. / Materials Science in Semiconductor Processing 9 (2006) 679–684
reduced compared to growth from SiH4 at 500 1C. From the present study, it is, however, not possible to deduce how much of the observed reduction in the Ge surface peak is related to temperature, and how much to the reduced surface energy. A more detailed comparison at intermediate temperatures is required for this. 4. Electrical characterization through charge pumping (CP) measurements The electrical characterization of devices was carried out on n-type Ge with four MLs of Si grown at 350 and 500 1C, respectively. Further gate-stack processing is identical and consists first of the partial oxidation of the upper most ML of Si to 0.4 nm SiO2 through a rinse in a O3/H2O solution. The oxidation provides O–H bonds at the surface which greatly facilitates a 2D atomic layer deposition (ALD) of the high-k layer. More importantly, similar to the high-k/Si interface, an SiO2 interlayer can serve to screen the channel from soft-phonons present at the interface with the high-k. This approach sets the lower limit for Nit to that of a perfect and strained Si/SiO2 interface. Note that recent work [8] showed that tensile-strained Si has a better match with SiO2 compared to relaxed Si. ALD was then used to grow 4 nm of HfO2 at 300 1C, followed by a TaN/TiN metal-gate deposition. No post deposition anneal was done. The resulting CET at a surface voltage of 1.5 V and 10 kHz frequency is on average (1.4270.02) nm, independent of the Si deposition temperature. CP measurements were done to estimate Nit on 10 10 mm2 P-MOSFETs using this gate stack. In this measurement, source, drain and substrate are grounded, and a constant base voltage Vbase is applied to the gate. Superposed on Vbase is an oscillating voltage Vamp, with frequency f and a fixed amplitude of 0.7 V. As the device is swept between inversion and accumulation, charges supplied from source and drain are captured by interface traps and emitted into the substrate. This so-called CP current is thus directly proportional to the total number of interface defects Nit. More details on the CP method can be found in [9]. As an approximate measure for the more commonly used quantity Dit, (number of interface traps per cm2 and per eV) one can assume DitENit/0.67 eV. This approximation, however, assumes a constant Dit over the bandgap, which was shown not to be a good approximation for Ge, at least not at 80 K (see
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also Ref. [10]). Because of the increased junction leakage, the CP-current could only be accurately extracted at megahertz frequencies and, consequently, only the fast traps were assessed. Fig. 5 shows the results on samples passivated at 500 and 350 1C, respectively. A clear reduction from 1.5 1011 to 5 1010 cm2 in interface states is observed when going from 500 to 350 1C. This trend is confirmed in the conductance component G of the CV measurements on the same samples (not shown). For the 500 1C passivation, peaks in the conductance are apparent at f 1 MHz, corresponding to approx. 2 1011 cm2 interface states, in good agreement with the result from CP measurements. For the 350 1C sample, no peaks can be discerned. Note, however, that the possibility of additional interface states close to band edges cannot be excluded [10].
5. Conclusions and future directions Epitaxial fully strained Si layers have been shown to strongly reduce the interface trap density Nit between Ge(1 0 0) and HfO2 [1]. The main results of the present work suggest strongly that the remaining interface trap density of 1.5 1011 cm2 is directly related to Ge present at the top surface of the Si film, and that this Ge results from a surface segregation effect during growth of the Si film. We show that the surface segregation is reduced significantly by growing at considerably lower temperatures (350 1C or lower), but this inevitably requires the use of higher order silanes, such as Si3H8. A much broader physical characterization of these low temperature Si-films, using among others high resolution cross-section TEM and RHEED, is currently ongoing and is expected to shed more light on the good result for Nit obtained in this work, and how it compares to the results at 500 1C. Also the effect on Ge updiffusion of thermal steps further down the flow, such as the dopant activation anneal, will be investigated. Electrically, the present study is being extended also to NMOS. The effect on mobility for both Pand NMOS will be examined. As to the fundamental origin of the interface states, ab initio studies using density functional theory are currently in progress to clarify the nature of the Ge–O bond at the Ge surface.
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F.E. Leys et al. / Materials Science in Semiconductor Processing 9 (2006) 679–684
Fig. 5. A significant reduction in interface state density is observed in charge pumping data on the 500 1C (a) and 350 1C (b) samples (Vamp ¼ 0.7 V, trise ¼ tfall ¼ 100 ns). The charge pumping current has been corrected for junction leakage. Good scaling with frequency is observed. The leading edge corresponds to VFB–Vamp. A flat band shift of about 0.3 V (typical value) between 500 1C (a) and 350 1C (b) is apparent.
Acknowledgments The authors are grateful to ASM for providing epitaxial Ge on Si layers and Voltaix for providing us with Silcores (Silcores is a proprietary ASM version of specifically purified and packaged Si3H8). References [1] De Jaeger B, et al. MicroElectron Eng 2005;80:82. [2] Leys FE, et al. Thin Solid Films 2006;508:292.
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