Au metallization scheme

Accepted Manuscript True ohmic contact on RF sputtered ZnO thin film by using the nonalloy Ti/Au metallization scheme Anniruddh Bahadur Yadav, Basavaraj S. Sannakashappanavar PII:

S0925-8388(18)33049-4

DOI:

10.1016/j.jallcom.2018.08.166

Reference:

JALCOM 47254

To appear in:

Journal of Alloys and Compounds

Received Date: 13 May 2018 Revised Date:

13 August 2018

Accepted Date: 17 August 2018

Please cite this article as: A.B. Yadav, B.S. Sannakashappanavar, True ohmic contact on RF sputtered ZnO thin film by using the nonalloy Ti/Au metallization scheme, Journal of Alloys and Compounds (2018), doi: 10.1016/j.jallcom.2018.08.166. This is a PDF file of an unedited manuscript that has been accepted for publication. As a service to our customers we are providing this early version of the manuscript. The manuscript will undergo copyediting, typesetting, and review of the resulting proof before it is published in its final form. Please note that during the production process errors may be discovered which could affect the content, and all legal disclaimers that apply to the journal pertain.

True Ohmic ContactACCEPTED on RF Sputtered ZnO Thin Film by using MANUSCRIPT the nonalloy Ti/Au Metallization Scheme Anniruddh Bahadur Yadava* and Basavaraj S.Sannakashappanavarb a

Department Electronics Communication Engineerin SVEC Tirupati, Andhra Pradesh b

Electronic Telicommunication Engineering ADCET, Ashta Maharastra, India

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India,

Abstract: Metal contact (Ohmic or Schottky) is vital for building different ZnO based IC compatible electronic devices. Literature has seen a tremendous development on metal

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contacts on this specific semiconductor by using a range of metallization scheme, but in all cases, ZnO film was very thick, highly doped, and deposited on Al2O3 substrate, even

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though this substrate is not appropriate for modern IC technology. For estimation of the specific contact resistance, transmission line method (TLM) has been used predominantly instead of Schottky barrier height (SBH) model, considering thermionic emission (TE) theory. However, SBH model is more realistic and furnishes accurate statistics of the

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distinct parameters of Ohmic contacts compared to TLM theory, where TLM gives only specific contact resistance. So, we are presenting the electrical properties of Ti/Au nonalloy Ohmic contact developed on 20 nm undoped RF sputtered ZnO thin film on SiO2/p-Si and

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SiO2/n-Si substrates using SBH model considering thermionic emission theory. Further, using X-ray diffraction, photo luminance, and scanning electron microscopy, we were

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investigated the crystal structure, energy band gap, and surface morphology of the thin film.

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And, current-voltage (I –V) data were measured using a semiconductor parameter analyzer. Barrier heights and other parameters of developed metallization scheme extracted from experimental I-V characteristics of the fabricated Ohmic contacts considering carrier

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transport at the interface is governed by thermionic emission theory. It can be found that the deviation in barrier heights which are estimated from semi -log current versus voltage (ln(I)–V) characteristics and extracted from Richardson plot, because of barrier

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inhomogeneity, series resistance, and actual contact area. To decrease this deviation we have analyzed the barrier heights after rectify the voltage axis by considering the series

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resistance, but series resistance correction alone is not sufficient. Finally, lowest specific contact resistance was achieved compared to any metallization scheme using Richardson plot, this approach and structure are first time reported specifically on ZnO. Keywords: ZnO thin film, RF Sputtering, Substrate, Specific Contact Resistance, Schottky

1. Introduction

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Barrier Height

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ZnO is an intrinsically n-type and direct wide band gap semiconductor material extensively used for gas sensing [1], optoelectronics [2], and electronic applications [3-4].

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For the fabrication of productive electronic devices (e.g., light emitting diode, solar cell, field effect transistor, etc.) using ZnO as an active element, Ohmic contact plays a dominating role. A large number of attempts have been made by the different research

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groups to get efficient Ohmic contact on ZnO thin film as well as bulk [5-20]. The variety of metallization schemes have been tested on ZnO films few cited below, in most cases, the substrates were: silicon, silicon carbide, and the sapphire instead of SiO2/Si [5-20], most

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substantially Al2O3, but this particular substrate is not compatible to modern IC technology. To get metallization scheme with low specific contact resistance particularly on undoped very thin ZnO is challenging, because of this all reports available till date only on Al-doped

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ZnO thin film. Toshimitsu Akane et al. [6] reported nonalloy Ohmic contact on hydrothermally grown 700 um thick, KrF excimer laser treated ZnO film. B. S. Kang et al.

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[9] studied the effect of KrF excimer laser treatment on PLD grown ZnO thin film, with

10 20 cm −3 carrier concentration. Han-Ki Kim et al. [12] demonstrated the Ohmic contact on Al-doped 1000 nm ZnO thin film. Recently Khalil Eslami et al. [19] published work on identification of the low specific contact resistance on solution processed aluminum doped

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ZnO thin film having carrier concentration 1019 cm −3 . Except Khalil Eslami et al. [19], who has used the Si substrate, others achieved low specific contact resistance by using Al2O3 as substrate. Whatever the substrate doping is prevalent in all reported work, and tunneling of

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the carrier across the interface was assumed to responsible for low specific contact resistances. But the fabrication of transistor either bottom gate or top gate is done over

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oxide layer mostly SiO2/Si, because this particular substrate is IC compatible, in such transistors drain and source are not deposited on Al-doped ZnO [21-24]. In most of the

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cases the thickness of ZnO thin films, which have been utilizing in the FET as a channel ranging from 10 nm to 50 nm [21-24]. Considering this efficient metallization scheme on sub-20 nm undoped ZnO (specifically not Al doped) thin film is essential. But no

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systematic study is available in the literature which provides information about the true metal contact on these sub-nanometer undoped ZnO thin films. Another critical issue is in the analysis of specific contact resistance specifically for metal deposited on ZnO;

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researchers have been estimated the specific contact resistance by using TLM, and CTLM models. These methods are different than the well established SBH model for analysis of

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metal/semiconductor contacts parameters considering thermionic emission theory responsible for carrier transport across the interface [26] and will provide better result compared to TLM, when inhomogeneity, series resistance, and contact area corrected. The TLM approach to estimate the specific contact resistance is time taking because the

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measurement of voltage and current from a number of unequally spaced contact is necessary [5-20]. Besides, many contact pads required in this method are not possible on nanoscale channel devices which are important for modern technology. Further, metal

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metallurgy optimized on thick ZnO are not suitable for nanoscale devices; also characteristics of semiconductors change largely at nanolevel, for example the Ohmic

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contact properties will change when same metallization scheme is deposited on bulk and single nanowire. Mask writing and printing is tedious and time consuming for such complex structures, which are necessary, if one should estimate the specific contact

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resistance by using TLM; in fact large number contacts are impossible on a single nanowire. However, with SBH method considering thermionic emission, estimation of specific contact resistance is straightforward, because it requires only two contacts and

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provides all the electrical properties of the contacts irrespective of Ohmic and rectifying metal and semiconductor junction [26]. For the measurement of contact resistance with the transmission line method one should plot resistance versus gap between the electrode graph

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and intercept as specific contact resistance intercept is at zero width not possible practically, but saturation current at zero voltage which is used to calculate the barrier

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height can be experimentally measured. Schottky barrier height can be measured using a number of the technique: capacitance voltage, photoelectric and atomic force microscope, so that contact specific resistance can be estimated with high accuracy.[22] In the transmission line method, the semiconductor resistance assumed to be zero, which is not

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practical [5-20]. Furthermore, doping is not a useful solution for nanoscale electronic devices, so prevalent doping for achieving low specific contact resistance is not suitable [21-24]. The solid Ohmic contact on ultra thin undoped ZnO thin film is essential for

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today's nanotechnology. Further SBH technique must use to analyze the specific contact resistance then only we would guess about modification required for improving the film

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quality, by oxygen plasma treatment, hydrogen peroxide treatment, changing the ZnO deposition technique. Many factors are affecting contact resistance calculated using SBH approach like barrier height inhomogeneity [3], active contact area [25] and series

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resistance [26]. Here for calculation of specific contact resistance for contacts on undoped ZnO thin film we have used SBH estimated before and after correcting the voltage axis considering the series resistance and extracted from Richardson plot, note that Richardson

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plot provides accurate barrier height. Furthermore, we have identified the negative barrier height from Richardson plot. This type of analysis for contact resistance is not reported anywhere by anyone, particularly on ZnO, here we are following the methods invented and

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adapted by researcher contributed largely to contact technology on Si, some of them are S.M. Zee, H.A. Bethe, C.R. Crowell, Schottky [27-32]. For metal contacts we have

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deposited different dimension five pair of Ti/Au nonalloy contact pads on 20 nm thin, undoped intrinsically n-type, RF sputtered ZnO thin film. We also identified the effect of substrate on electrical properties of the contact and found that substantial series resistance for the thin film deposited over the p-type silicon substrate. Using negative barrier height

reported till date.

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2. Experimental

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obtained from Richardson plot we have observed a lowest specific contact resistance

All the chemicals used in this experiment were purchased from Sigma Aldrich and used

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without further purification. For entire experiment deionized water was used with 18.2M Ωcm resistivity. All of the experiment processes such as substrate oxidation to form an oxide layer, ZnO deposition condition: like substrate temperature, chamber pressure, film

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thickness, and metal contact thickness, metal contact area were optimized to produce reliable Ohmic contacts. The complete processes present here. Two-inch diameter, p-type and n-type, <100> orientation, 4-7 ohm-cm resistivity, 275 µm thick silicon wafers were

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used as starting substrate for fabrication of devices. Before deposition of thin ZnO film ptype and n-type silicon wafers were cleaned by using RCA1 and RCA2 regulation, and dried in a hot vacuum oven at 1500 C. After cleaning 200 nm, thick silicon oxide layers

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were grown into these substrates by thermal oxidation at 11000C for 2 hours. The 200nm oxide thickness in each substrate was measured by using ellipsometer (Make SENTECH

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Instruments Model SE 800). Over these oxide layers, 20 nm ZnO thin films were deposited using specifically designed high-temperature epitaxy RF sputtering. The 20 nm ZnO thicknesses on each substrate were measured by the ellipsometer used previously for oxide layer thickness measurement. The details of deposition conditions of ZnO thin film were:

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4000 C substrates temperature, argon carrier gas, and 5x10-5 mbar base pressure level. The deposition was optimized in the following ways: a number of substrate temperatures were tested for identifying optimal temperature for thin film deposition, chamber pressure level

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varied to identify suitable one, carrier gas flow rate optimized, target cleaning, and plasma treatment of target before deposition, deposition rate, etc. The target and substrates distance

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was 14 cm, and the RF generator generated 100 W powers at 13.56 MHz frequency. The deposition was carried out very slowly (~ 3nm/min) and at elevated temperature to get the single crystal and smooth film.

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The device fabrication was completed in 3 photolithography steps. At first level mask alignment was done on ZnO/SiO2/Si substrates, in this LOR+PPR was spin coated and UV light exposed through dark field mask and developed in MF319 solution, developing time

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was 25 seconds. Cr/Au of 20/50 nm thickness was deposited on the developed pattern using thermal evaporation method; then the substrate was kept in PG remover to lift off the soft photoresist. In next step etching of thin film ZnO was done, for this PPR spin coated, and

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UV light exposed on it through white field mask and then developed using MF319 solution for 25sec, etching solution was HCl and DI water in the ratio of 1:30. The etch rate was

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measured at 2 nm/sec using profilometer. Finally, five pairs of Ti/Au (~20/50nm) metal scheme with different contact area were deposited by the E-beam evaporator, and patterned photoresist lift off following previously mentioned procedure to form MSM structure. The dimension of the metal contacts were measured with Olympus microscope and verified

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with the mask used to pattern them. At each level of lithography steps, the samples were cleaned using acetone and IPA for 5 minutes and rinsed in DI water and dried with N2. The fabricated contacts were not heat treated to get nonalloy metallization scheme and

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current-voltage (I-V) characteristics recorded on a (Proxima (Fast IV Measurement/ B1500A) parameter analyzer. The current density calculated by dividing the current by

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contact area measured from Olympus microscope. The surface topography of both ZnO thin films was observed using a field scanning electron microscope (SEM (EVO18 ZEISS, Oberkochen, Germany) and the crystal structure by XRD (Rigaku, Smart lab 3 KW )

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0

with Cu − Kα = 1.5406 A .

3. Result and discussion

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X-ray diffraction analyses of ZnO thin films deposited over n-type and p-type silicon substrate is depicted in Fig.1. One can see that the ZnO thin films over both the substrates exhibit the single crystal structure and the single peak corresponding to (002) crystalline

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phase of ZnO are observed as depicted in Fig.1 (a) with a small difference in peak intensity. The peak position in XRD pattern is exactly at 340 with 0.50 FWHM, the peak appearing

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wider because diffraction angle is very narrow. Some instrument generated noise is also appearing in the XRD pattern of the film. Optical properties of these thin films were investigated by recording the photoluminescence spectra. Figure 1(b) represents the photoluminescence (PL) spectra showing high-intensity peaks at 386 nm correspond to

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edge transition. PL spectra of both films are similar to each other as XRD pattern only difference in peak intensity. The visible region peaks are very low intensity compared to edge emission and not identified without suppressing the edge emission peak. The surface

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morphology of the as-grown ZnO thin films was analyzed using FESEM. The FESEM

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images of ZnO films over n-type and p-type silicon substrates are shown in Fig.1 (b-c). From FESEM images of ZnO thin films one can see a uniform deposition of ZnO nanoparticles over all the substrate. The sizes of these nanoparticles are 12 nm. All these

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results are similar because, after oxide growth in the p-type and n-type substrate, substrates become identical other than charge carrier inside the oxide layer and the interface of oxide and Si.

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The contact spacing was fixed at 140 µm and pads area varies as shown in Fig.2. The I-V characteristics of the contacts before and after correction of voltage axis are shown in Fig.3. From the I-V characteristics, we can see current injection through the contact is

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depending on the contact area. Also, one can see that current level is ten times larger for the

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contacts built over the n-type substrate than that of the contacts on p-type substrate.

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(d)

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(c)

(b)

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(a)

100nm

Mag.=400kX 100nm

Mag.=400kX

Fig.1 (a) The X-Ray diffraction patter of the ZnO thin films on n-type and p-type substrates (b) PL spectra of the ZnO thin films (c) the FESEM image of ZnO thin film n-type silicon substrate (d) the FESEM image of ZnO thin film p-type silicon

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Ti/Au

Ti/Au

(a)

(b)

ZnO

(d)

(f)

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(e)

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(c)

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n-type or p-type silicon

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Silicon oxide layer

Fig.2 (a) Schematic of the device (b) Olympus measured image of 65.65 µm*µ64.78um (c) 75 µm *262.59 µm (d) 51µm*457 µm (e ) 61 µm*50 6µ m (f) 62µm*689µm

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The trapped charge in the oxide layer might be responsible for the low injection of current, positive trap charges prevalent in the oxide grown in the p-type substrate.

(b)

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(a)

(d)

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(c)

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Fig.3 Current level (a) Current level before voltage axis correction for n-type substrate(c) Current level after voltage axis correction for n-type substrate (b)Current level before voltage axis correction for p-type substrate (d) Current level after voltage axis correction for p-type substrate

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SBH model considering thermionic emission theory instead of tunneling and TLM can be employed to analyze different parameter of this metallization Scheme because the film is undoped [22-32]. The current flowing through the metal semiconductor interface is given

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by equation1 [25]

I = AA**T 2 exp(−

qΦ bn q ) exp (V − IRs ) kT ηkT

(1)

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I , A , k , T , A** and ’ Φ bn are current flowing through the contact area of metallization,

Boltzmann constant, absolute temperature, Richardson constant and barrier height. To get the right relation between the current and voltage series resistance effect must be

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eliminated. Many models are proposed by different scientists to nullify the effect of series resistance. To identify the series resistance, we have used the model proposed by Werner et

dV ηkT = IRs + d ln I c q

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al. [25].

The equation 2 is a straight line equation, after plotting dV

d ln I

(2)

vs I and straight line

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fitting, series resistance, and ideality factor can be obtained by calculating slope and intercept of the fitted curve. The values of the ideality factor of contacts on both substrates are presented in table 1. The current densities of devices before and after the correction of

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voltage axis are shown in Fig.4.

The current density in our case is more significant compared to the current density of

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some reported work even though the film is undoped. Figs 4 exhibited the shift in voltage axis and correspondingly semilogarithmic plot shown in Fig.5, and intercept and slope will

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be modified accordingly. The slope and intercept is calculated from the ln( j) − V shown in Fig. 5(a-d) to estimate the ideality factor and barrier height. After voltage axis correction barrier height changes from 0.50eV to 0.42eV for lowest area metal contact and similar

series resistance, the barrier heights are changed with 18%.

(a)

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(b)

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trained observed for others also. After modification in the voltage axis using calculated

(d)

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(c)

Fig.4 Current density (a) Current density before voltage axis correction for n-type substrate(c) Current density after voltage axis correction for n-type substrate (b) Current density before voltage axis correction for p-type substrate (d) Current density after voltage axis correction for p-type substrate

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From the table, we can see the ideality factor of the device deviates from the unity this is indicating the requirement of some further different analysis. Also, the barrier height is not changed as expected after the correction of the voltage axis; this points towards other

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junction irregularities like effective contact area inhomogeneous barrier height etc. [3, 2325]. Also, ideality factor deviation from unity assured us some barrier issues needed to be resolved. To get correct barrier height, we will use Richardson plot, from which actual

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barrier height at MS interface can be identified, to plot this we were measured current for the same range of voltage but at different temperatures(~300K to 400K). From Richardson

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plot, negative barrier heights were obtained for contacts fabricated on the n-type and p-type substrate, estimating negative slope from the graph shown in Fig.5 (f-e). The estimated values of negative barrier heights are − 0.11V for contacts fabricated on n-type substrate and − 0.10V for p-type substrates respectively, which were estimated from slopes − 1.29

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and − 1.19 of Richardson plot shown in Fig.5 (f-e); this result confirmed that contact is true Ohmic [25-27]. When thermionic emission dominates for current transport at room temperature, specific contact resistance ρ c of the contacts is given as [5, 22, and 23]

qΦ k exp( bn ) * qA T kT

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ρc =

−1

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 dJ  ρc =    dV 

(3)

(4)

where k is Boltzmann constant, q is elementary charge and Φ bn is barrier height A* is

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Richardson constant.

(b)

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(a)

(d)

(f)

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(e)

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(c)

Fig.5 Logarithmic and Richardson plot for both the contact(a-b) logarithmic plot before series resistance consideration for n and p substrates (c-d) logarithmic plot after series resistance consideration for n and p substrates (e) Richardson plot for the device on n-type substrate the slope is negative indicates negative potential (f) Richardson plot for p-type substrate giving negative slope

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The specific contact resistance ( ρ c ) is estimated by this effective negative barrier height are 1.21× 10 −10 and 1.22 × 10 −10 Ω − cm 2 for n-type and p-type substrate contact respectively, these values are the lowest compared to reported work up to present [5-20]. Present results

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could not be compared with previously reported because alloy and nonalloy metallization schemes optimization made up to now only on Al-doped ZnO thick films (~100nm1000nm) including bulk. Note the Richardson plot giving the lowest specific contact

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resistance reported till date irrespective of doping and sapphire substrate. We would like to mention that this metallization scheme over undoped ZnO and SBH approach is best

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compared to Al doped ZnO and TLM for Ohmic contact and specific contact resistance. We have not annealed the contact after metallization because it might be reduced the quality of the contact [5]. We were got lowest specific contact resistance because of negative barrier height obtained from Richardson plot, the similar result were reported on

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silicon surface by using Ti [33].

We were measured C-V characteristics to get further insight of contact; we were selected lowest

dimension

contact

to

measure

the

MSM

capacitance

and

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M/Semiconductor/Oxide/substrate/metal MOS capacitor. The C-V characteristics are given in Fig.6. The characteristics of the contact are similar to ideal MOS, this reveals better

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contact formation between the ZnO and Ti/Au. C-V characteristics of the contact are shown in Fig 6 of MOS capacitors on p-Si and n-Si. The traps charges present in the oxide layers

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and Si/SiO2 interfaces affecting the C-V characteristics. We can also see that both MOS capacitor showing different threshold voltage. In general MOS capacitor p+ gate paired with n-type substrate have small negative threshold voltage and p-type body paired with n+ gate

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show the small positive threshold voltage [22]. For p-type substrate general MOS structure is similar to conventional MOS fabricated on the p-type but it is different for the n-type substrate. Also, during oxidation of p-type and n-type sodium ion is trapped in oxide layer.

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For n-type silicon substrate oxidation the (P, As, Sb) piled up at the silicon and oxide interface, whereas for the p-type silicon boron or like dopant injected to bulk silicon. These

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charge distribution in n-type and p-type substrate and oxides layer over them is shown in Fig.6(c-d). When positive voltage applied across the MOS structure fabricated on n-type silicon accumulation occur at the interface of the silicon and oxide as shown in Fig.6(c). Inversion is screened in this MOS structure by the sodium ion trapped in the oxide layer

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and phosphorous ions or like ions depending on dopants used for doping at the interface of silicon and oxide this screening is shown in Fig.6(d).

However, in MOS structure

fabricated over the p-type substrate general accumulation, depletion, and inversion occurred

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because of absent of screening [22]. The MOS structure realized on n-type silicon substrate is suitable for the fabrication of ZnO based MESFET because it is behaving fixed capacitor

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for a range of bias voltage. Also, it is evident from the Fig.6(a) very low current conduction vertically compared to MOS fabricated over the p-type substrate. However, the MOS structure which is fabricated on the p-type can be used as general MOS whose threshold

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voltage easily tailored by the changing the thickness of the ZnO. We were also measured the C-V characteristics of horizontal MSM structure not given herw, but in that analysis capacitance was largely deviated from generally observed for rectifying contact, confirming

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the formation of true Ohmic contact. That capacitance was observed to be negative. This capacitance was resulted because of the series resistance and the traps levels [34]. The negative capacitance is also occurring due to trap charges in the semiconductor due to

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which voltage leads the current. As the thickness of the ZnO is sufficient some traps may be farmed at the interface which results the negative capacitance [34]. So from this can say

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barrier is not forming the metal and semiconductor because if barrier formed at the Ti/ZnO must be Ohmic. We cannot deny that negative capacitance might be due to parasitic. Further, at higher frequency dielectric loss occur which leads the negative capacitance. Without barrier height the positive capacitance is not possible in the metal semiconductor

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junction. Tunneling also leads the negative capacitance this is not applicable because film is undoped. [35]. We would like to mention that we are getting ideal Ohmic contact by observing the current density in Fig.3 which is showing the better current density result

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than reported results up to present. The negative barrier height were already reported on MoS2, MGR and Ti/Si, but unfortunately, the researchers working on the ZnO have not

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been tried such type of study [36-37].

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(b)

Ti/Au

Ti/Au

(d)

ZnO SiO2

Na+

Na+

P+

P+

P+

P+

P+

n-type Si(100)

P+

P+

P+

Sodium and phosphorous ion screened the hole(accumulation)

Ti/Al

ZnO SiO2

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Ti/Au

Na+

+

Na

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Accumulation

p-type Si(100)

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B-

Ti/Al

Na+

n-type Si(100)

Ti/Al

Na

Na+

Na+

Accumulated charge negative

(e)

ZnO SiO2

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Na+

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(c)

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(a)

B-

B-

+

(f)

Ti/Au ZnO SiO2 Na

Na+

Na+

+

Strong inversion

p-type Si(100) B-

BB-

Ti/Al

Fig.6 the C-V characteristics of the contact (a) n-type substrate (b) p-type substrate (c) accumulation of MOS capacitor on n-type substrate (d) depletion and inversion region of the MOS capacitor on n-type substrate (e) depletion and inversion region of the MOS capacitor on n-type substrate (e) accumulation of MOS capacitor on n-type substrate

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We guess that true Ohmic contact is tough on ZnO this is the reason researcher were used doped ZnO and assumed the tunneling and optimized the Ohmic contact by figuring out specific contact resistance using the TLM. However, TLM has certain limitation unable

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to provide exact information about following parameters essential to judge a contact: barrier height, ideality factor, which are easily estimated by SBH analysis. The negative barrier height is difficult to observe with normal analysis of contact by using I-V

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characteristics and its semi lograthmic plot.

We were achieved true Ohmic contact on very thin ZnO film deposited using RF

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sputtering, and keeping the substrate at 4500 C temperature, this elevated substrate temperature helped to get single crystal with other optimization. The contact properties could be improved further by treating the ZnO surface by oxygen plasma, hydrogen peroxide treatment [5-20, 24]. One can also consider the active contact area which is

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different than physically calculated metal contact area, to improve the results further [24]. The band diagram of the contacts is shown in Fig.7. In today’s technology, the nanoscale devices are prevalent, these devices, when an active channel is in nanometer scale, doping,

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and sapphire substrate is not a solution for better performance of these nanoscale devices[24]. Application of ZnO is increasing day by day in all fields of electronics like the

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solar cell [38], the transistor for IC fabrication, light emitting diode, UV detector[3] for the communication industries.

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Table 1. Device parameter consider all possible modification in contact for example x-axis (voltage axis correction)

Device number

Ideality factor

Specific contact resistance Ω − cm 2

(p)

4.86

0.42

0.42

0.12

2

5.12

4.16

0.42

0.44

0.26

3

4.72

3.51

0.42

0.42

0.13

4

5.05

4.15

0.43

0.43

0.20

0.26

P

5

5.02

4.15

0.43

0.43

0.18

0.23

1.20 × 10−10

Vacuum

Φ (= 4.2eV)

Richardson plot

0.16

N

0.34

1.21× 10−10

0.16

m

E (= 3.37eV) m

ZnO

EP

Metal

(p)

χ (= 4.33eV)

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m

(n)

SC

(n)

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1

(ptype) 3.86

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(n-type)

Barrier Height

Fig 7. The band diagram of Ti/ZnO metallization scheme

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This metallization Scheme suitable for single dimensional nanostructure like nanorod, nanobelt, were Al is used for metallization. Also, we were tested a number of metallization Scheme the data is not shown here they were Cr/Au, Ti/Al, Ti/Au among these present

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metallization scheme in this article shows better results. This work provides a platform to get true Ohmic contacts on ZnO or other wide semiconductor like SnO2 and optimization of SBH model instead of using TLM specifically ZnO. A detailed study can be done by

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depositing Ti/Au on nanorods following similar route. 4. Conclusion

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In this work, we follow SBH model considering thermionic emission theory a different approach than traditional TLM and got a real ohmic contact on ZnO which was sub-

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nanometer thin. In this work, we used SBH model to calculate the series resistance which is similar to figure the barrier for Si by using Ti but not reported by anyone anywhere specifically on ZnO.

A Ti/Au nonalloy metallization Scheme was deposited on 20 nm

thick ZnO thin film on two substrates namely SiO2/n-Si (100) and SiO2/p-Si. The current

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injection is profoundly affected by the type of substrate due to the presence of trap charges at the junction for p-type substrate the scattering is more charge transport was less which leads to lower current in contact developed on p-type substrate. The specific contact

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resistance in our case is better than all reported work without Al-doping, this work will offer a path to optimize the contact in a new way and surpass the limitation of the doping

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and overcome the TLM. Finally we can recommend n-type silicon substrate is a better option for the efficient ZnO devices compared to p-type substrate. Acknowledgement

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The author’s hearty thanks Indian Nanoelectronics Users Program (INUP) at IIT Bombay for project number P104836472_6 and Sophisticated Analytical Instruments Facility at IIT Bombay for completion of this work , so authors heartily thank full to INUP

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and its team. References

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1. Deposition of ultrathin FET relevant undoped ZnO thin film deposition by RF sputtering. 2. Non alloy different contact area metallization scheme on this RF sputtered film. 3. Schottky barrier height approach for the Specific contact resistance instead of transmission line approach 4. Negative barrier height evaluated by Richardson plot 5. Series resistance of device effect on barrier height