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Two-dimensional nanowire array formation on Si substrate using self-organized nanoholes of anodically oxidized aluminum
Solid-State Electronics 43 (1999) 1143±1146
Two-dimensional nanowire array formation on Si substrate using self-organized nanoholes of anodically oxidized aluminum S. Shingubara*, O. Okino, Y. Sayama, H. Sakaue, T. Takahagi Department of Electrical Engineering, Hiroshima University, Kagamiyama 1-4-1, Higashi, Hiroshima, 739-8527, Japan Received 18 June 1998; received in revised form 21 September 1998; accepted 2 January 1999
Abstract A highly ordered two-dimensional array of 48 nm Cu wires was successfully fabricated on Si substrate by the usage of anodic oxidation of aluminum (Al) for the ®rst time. Anodic oxidation was carried out for Al sputtered ®lm on Si substrate covered by a thin thermally oxidized SiO2 ®lm, which was very eective to protect Si substrate from anodic oxidation. A highly ordered array of nanoholes was formed by the two steps Al anodic oxidation, and ®nally Cu was deposited by electroless plating in nanoholes which aspect ratio was 2.5. The present method suggests possibility of a large area two-dimensional array of quantum dots or wires on semiconductor substrate, which are considered to be a key technology for future ULSIs operated by single electron tunneling phenomena. # 1999 Elsevier Science Ltd. All rights reserved. Keywords: Al anodic oxidation; Silicon; Nanowires; Nanoholes; Self-organization
1. Introduction It has been discussed urgently that there are technological as well as economical limitations in lithographic technologies using optical, electron or X-ray beams for ULSI (ultra large scale integration) fabrications in the forthcoming stage of sub-100 nm scales [1,2]. For this reason, much attentions has been paid for nanostructures formation by self-organizing methods such as strain-induced quantum dots formations [3,4], nanocrystal formation on the atomic step edges [5±7] and nanoholes formation by Al anodic oxidations [8±11].
* Corresponding author. Tel.: +81-824-247-645; fax: +81824-227-195. E-mail address: [email protected] (S. Shingubara)
Among these methods, Al anodic oxidation has been shown to be capable of realizing an extremely highly ordered periodic structures of nanoholes by the usage of the two steps anodization [9,10]. The authors recently showed that metallic wires array could be formed by electroplating in nanoholes on Al plate [11]. However, extension of nanohole array formation to semiconductor single crystalline substrates such as Si and GaAs is required for a wide applications to microelectronics. The aim of the present study is to form two-dimensional (2D) array of quantum dots and wires on Si substrate by the usage of Al anodic oxidation. For this purpose, electroless plating is carried out to grow nanowires in Al anodic nanoholes on Si, and furthermore primary investigations of selective deposition of semiconductors as well as metals are discussed.
0038-1101/99/$ - see front matter # 1999 Elsevier Science Ltd. All rights reserved. PII: S 0 0 3 8 - 1 1 0 1 ( 9 9 ) 0 0 0 3 7 - 4
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Fig. 2. Average diameter of holes as a function of the voltage of anodic oxidation. The oxalic acid concentration is 0.15 M, and the temperature is 58C. Self-organization of nanoholes are obtained at a voltage between 30 and 40 V by the two steps anodization.
Fig. 1. SEM images of nanoholes formed by the two steps Al anodic oxidation at a condition far from self-organization (a) and at a self-organization condition (b). (a-1) and (b-1) are views from the top, and (a-2) and (b-2) are cross-sectional views. Conditions of anodic oxidations are; (a-1, a-2): oxalic acid concentration 0.15 M, 60 V, 58C, 1st step anodization time is 25 h, 2nd step anodization time is 15 min. (b-1, b-2): oxalic acid concentration 0.5 M, 40 V, 58C, 1st step anodization time is 32 h , 2nd step anodization time is 30 min.
2. Experimental results For anodic oxidation of Al, oxalic acid solution of 0.1±0.6 M was used. Array of holes, which are perpendicular to the interface between aluminum and aluminum oxide, develops along with the growth of aluminum oxide. It is reported that at some conditions of temperature, voltage and anodization time, an excellent ordered two-dimensional array of nanoholes could be obtained [9,11]. Arrangement of holes are delicately dependent on the initial surface roughness, and there is a tendency to align into ordered structure when holes grow in vertical direction during long time anodic oxidation. In order to realize two-dimensional ordered array of holes, two steps anodic oxidation was proposed [9,10]. The aluminum oxide ®lm is removed after the ®rst step anodic oxidation with enough long time by wet chemical etching using phosphorous acid, then remained aluminum surface roughness re¯ects twodimensional array of bottoms of holes. An ordered array of holes is obtained after the succeeding second anodic oxidation. Fig. 1 shows structure of nanoholes which were formed in Al plate after the two steps anodization at dierent voltages. An excellent 2D ordered array of nanoholes was formed when V=40 V. On the
other hand, when V=60 V, arrangement of nanoholes is random and cross-sectional image showed branching of holes during oxidation. Average diameter of nanoholes are 25 and 40 nm for 40 and 60 V, respectively. Thus self-organization of nanoholes is dependent on the voltage. Fig. 2 shows voltage dependence of nanohole diameter. Mean hole diameter is monotonously increased with increasing the voltage, as it has been reported formerly [8]. Self-organization was observed between 30 and 40 V at rather high oxalic acid concentration at temperature around 58C. We have investigated nanoholes array formation on Si substrate. Pure Al (99.999%) was deposited on Si substrate covered by a thin (30 nm) thermally oxidized SiO2 ®lm by DC sputtering. When there was no SiO2 between Al and Si-substrate, anodic oxidation was not stopped at the Al/Si interface and porous Si was grown ®nally. It is desirable to limit anodic oxidation within Al layer in order to make electronic contact between substrate Si and quantum dots or quantum wires formed in nanoholes. SiO2 worked a very good barrier to anodic oxidation as well as wetting layer between porous alumina and Si. At ®rst we have tried to use gold (Au) ®lm as an barrier for anodic oxidation, however, there was a problem of adhesion between porous alumina and Au. Then we have tried to deposit metals such as Ni and Cu by plating in the nanoholes. Fabrication sequence of nanoholes and nanowires are shown in Fig. 3. Two steps anodic oxidation on Si is schematically shown in Fig. 3(a±d). In order to deposit metals in the holes, Al ®lm thickness after removal of 1st step anodized Al should be smaller than a few hundreds nm. We have deposited thick Al ®lm of 10±30 mm initially, then the ®rst step anodization was carried out until the rest Al ®lm thickness
S. Shingubara et al. / Solid-State Electronics 43 (1999) 1143±1146
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Fig. 4. Cross-sectional SEM views of nanoholes formed by the two steps anodization (a) and Cu nanowires deposited by electroless plating. Thickness of SiO2 is 30 nm. Al anodization condition was 40 V, 0.3 M. Alumina was slightly etched away by 5 wt% phosphoric acid before electroless plating. Mean diameter of Cu wires is 48 nm, and aspect ratio is 2.5.
Fig. 3. Fabrication process sequence of nanowire and/or dots array on Si substrate by the Al anodic oxidation. (a) Pure Al ®lm with a thickness of 10±30 mm is deposited on a heavy doped Si substrate covered by a thin silicon oxide. (b) The ®rst step Al anodic oxidation is carried out at the self-organization condition until the rest Al ®lm thickness is as small as 100 nm in order to lower aspect ratio of nanoholes than 5. (c) Alumina is etched away by the mixture of phosphoric acid and chromic acid. (d) The second anodic oxidation is carried out until Al is completely converted to porous alumina. (e) Deposition of metal and/or semiconductor by nonselective deposition such as electroless plating to form nanowires array. (f) Reactive ion etching (RIE) of the bottom alumina barrier layer of nanoholes, and subsequent RIE of SiO2 to open windows for substrate Si. (g) Selective deposition of metal and/or semiconductor to nanoholes. By adequate controll of deposition thickness, nanowires as well as dots can be fabricated.
was as large as 100 nm. After the second step anodization of Al, Al ®lm was completely changed to Aloxide. There are two choices of material deposition to
nanoholes; selective or nonselective. We have investigated both by plating method and succeeded in deposition of Cu in the nanoholes by nonselective electroless plating as schematically shown in Fig. 3(e). Fig. 4 shows cross-sectional view of nanoholes on Si substrate (Fig. 4a), and deposited Cu by electroless plating. The surface of Al-oxide was activated by PdCl2 treatment prior to the electroless plating using CuSO45H2O. When the aspect ratio (ratio of the diameter to the height) of the hole was 2.5, the hole was completely ®lled by Cu as shown in Fig. 4(b). However, it was dicult to ®ll Cu completely when aspect ratio was larger than 5. Two-dimensional array of Cu nanowires with 48 nm diameter thus obtained is shown in Fig. 5. An excellent 2D array was obtained as if they were formed by lithographic technology. Electroplating is promising as a selective deposition
Fig. 5. SEM photographs of two-dimensional array of Cu nanowires. The mean diameter of Cu wires is 48 nm. (a) Top view. (b) Bird's eye view. Cu ®lm with nanowires array was delaminated by scotch tape pulling from Si substrate for SEM observation.
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method. We have to remove both bottom barrier layer of Alumina of nanoholes as well as SiO2 ®lm (Fig. 3f and g) for this case. At ®rst we have tried to etch away the bottom Al-oxide by Ar ion beam etching, however we have failed since the top of holes were closed due to redeposition of Al-oxide. Further study for anisotropic etching of the bottom Al-oxide and SiO2 by RIE (reactive ion etching) are in progress.
3. Concluding remarks Two-dimensional array of Cu nanowires of 48 nm diameter is successfully fabricated by two steps anodization of Al which was deposited by sputtering on Si substrate covered by thin SiO2. The present method is capable to fabricate ordered nanowires array of a variety of materials, and further shrinkage of wire dimensions would be necessary to application to the nanofabrication of quantum materials and devices which are operated at room temperature. The shrinkage would be possible by searching a self-organization condition at the lower anodic voltage. Selective deposition of metals as well as semiconductors in nanoholes is essential for this ®nal goal, and further investigation to remove the bottom Al2O3 barrier layer by RIE using chlorine-based reactive gases is in progress.
Acknowledgements The authors would like to express gratitude to Professor H. Masuda of Tokyo Metropolitan University for kind instructions and suggestions of two steps anodization of aluminum. This work has been supported by CREST (Core Research for Evolutional Science and Technology) of Japan Science and Technology Corporation (JST). References [1] Canning J. J Vac Sci Technol B 1997;15:2109. [2] McCord MA. J Vac Sci Technol B 1997;15:2125. [3] Jesson DE, Chen KM, Pennycook SJ. MRS Bull 1996;21-4:31. [4] Petro PM, Medeiros-Ribeiro G. MRS Bull 1996;21:50. [5] Kawasaki K, Mochizuki M, Tekeshita J, Tsutsui K. Jpn J Appl Phys 1998;37:1508. [6] Sakaue H, Katsuta Y, Konagata S, Shingubara S, Takahagi T. Jpn J Appl Phys 1996;35:1010. [7] Uejima K, Takeshita J, Kawasaki K, Tsutsui K. Jpn J Appl Phys 1997;36:4088. [8] Keller F, Hunter MS, Robinson DL. J Electrochem Soc 1953;100:411. [9] Masuda H, Fukuda K. Science 1995;268:1466. [10] Masuda H, Satoh M. Jpn J Appl Phys 1996;35:L126. [11] Shingubara S, Okino O, Sayama Y, Sakaue H, Takahagi T. Jpn J Appl Phys 1997;12B:7791.
Two-dimensional nanowire array formation on Si substrate using self-organized nanoholes of anodically oxidized aluminum S. Shingubara*, O. Okino, Y. Sayama, H. Sakaue, T. Takahagi Department of Electrical Engineering, Hiroshima University, Kagamiyama 1-4-1, Higashi, Hiroshima, 739-8527, Japan Received 18 June 1998; received in revised form 21 September 1998; accepted 2 January 1999
Abstract A highly ordered two-dimensional array of 48 nm Cu wires was successfully fabricated on Si substrate by the usage of anodic oxidation of aluminum (Al) for the ®rst time. Anodic oxidation was carried out for Al sputtered ®lm on Si substrate covered by a thin thermally oxidized SiO2 ®lm, which was very eective to protect Si substrate from anodic oxidation. A highly ordered array of nanoholes was formed by the two steps Al anodic oxidation, and ®nally Cu was deposited by electroless plating in nanoholes which aspect ratio was 2.5. The present method suggests possibility of a large area two-dimensional array of quantum dots or wires on semiconductor substrate, which are considered to be a key technology for future ULSIs operated by single electron tunneling phenomena. # 1999 Elsevier Science Ltd. All rights reserved. Keywords: Al anodic oxidation; Silicon; Nanowires; Nanoholes; Self-organization
1. Introduction It has been discussed urgently that there are technological as well as economical limitations in lithographic technologies using optical, electron or X-ray beams for ULSI (ultra large scale integration) fabrications in the forthcoming stage of sub-100 nm scales [1,2]. For this reason, much attentions has been paid for nanostructures formation by self-organizing methods such as strain-induced quantum dots formations [3,4], nanocrystal formation on the atomic step edges [5±7] and nanoholes formation by Al anodic oxidations [8±11].
* Corresponding author. Tel.: +81-824-247-645; fax: +81824-227-195. E-mail address: [email protected] (S. Shingubara)
Among these methods, Al anodic oxidation has been shown to be capable of realizing an extremely highly ordered periodic structures of nanoholes by the usage of the two steps anodization [9,10]. The authors recently showed that metallic wires array could be formed by electroplating in nanoholes on Al plate [11]. However, extension of nanohole array formation to semiconductor single crystalline substrates such as Si and GaAs is required for a wide applications to microelectronics. The aim of the present study is to form two-dimensional (2D) array of quantum dots and wires on Si substrate by the usage of Al anodic oxidation. For this purpose, electroless plating is carried out to grow nanowires in Al anodic nanoholes on Si, and furthermore primary investigations of selective deposition of semiconductors as well as metals are discussed.
0038-1101/99/$ - see front matter # 1999 Elsevier Science Ltd. All rights reserved. PII: S 0 0 3 8 - 1 1 0 1 ( 9 9 ) 0 0 0 3 7 - 4
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S. Shingubara et al. / Solid-State Electronics 43 (1999) 1143±1146
Fig. 2. Average diameter of holes as a function of the voltage of anodic oxidation. The oxalic acid concentration is 0.15 M, and the temperature is 58C. Self-organization of nanoholes are obtained at a voltage between 30 and 40 V by the two steps anodization.
Fig. 1. SEM images of nanoholes formed by the two steps Al anodic oxidation at a condition far from self-organization (a) and at a self-organization condition (b). (a-1) and (b-1) are views from the top, and (a-2) and (b-2) are cross-sectional views. Conditions of anodic oxidations are; (a-1, a-2): oxalic acid concentration 0.15 M, 60 V, 58C, 1st step anodization time is 25 h, 2nd step anodization time is 15 min. (b-1, b-2): oxalic acid concentration 0.5 M, 40 V, 58C, 1st step anodization time is 32 h , 2nd step anodization time is 30 min.
2. Experimental results For anodic oxidation of Al, oxalic acid solution of 0.1±0.6 M was used. Array of holes, which are perpendicular to the interface between aluminum and aluminum oxide, develops along with the growth of aluminum oxide. It is reported that at some conditions of temperature, voltage and anodization time, an excellent ordered two-dimensional array of nanoholes could be obtained [9,11]. Arrangement of holes are delicately dependent on the initial surface roughness, and there is a tendency to align into ordered structure when holes grow in vertical direction during long time anodic oxidation. In order to realize two-dimensional ordered array of holes, two steps anodic oxidation was proposed [9,10]. The aluminum oxide ®lm is removed after the ®rst step anodic oxidation with enough long time by wet chemical etching using phosphorous acid, then remained aluminum surface roughness re¯ects twodimensional array of bottoms of holes. An ordered array of holes is obtained after the succeeding second anodic oxidation. Fig. 1 shows structure of nanoholes which were formed in Al plate after the two steps anodization at dierent voltages. An excellent 2D ordered array of nanoholes was formed when V=40 V. On the
other hand, when V=60 V, arrangement of nanoholes is random and cross-sectional image showed branching of holes during oxidation. Average diameter of nanoholes are 25 and 40 nm for 40 and 60 V, respectively. Thus self-organization of nanoholes is dependent on the voltage. Fig. 2 shows voltage dependence of nanohole diameter. Mean hole diameter is monotonously increased with increasing the voltage, as it has been reported formerly [8]. Self-organization was observed between 30 and 40 V at rather high oxalic acid concentration at temperature around 58C. We have investigated nanoholes array formation on Si substrate. Pure Al (99.999%) was deposited on Si substrate covered by a thin (30 nm) thermally oxidized SiO2 ®lm by DC sputtering. When there was no SiO2 between Al and Si-substrate, anodic oxidation was not stopped at the Al/Si interface and porous Si was grown ®nally. It is desirable to limit anodic oxidation within Al layer in order to make electronic contact between substrate Si and quantum dots or quantum wires formed in nanoholes. SiO2 worked a very good barrier to anodic oxidation as well as wetting layer between porous alumina and Si. At ®rst we have tried to use gold (Au) ®lm as an barrier for anodic oxidation, however, there was a problem of adhesion between porous alumina and Au. Then we have tried to deposit metals such as Ni and Cu by plating in the nanoholes. Fabrication sequence of nanoholes and nanowires are shown in Fig. 3. Two steps anodic oxidation on Si is schematically shown in Fig. 3(a±d). In order to deposit metals in the holes, Al ®lm thickness after removal of 1st step anodized Al should be smaller than a few hundreds nm. We have deposited thick Al ®lm of 10±30 mm initially, then the ®rst step anodization was carried out until the rest Al ®lm thickness
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Fig. 4. Cross-sectional SEM views of nanoholes formed by the two steps anodization (a) and Cu nanowires deposited by electroless plating. Thickness of SiO2 is 30 nm. Al anodization condition was 40 V, 0.3 M. Alumina was slightly etched away by 5 wt% phosphoric acid before electroless plating. Mean diameter of Cu wires is 48 nm, and aspect ratio is 2.5.
Fig. 3. Fabrication process sequence of nanowire and/or dots array on Si substrate by the Al anodic oxidation. (a) Pure Al ®lm with a thickness of 10±30 mm is deposited on a heavy doped Si substrate covered by a thin silicon oxide. (b) The ®rst step Al anodic oxidation is carried out at the self-organization condition until the rest Al ®lm thickness is as small as 100 nm in order to lower aspect ratio of nanoholes than 5. (c) Alumina is etched away by the mixture of phosphoric acid and chromic acid. (d) The second anodic oxidation is carried out until Al is completely converted to porous alumina. (e) Deposition of metal and/or semiconductor by nonselective deposition such as electroless plating to form nanowires array. (f) Reactive ion etching (RIE) of the bottom alumina barrier layer of nanoholes, and subsequent RIE of SiO2 to open windows for substrate Si. (g) Selective deposition of metal and/or semiconductor to nanoholes. By adequate controll of deposition thickness, nanowires as well as dots can be fabricated.
was as large as 100 nm. After the second step anodization of Al, Al ®lm was completely changed to Aloxide. There are two choices of material deposition to
nanoholes; selective or nonselective. We have investigated both by plating method and succeeded in deposition of Cu in the nanoholes by nonselective electroless plating as schematically shown in Fig. 3(e). Fig. 4 shows cross-sectional view of nanoholes on Si substrate (Fig. 4a), and deposited Cu by electroless plating. The surface of Al-oxide was activated by PdCl2 treatment prior to the electroless plating using CuSO45H2O. When the aspect ratio (ratio of the diameter to the height) of the hole was 2.5, the hole was completely ®lled by Cu as shown in Fig. 4(b). However, it was dicult to ®ll Cu completely when aspect ratio was larger than 5. Two-dimensional array of Cu nanowires with 48 nm diameter thus obtained is shown in Fig. 5. An excellent 2D array was obtained as if they were formed by lithographic technology. Electroplating is promising as a selective deposition
Fig. 5. SEM photographs of two-dimensional array of Cu nanowires. The mean diameter of Cu wires is 48 nm. (a) Top view. (b) Bird's eye view. Cu ®lm with nanowires array was delaminated by scotch tape pulling from Si substrate for SEM observation.
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method. We have to remove both bottom barrier layer of Alumina of nanoholes as well as SiO2 ®lm (Fig. 3f and g) for this case. At ®rst we have tried to etch away the bottom Al-oxide by Ar ion beam etching, however we have failed since the top of holes were closed due to redeposition of Al-oxide. Further study for anisotropic etching of the bottom Al-oxide and SiO2 by RIE (reactive ion etching) are in progress.
3. Concluding remarks Two-dimensional array of Cu nanowires of 48 nm diameter is successfully fabricated by two steps anodization of Al which was deposited by sputtering on Si substrate covered by thin SiO2. The present method is capable to fabricate ordered nanowires array of a variety of materials, and further shrinkage of wire dimensions would be necessary to application to the nanofabrication of quantum materials and devices which are operated at room temperature. The shrinkage would be possible by searching a self-organization condition at the lower anodic voltage. Selective deposition of metals as well as semiconductors in nanoholes is essential for this ®nal goal, and further investigation to remove the bottom Al2O3 barrier layer by RIE using chlorine-based reactive gases is in progress.
Acknowledgements The authors would like to express gratitude to Professor H. Masuda of Tokyo Metropolitan University for kind instructions and suggestions of two steps anodization of aluminum. This work has been supported by CREST (Core Research for Evolutional Science and Technology) of Japan Science and Technology Corporation (JST). References [1] Canning J. J Vac Sci Technol B 1997;15:2109. [2] McCord MA. J Vac Sci Technol B 1997;15:2125. [3] Jesson DE, Chen KM, Pennycook SJ. MRS Bull 1996;21-4:31. [4] Petro PM, Medeiros-Ribeiro G. MRS Bull 1996;21:50. [5] Kawasaki K, Mochizuki M, Tekeshita J, Tsutsui K. Jpn J Appl Phys 1998;37:1508. [6] Sakaue H, Katsuta Y, Konagata S, Shingubara S, Takahagi T. Jpn J Appl Phys 1996;35:1010. [7] Uejima K, Takeshita J, Kawasaki K, Tsutsui K. Jpn J Appl Phys 1997;36:4088. [8] Keller F, Hunter MS, Robinson DL. J Electrochem Soc 1953;100:411. [9] Masuda H, Fukuda K. Science 1995;268:1466. [10] Masuda H, Satoh M. Jpn J Appl Phys 1996;35:L126. [11] Shingubara S, Okino O, Sayama Y, Sakaue H, Takahagi T. Jpn J Appl Phys 1997;12B:7791.