- Email: [email protected]
VLSI research in the U.S.A.
VLSI Research in the U.S.A. Co-operative R&D in Advanced Information Technologies is not a Japanese privilege. This article oudines a major effort in the USA.
R.M. B U R G E R a n d L.W. SUMNEY Semiconductor Research Corporation, 300 Park Drive, Suite 215, P.O. Box 12053, Research Triangle Park, NC 27709, USA
Introduction In the recent past, it has become apparent that the alternative approaches to research and development in VLSI must be created if national industries are to survive in this highly competitive field. T h e magnitude and versatility of the resources available to even the largest companies are by themselves insufficient to sustain the pace o f the rapidly developing technology. A n u m b e r o f government-backed programs have been initiated in the industi"ialized nations to meet the competitive challenge (Fig. 1). By far the most successful of these is in Japan where prodigious resources have been focused in the laboratories of N T T to perform generic R&D for their semiconductor industry. Fully-developed technologies are transferred efficiently from N T T to the Japanese producers which themselves are among the largest industrial conglomerates in the world. Each of these conglomerates has targeted VLSI as an area o f growth and thus investment. T h e individual producers are able to focus their formidable resources and talents on production facilities and methods. This monolithic Japanese structure enables them to pursue almost every new concept that appears in the technical literature of the world and, for those technologies that are successful, to capitalize on them more rapidly than their originators. To cite but one example, the moat capacitor concept for the DRAM cell which was developed at Bell Laboratories has surfaced in the Hitachi 1 megabit DRAM prototype. At present, Japan is the competitive challenge to which other efforts are compared. No other national effort has appeared that can match the Japanese effort. This had become apparent in their rapidly increasing share of world VLSI markets (Fig. 2). Although U.S. industry remains competitive and still leads in sales, if the Japanese relative higher North-Holland
growth rate persists, this lead will rapidly disappear. In the U.S., the defense-funded VHSIC program is a coordinated large VLSI effort. Over $500 million has been programmed in this multiyear effort to obtain capabilities for production and application of chips with 11/4 micrometer and submicrometer design rules. Thts effort is however directed to meeting specific defense needs that deviate frOm those of the commercial marketplace. Moreover, VHSIC is presently focused on development, not research, and a considerable portion of the program is oriented to specific hardware needs, not generic technology. While there is a significant spillove r from VHSIC into the industrial sector, VHSIC dQes not provide the U.S. industry with an effective response to the competition from Japan. Another fledging response is the cooperative research effort that is being carried out by the Semiconductor Research Corporation (SRC). It must be pointed out at the onset that, although SRC exists because of the competitive threat to U.S. industry, it cannot be construed as an adequate response with its present program and structure. In the first half of 1984, SRC is funding research in academic laboratories at a level of $12 million a year. The significant feature of the SRC is that its program is an industry initiative with its research directed solely to the needs of the semiconductor industry. At present, SRC has
Japan
Substantial MiTI ~ efforts on VLS4.5th genmatg)n computer; R&O As~ctabon tm Future Electron Devices tsupeclattice devices 3-D IC',~ hardened IC's}, etc.
Europe
ESPRIT (Etm~ean Strategic Program for Research and taiocmation T ~ ts ere,~oned by tile Europmn Economic Community as a 5-year, $13 bt~m ~ u r e to I~ovide 'd'~efoundation for ~ mierool~lronies in the 1 ~ 0 ' ~
Great Bdtain
S3(~ m~on ,~ye~ re~z~w~'zprogram on Irffom~tton sciecce w~h comn~me~ ~o VLS~dBvs~pme~ - ~ p e r ~ ~ of U~OS;
Fr'm'~e
aP~l subsidlzed InduStry
US-DE~ ~
V~
DuffWB~)S ~
hinds.
US-Industry as,sum~c~dd ~
~ l(~,lsmosl b'nlporUmtt ~ .
Fig. 1. National Programs in Semiconductor Research. FGCS I 31
VLSI Research
30
FREE WORLD
$ BILLION
20
10 JAPAN
I
60
I
7O
I
80
I
I
90
YEAR
Fig. 2. Semiconductor Production. not benefited from any direct government funding. T h e model o f cooperation provided by the SRC may serve as guide for other cooperative programs that extend beyond the limited research program now underway to a broader array of activities that will help to revitalize the competitive ability of the U.S. semiconductor industry. In order to provide insight into the SRC and its potential impact on VLSI, the conceptual basis o f the SRC, its research strategy, and its present research program are described in the following sections ending with a critique o f the present program and structure. Although the SRC was incorporated in early 1982, it opened its offices a n d b e g a n operations in September o f that year. Thus, this report describes the results of one and one-half years o f the cooperative research program.
Conceptual Basis T h e SRC was initiated by eleven companies (Fig. 3) that originally had varying views as to what should be 32 I FGCS
done, but were convinced that a cooperative approach of some type was essential. Their views coalesced to define a research program based primarily in university laboratories which is directed toward providing generic research results for the industry and to increasing the numbers of university graduates with relevant eductional experiences. T h e SRC staff, with support of the m e m b e r companies, was directed to undertake an active role in the AdvancedMicro Devices, Inc. Bunoughs Control Data Corporation Digital Ecluipment Corp
LSI Logic Monolithic Mernodes. Ins, Monsanto Motorola. inc. NatiocmJ Semiconductor C,cxpora.t~c~ PerkinoElmer CorporatiOn RCA Rockwell SEMI-CHAPTER Silicon Systems Inc. Union Carbide CorporatiOn Vanan Westinghouse Electric Corporation Xemx
Fig. $. SRC Membership (April 1984). North-Holland
VLSI Research
research by developing an integrated research plan and interactiveiy working with the universities to respond to this plan. T h e research plan would reflect the needs of the industry. An important requirement was that the research would be implemented by means of contracts for needed research and not grants in support of good research. The founding members of the SRC recognized that university research depends for its strength on the open exchange of information. Any attempt of the SRC to prevent the flow of research results would be unacceptable to the universities and would destroy the creative ability required for good research. However, some membership prerogatives were desirable if not necessary to attract broad industry participation. T h e prerogatives that are defined include: (1) participation in the definition of a research program that is many times larger than the fee that each company pays, (2) lead time with respect to the public disclosure of research results, (3) participation in interactive research meetings with investigators,' (4) access to a planned data base on research activities and results, and (5) royalty-free license to patents and copyrights that may result from the research. The information that is produced by SRC support will, however, later become available through normal publications and technical meetings to everyone. The SRC recognizes that the proper role of the universities is not to solve current industry design and processing problems but is, instead, to obtain improved understanding of processes, materials, or phenomena; to identify, investigate, and evaluate innovative concepts; and to explore the frontiers of the applicable science and technology. Because the SRC began its activities with a strong image as a response mechanism to industry needs, there was a tendency of the universities to propose shorter-term research efforts and of the SRC to support problem solutions that were definable. This resulted in a university research program that complements parallel industry efforts but for which most of the solutions will actually come from industry laboratories where larger, more focused efforts are in place. As the SRC program evolves, it can be expected that emphasis will shift to longer range research, i.e., on the next generation of VLSI devices. In fact, a portion of the initial program is already aimed toward these future needs. From these beginnings, a set of broad goals has emerged for the SRC. T h e first goal might be termed constituency building. It is necessary that SRC demonstrate an early effectiveness to where the North-Holland
industry members and the better university research talents recognize the worth of cooperative generic research and collectively support its stability a n d growth. The rapid program implementation and the immediate effects of this on university research have started the constituency building process. As research results begin to emerge and communications between universities and industry are strengthened, progress toward this goal will accelerate. It will be reached when the SRC is accepted as a permanent institutional mechanism for the replenishment of the generic technology base of the VLSI industry. A second goal has been to define a coordinated research program that minimizes the fragmentation and redundancy of research efforts. Progress toward this goal is slower because it depends on the development of very high quality research efforts. The first steps taken by the SRC toward this goal have been aimed at developing programs that occupy niches in a broad research strategy and to develop the uniqueness of each project, program, and center. Next, through interactive research conferences and other information exchange methods, the participant is being made more fully aware of the part of the program of which he is a part so that he may participate in defining a unique role. A third goal is related to the training of more graduate students with backgrounds in semiconductor technology and science. Recent estimates based on an earlier survey of SRC contractors indicate that over 200 graduate students are now participating in SRC research. Graduate student envolvement is accentuated in project reviews and a continuing record will be maintained. A fourth goal is extension of the cooperative concept beyond the funding of academic research efforts to other areas of VLSI research and development that include process and tool development. As the industry matures, competition will decrease in the fabrication processes and production equipment but development and capital costs in these areas will continue to escalate. Cooperation thus becomes almost a necessity for survival. Mechanisms for this are being considered.
Research Strategy The initial plan of the SRC was to contract for research in defined technical areas that were selected on the basis of recognized industry needs. This plan included a hierarchical program structure. During the implementation of the initial research program, the concepts of themes and research vehicles were FGCSI 33
VLSI Research
introduced in o r d e r to provide increased focus to the larger efforts. Once the initial program was in place, it was examined critically to identify gaps and a set of more definitive research goals were formulated. At present, directions for orderly growth are being defined, procedures for improving the quality of the program are being developed, and considerable attention is being given to establishment of strong interfaces between the SRC members and t h e researchers. The initial program areas were defined as shown in Fig. 4. T h e intention was to allocate early funding approximately equally between the major technical areas. Responses received to a broad request for proposals, however, were unbalanced toward the microstructure sciences with only relatively few proposals related to manufacturing sciences. This reflects the traditional research interests of universities. T h e initial plan was also to identify several universities with strong capabilities for centers-ofexcellence in which strong funding would be provided for above threshold efforts toward macro engineering objectives supplemented by a n u m b e r of smaller contracts that address specific technical objectives. It was also suggested that at a later date linkages could be established among the various contractors in the several technical areas such that some of the research coordination would be provided by the research institutions, i.e., a strong lead center would coordinate the efforts of several centers and a n u m b e r of the smaller efforts (Fig. 5). The implementation o f this research program has resulted as o f March, 1984 in 53 contracts involving 36 institutions involving an annual rate of research expenditures exceeding $12 million. O f these, three institutions are associated with centers-of-excellence, seven institutions with programs that may evolve into
~
~
,~, SlmtemComponent
Fig. 4. Program Structure. 34 I FGCS
Fig. 5. Organizational Linkage. centers-of-excellence, and 30 in project level research efforts. The SRC considers stability a necessary condition for high quality academic research. Centers-of-excellence are considered to be long term efforts with inherent growth so long as the institution is able to maintain a high quality research program consistent with SRC goals. Programs are also multiyear efforts, that, if successful, may later become centers-of-excellence. In cases where the institutions are unable t o meet the performance objectives defined for the research, the intent of the SRC would be to phase programs down over a time sufficient to protect the interests of graduate students participating in the research. The smaller projects are planned for a specified term, in a majority of cases, this is three years. It is expected that the most relevant and productive Of these research efforts would continue through renewals while others would be replaced in response to new research priorities. As with any large research program, there are instances in which the research project is terminated because of performance lapses or unplanned circumstances. .Research goals for the SRC are listed in Fig. 6. It is important to note that the universities are not necessarily expected to attain these goals themselves, but rather are expected to perform research that helps SRC member companies to realize the goals. These goals provide a framework for guiding the research and assessing its relevance. Each university researcher is encouraged to generate specific objectives that describe the contributions expected from his research and to define milestones by which to measure progress toward the goals. As new thrusts are undertaken in the research program, the SRC has convened workshops of university, industry, and government specialists to North,Holland
VLSI Research
• Integratabte high-speed logic elements with state discd mination capability in the 5 t o 10 femtojoule range • Compat~
--•
~
i
o
n
t
engineering to provide opportunity for coordination and technology transfer.
~
M~ ~ e s Low ~ conductors Low impedance contacts Wafer ~ integration
Centers-of-Excellence and Programs
16 megabit D.RAMs
• Logic chips with greater than 1-rrdllion gate equivalents • Accurate 16 bit A/D and D/A conversion
• Field-reconfiguratk~ chip technology
Fig. 6a. SRC Research Goals Sciences.
The major components of the SRC research program are the Centers-of-Excellence and Programs. These are described below in order to identify a set of ten macroengineering objectives that provide coherence and direction to the research of approximately 100 faculty investigators.
Microstructure
• Architectures with 10X performarceadvantagesover
yon Nauman designs
• Architectures with reduced ,-,terconnection requirements • System ~ h e s i s capabilities at 10a logic element, 10 l j bit memory leve4 • A f f o r d a ~ generic testabilit't methods with > 9 5 percent fault coverage • Reconfigurable andlor fault tolerant system design methodologies • HierarchicaJ design systems that require < 6 engineering man. r r ~ t h s between ~ specification and e~or-fres layouts
Fig. 6b. SRC Research Goals - Design Sciences.
• Qualitycontrols that permit productKX~of chip6vw~hdefect densities below0.251cm2 • F~ocess automation perm~ffingwide product mix from same fab ~ and a 5)( improvement in prod,~tivity • Reduction in fat) line capital costs for given p~kctlon level • Re.-time oorre~tton of pn0o~s, devine, and cimutt modals kl the ixo(~ction • Cost-eflecth~epackage t e c ~ m s that extend to: - 100 W dis~paliorl - H ~ ~edaces - O p t ~ ~ - System ~e~ packaging - 4~0 ports • Product ~ l t y assuranoe at 1:106react l e ~ and Improvementin chip reliability of 2)( without bum.in • Mat~als and oo~'o~s that eliminate yield degradatlon due to mater~ va~,~:~tes • Mmro~ogytechniques and accuracies that s~Cz0ortother ma~Jfacturmg scmrces goaJs
Cornell - SRC Centerfor Microstructure and Technology The goal of this center is to carry out comprehensive research that will provide new knowledge and problem solutions for submicrometer VLSI. The research ranges from device and circuits through material and process studies to relatively fundamental studies of phenomena. Particular strengths are in submicron device structures, interconnections, and material studies.
University of California at Berkeley Design Center for CAD/IC The goals of the CAD Center which is a coordinated untertaking of UC/Berkeley and Carnegie-Mellon University are to extend the state-of-the-art in computer-aided design in the areas o f layout, simulation and modeling, design work stations, testability and test generation, optimization, computer-aided manufacturing and robotics, graphics, network reliability, and energy consumption. Emphasis at UC/ Berkeley is on the development and integration of CAD tools.
Fig. 6c. SRC Research Goals - Manufacturing Sciences.
SR C/Carnegie-Mellon University Design Automation~Computer-Aided Design Center
advise it on appropriate goals and strategies that are Compatible with the planned investment level. Workshops have been h e l d for gallium arsenide devices and for VLSI packaging. In addition, topical research conferences have met on multilevel simulation, deposition processes, testability, and interface
The long term goal of the CMU half of the CAD Center is to develop a design automation system capable of converting a behavorial system description into an error-free mask set for fabrication. It includes attention to testability and the use of knowledge based expert systems to achieve the goals as well as the multiplicity of design tools that characterize computer-aided design.
North-Holland
FGCSI 35
VLSI Research
Renssalaer Polytechnic Institute Advanced Beam Systems Technology Program
Stanford University Program on Manufacturing Science and Technologyfor VLSI
This center conducts research into applications of advanced electron, ion, and photon beams for VLSI processing. Investigations are underway on both cluster ion deposition and focused ion beam processing, proximity corrections for E-beam lithography, resists, and ion implantation. A focus of this effort is the development and evaluation of maskless and resistless processing technologies.
The objective of this program is to simulate VLS| manufacturing in order to enable prediction and thus control of process, device, and circuit parameter distributions resulting from manufacturing variations. It includes development of a high level programming language for specification of VLSI fabrication processes, generic models of fabrication equipment, special test patterns to facilitate modelrag, and a hierarchical parameter distribution control system.
MIT Three-Dimensional Circuits and Systems Technology Program At MIT the goal is to develop and gain understanding of the technologies required for the highly integrated systems of the future with emphasis on multilayer integrated circuits. T h e r e is an emphasis on materials and processes with film recrystallization, thin dielectrics, plasma-assisted CVD, plasma etching, and laser-induced CVD receiving attention. A packaging effort is included.
University of California, Santa Barbara Program in Gallium Arsenide Digital Device Technology The objective of this program is to establish a research base in digital gallium arsenide technology with initial emphasis on the high electron mobility transistor. Initial focus is on AIGaAs-GaAs heterojunctions, processing technologies, and laterallystructured multilevel configurations.
University of Michigan Program for Automation in Semiconductor Manufacturing Research directed to the automation of fabrication processes is the focus of this program. Initial emphasis is on two-unit process cells, lithography and reactive ion etching. Research tasks include process optimization, sensor development, machine vision, and expert systems concepts.
361 FGCS
Microelectronics Center of North Carolina Program in Integrated Circuits Manufacturing ~t'echnology This program is designed to gain fundamental understanding and solve key technology problems associated with a generic one-micrometer low temperature CMOS process. Research topics include shallow junction formation; controlled defect introduction and impurity control; effects of plasma enhanced processes on surface layers; plasma-assisted low temperature oxidation, nitridation, and epitaxy; effect of particulates on yield; and latchup.
Clemson University Program in VLSI Reliability Research This program is designed to obtain a basic understanding of both hard and soft failures in submicrometer geometry VLSI structures. Fundamental physical, chemical, and metallurgical phenomena related to thin dielectrics and contacts as well as failure mode determination are the initial emphasis of the research.
Research Program In addition to the Centers and Programs, there are fifty-three individual research projects for a total of over 150 investigators now performing research directed to the SRC goals. An attempt is made in this section to identify the scope of this research in a succinct fashion. This is arranged in Tables 1 - 3.
North-Holland
VLSI Research
Table 1 Microstructure Sciences A. Processes
1. Film deposition a. Cluster ion beams i. Sources ii. Film evaluation b. Laser-induced CVD c. Low t e m p e r a t u r e silicon epitaxy i. Sputtering ii. Plasma enhanced CVD d. Vacuum low temperature oxide deposition 2. Material removal by reactive ion and plasma etching 3. a. b. c.
Pattern formation Focused ion beam processing E-beam transient processing Maskless and resistless processing
4. Makes repair by laser CVD 5. a. b. c.
Material alteration Incoherent light and laser annealing Graphoepitaxy Controlled defect introduction
6. Process modeling and simulation B. Materials and Phenomena
1. a. b. c. d. e.
Dielectrics Mechanisms in thin oxide formation T h i n gate dielectrics and tunnel injectors Effect of nitrogen ion implantation on oxide formation Polyimide film structure Low temperature nitridation and oxidation
2. a. b. c. d. e.
Semiconductors AIGaAs - GaAs system Grain growth in thin SO 1 films Silicon surface micromorphology Noise mechanisms in conduction Impurity distribution in films
3. Resists a. Proximity effects in E-beam resists b. Particle beam resists 4. Interfaces a. Radiation effects in MOS structures
It is obvious that the SRC program is not complete with respect to the needs of the industry. Areas receiving inadequate or no attention at present include: Isolation structures Non-volatile memories Planarization Soft error immunity Super high density/high speed bipolar devices North-Holland
b. Origins of interface states c. Heat development and removal in films C. Device Behavior and Structures
1. a. b. c. d. e.
MOS Memory cell evaluation Multilevel integrated circuits Ultra-short-gatelength devices Low temperature MOS operation Latchup modeling
9. a. b. c.
Bipolar New triple diffused bipolar designs Phosphorous doped polysi emitters Polysilicon applications in VLSI
3. a. b. c. d. e. f. g. h.
Other Devices Complementary silicon MESFETs Hetrostructure devices Dual surface devices Periodic submicron structures Metal array-oxide-semiconductor structures AIGaAs-GaAs HEMT Laterally-structured multilevel devices Shallow,junction formation
D. Interconnecfions and Contacts
1. Contacts a. Low resistance submicron contacts b. Contacts to GaAs devices 2. a. b. c. d.
Techniques Metal/silicide CVD from solid sources MBE silicides Conductivity optimization in silicides Dielectrics for multilayer interconnects
3. Phenomena a. Electromigration in RIBE formed interconnects b. Metal-semiconductor interactions in contacts and interconnects 4. a. b. c.
Interconnect systems Transmission lines for high speed VLSI Monolithic optoelectronics for interchip comnumications Multilevel interconnect systems fbr submicron geometries
Wafer scale integration Metrology CAE for quality control and fabrication ' Computer-aided testing Innovative manufacturing techniques High power/high voltage devices High capacitance materials/structures Burn-in elimination At present, the funding is divided such that micro FGCS I 37
VLSI Research
Table 2 Design Sciences
Table 3 Manufacturing Sciences
A. Design - Macro
A. Process modeling and simulation
1. 2. 3. 4. 5.
1, Process specification programming language 2. Generic equipment and process models 3. Test patterns
Software methodology applied to VLSI design Silicon compilation Design work stations Synthesis systems Multilevel communications
B. Design - Device and Circuit
1. 2. 3, 4, 5.
Speed independent circuits Analog LSI/VLSI Verification Signal processors Shared memory designs
C. Simulation
1. 2, 3. 4, 5.
Efficiency Three-dimensional Device models and parameter extraction Timing Mixed mode
D. Layout
1. 2, 3. 4.
Gate matrix Ultra compaction algorithms Graph optimization techniques Routing Layout tools 51 Layout editor E. Testability
1. 2, 3. 4. 5. 6. 7.
Testing for physical failures On-line testi'ng Testable array multipliers Test generation PLA tests Testable designs CAT
s t r u c t u r e sciences gets o n e h a l f o f t h e total while d e s i g n a n d m a n u f a c t u r i n g sciences split the r e m a i n der.
Concerns and Challenges
B. Analytical Methods 1, Transmission electron microscopy of interfaces 2. Image processing for the SEM 3. Acousical microscopy C. Techniques
1. 2. 3. 4. 5. 6.
CAM and robotics Process information system Sensors for automation Unit cell process optimization Machine vision Expert control systems
D. Yield and reliability
1. 2. 3. 4. 5.
Particulate effects Reliability of thin dielectrics Failure mechanisms in contacts to thin layers Failure modes Effect of microcrystalline defects on device yield
E. Packaging
1. 2, 3. 4.
Advanced cooling techniques Interactions in bond interfaces Multilayer ceramic structures Micron conductors in a dielectric matrix
d o n b e i n g o b t a i n e d f r o m t h e technical staffs a m o n g t h e m e m b e r c o m p a n i e s . It is c o n v i n c e d t h a t the c o o p e r a t i v e s u p p o r t o f g e n e r i c r e s e a r c h is b e i n g p r o v e n as a viable c o n c e p t . At this e a r l y p o i n t in its existence, t h e SRC is f o c u s i n g o n c o n s t i t u e n c y building, t e c h n o l o g y d i s s e m i n a t i o n , a n d t h e d e v e l o p m e n t o f a c o o p e r a t i v e r e s e a r c h m a n a g e m e n t m o d e as h i g h p r i o r i t y activities. A t the s a m e time, we a r e l o o k i n g t o w a r d t h e possibility o f a f o u r times g r e a t e r b u d g e t within a f i v e - y e a r p e r i o d to w h e r e m a j o r research impacts are created.
T h e S R C is v e r y p l e a s e d with t h e u n i v e r s i t y r e s p o n s e to t h e V L S I r e s e a r c h initiative a n d to t h e p a r t i c i p a -
38 I F G C S
North-Holland
R.M. B U R G E R a n d L.W. SUMNEY Semiconductor Research Corporation, 300 Park Drive, Suite 215, P.O. Box 12053, Research Triangle Park, NC 27709, USA
Introduction In the recent past, it has become apparent that the alternative approaches to research and development in VLSI must be created if national industries are to survive in this highly competitive field. T h e magnitude and versatility of the resources available to even the largest companies are by themselves insufficient to sustain the pace o f the rapidly developing technology. A n u m b e r o f government-backed programs have been initiated in the industi"ialized nations to meet the competitive challenge (Fig. 1). By far the most successful of these is in Japan where prodigious resources have been focused in the laboratories of N T T to perform generic R&D for their semiconductor industry. Fully-developed technologies are transferred efficiently from N T T to the Japanese producers which themselves are among the largest industrial conglomerates in the world. Each of these conglomerates has targeted VLSI as an area o f growth and thus investment. T h e individual producers are able to focus their formidable resources and talents on production facilities and methods. This monolithic Japanese structure enables them to pursue almost every new concept that appears in the technical literature of the world and, for those technologies that are successful, to capitalize on them more rapidly than their originators. To cite but one example, the moat capacitor concept for the DRAM cell which was developed at Bell Laboratories has surfaced in the Hitachi 1 megabit DRAM prototype. At present, Japan is the competitive challenge to which other efforts are compared. No other national effort has appeared that can match the Japanese effort. This had become apparent in their rapidly increasing share of world VLSI markets (Fig. 2). Although U.S. industry remains competitive and still leads in sales, if the Japanese relative higher North-Holland
growth rate persists, this lead will rapidly disappear. In the U.S., the defense-funded VHSIC program is a coordinated large VLSI effort. Over $500 million has been programmed in this multiyear effort to obtain capabilities for production and application of chips with 11/4 micrometer and submicrometer design rules. Thts effort is however directed to meeting specific defense needs that deviate frOm those of the commercial marketplace. Moreover, VHSIC is presently focused on development, not research, and a considerable portion of the program is oriented to specific hardware needs, not generic technology. While there is a significant spillove r from VHSIC into the industrial sector, VHSIC dQes not provide the U.S. industry with an effective response to the competition from Japan. Another fledging response is the cooperative research effort that is being carried out by the Semiconductor Research Corporation (SRC). It must be pointed out at the onset that, although SRC exists because of the competitive threat to U.S. industry, it cannot be construed as an adequate response with its present program and structure. In the first half of 1984, SRC is funding research in academic laboratories at a level of $12 million a year. The significant feature of the SRC is that its program is an industry initiative with its research directed solely to the needs of the semiconductor industry. At present, SRC has
Japan
Substantial MiTI ~ efforts on VLS4.5th genmatg)n computer; R&O As~ctabon tm Future Electron Devices tsupeclattice devices 3-D IC',~ hardened IC's}, etc.
Europe
ESPRIT (Etm~ean Strategic Program for Research and taiocmation T ~ ts ere,~oned by tile Europmn Economic Community as a 5-year, $13 bt~m ~ u r e to I~ovide 'd'~efoundation for ~ mierool~lronies in the 1 ~ 0 ' ~
Great Bdtain
S3(~ m~on ,~ye~ re~z~w~'zprogram on Irffom~tton sciecce w~h comn~me~ ~o VLS~dBvs~pme~ - ~ p e r ~ ~ of U~OS;
Fr'm'~e
aP~l subsidlzed InduStry
US-DE~ ~
V~
DuffWB~)S ~
hinds.
US-Industry as,sum~c~dd ~
~ l(~,lsmosl b'nlporUmtt ~ .
Fig. 1. National Programs in Semiconductor Research. FGCS I 31
VLSI Research
30
FREE WORLD
$ BILLION
20
10 JAPAN
I
60
I
7O
I
80
I
I
90
YEAR
Fig. 2. Semiconductor Production. not benefited from any direct government funding. T h e model o f cooperation provided by the SRC may serve as guide for other cooperative programs that extend beyond the limited research program now underway to a broader array of activities that will help to revitalize the competitive ability of the U.S. semiconductor industry. In order to provide insight into the SRC and its potential impact on VLSI, the conceptual basis o f the SRC, its research strategy, and its present research program are described in the following sections ending with a critique o f the present program and structure. Although the SRC was incorporated in early 1982, it opened its offices a n d b e g a n operations in September o f that year. Thus, this report describes the results of one and one-half years o f the cooperative research program.
Conceptual Basis T h e SRC was initiated by eleven companies (Fig. 3) that originally had varying views as to what should be 32 I FGCS
done, but were convinced that a cooperative approach of some type was essential. Their views coalesced to define a research program based primarily in university laboratories which is directed toward providing generic research results for the industry and to increasing the numbers of university graduates with relevant eductional experiences. T h e SRC staff, with support of the m e m b e r companies, was directed to undertake an active role in the AdvancedMicro Devices, Inc. Bunoughs Control Data Corporation Digital Ecluipment Corp
LSI Logic Monolithic Mernodes. Ins, Monsanto Motorola. inc. NatiocmJ Semiconductor C,cxpora.t~c~ PerkinoElmer CorporatiOn RCA Rockwell SEMI-CHAPTER Silicon Systems Inc. Union Carbide CorporatiOn Vanan Westinghouse Electric Corporation Xemx
Fig. $. SRC Membership (April 1984). North-Holland
VLSI Research
research by developing an integrated research plan and interactiveiy working with the universities to respond to this plan. T h e research plan would reflect the needs of the industry. An important requirement was that the research would be implemented by means of contracts for needed research and not grants in support of good research. The founding members of the SRC recognized that university research depends for its strength on the open exchange of information. Any attempt of the SRC to prevent the flow of research results would be unacceptable to the universities and would destroy the creative ability required for good research. However, some membership prerogatives were desirable if not necessary to attract broad industry participation. T h e prerogatives that are defined include: (1) participation in the definition of a research program that is many times larger than the fee that each company pays, (2) lead time with respect to the public disclosure of research results, (3) participation in interactive research meetings with investigators,' (4) access to a planned data base on research activities and results, and (5) royalty-free license to patents and copyrights that may result from the research. The information that is produced by SRC support will, however, later become available through normal publications and technical meetings to everyone. The SRC recognizes that the proper role of the universities is not to solve current industry design and processing problems but is, instead, to obtain improved understanding of processes, materials, or phenomena; to identify, investigate, and evaluate innovative concepts; and to explore the frontiers of the applicable science and technology. Because the SRC began its activities with a strong image as a response mechanism to industry needs, there was a tendency of the universities to propose shorter-term research efforts and of the SRC to support problem solutions that were definable. This resulted in a university research program that complements parallel industry efforts but for which most of the solutions will actually come from industry laboratories where larger, more focused efforts are in place. As the SRC program evolves, it can be expected that emphasis will shift to longer range research, i.e., on the next generation of VLSI devices. In fact, a portion of the initial program is already aimed toward these future needs. From these beginnings, a set of broad goals has emerged for the SRC. T h e first goal might be termed constituency building. It is necessary that SRC demonstrate an early effectiveness to where the North-Holland
industry members and the better university research talents recognize the worth of cooperative generic research and collectively support its stability a n d growth. The rapid program implementation and the immediate effects of this on university research have started the constituency building process. As research results begin to emerge and communications between universities and industry are strengthened, progress toward this goal will accelerate. It will be reached when the SRC is accepted as a permanent institutional mechanism for the replenishment of the generic technology base of the VLSI industry. A second goal has been to define a coordinated research program that minimizes the fragmentation and redundancy of research efforts. Progress toward this goal is slower because it depends on the development of very high quality research efforts. The first steps taken by the SRC toward this goal have been aimed at developing programs that occupy niches in a broad research strategy and to develop the uniqueness of each project, program, and center. Next, through interactive research conferences and other information exchange methods, the participant is being made more fully aware of the part of the program of which he is a part so that he may participate in defining a unique role. A third goal is related to the training of more graduate students with backgrounds in semiconductor technology and science. Recent estimates based on an earlier survey of SRC contractors indicate that over 200 graduate students are now participating in SRC research. Graduate student envolvement is accentuated in project reviews and a continuing record will be maintained. A fourth goal is extension of the cooperative concept beyond the funding of academic research efforts to other areas of VLSI research and development that include process and tool development. As the industry matures, competition will decrease in the fabrication processes and production equipment but development and capital costs in these areas will continue to escalate. Cooperation thus becomes almost a necessity for survival. Mechanisms for this are being considered.
Research Strategy The initial plan of the SRC was to contract for research in defined technical areas that were selected on the basis of recognized industry needs. This plan included a hierarchical program structure. During the implementation of the initial research program, the concepts of themes and research vehicles were FGCSI 33
VLSI Research
introduced in o r d e r to provide increased focus to the larger efforts. Once the initial program was in place, it was examined critically to identify gaps and a set of more definitive research goals were formulated. At present, directions for orderly growth are being defined, procedures for improving the quality of the program are being developed, and considerable attention is being given to establishment of strong interfaces between the SRC members and t h e researchers. The initial program areas were defined as shown in Fig. 4. T h e intention was to allocate early funding approximately equally between the major technical areas. Responses received to a broad request for proposals, however, were unbalanced toward the microstructure sciences with only relatively few proposals related to manufacturing sciences. This reflects the traditional research interests of universities. T h e initial plan was also to identify several universities with strong capabilities for centers-ofexcellence in which strong funding would be provided for above threshold efforts toward macro engineering objectives supplemented by a n u m b e r of smaller contracts that address specific technical objectives. It was also suggested that at a later date linkages could be established among the various contractors in the several technical areas such that some of the research coordination would be provided by the research institutions, i.e., a strong lead center would coordinate the efforts of several centers and a n u m b e r of the smaller efforts (Fig. 5). The implementation o f this research program has resulted as o f March, 1984 in 53 contracts involving 36 institutions involving an annual rate of research expenditures exceeding $12 million. O f these, three institutions are associated with centers-of-excellence, seven institutions with programs that may evolve into
~
~
,~, SlmtemComponent
Fig. 4. Program Structure. 34 I FGCS
Fig. 5. Organizational Linkage. centers-of-excellence, and 30 in project level research efforts. The SRC considers stability a necessary condition for high quality academic research. Centers-of-excellence are considered to be long term efforts with inherent growth so long as the institution is able to maintain a high quality research program consistent with SRC goals. Programs are also multiyear efforts, that, if successful, may later become centers-of-excellence. In cases where the institutions are unable t o meet the performance objectives defined for the research, the intent of the SRC would be to phase programs down over a time sufficient to protect the interests of graduate students participating in the research. The smaller projects are planned for a specified term, in a majority of cases, this is three years. It is expected that the most relevant and productive Of these research efforts would continue through renewals while others would be replaced in response to new research priorities. As with any large research program, there are instances in which the research project is terminated because of performance lapses or unplanned circumstances. .Research goals for the SRC are listed in Fig. 6. It is important to note that the universities are not necessarily expected to attain these goals themselves, but rather are expected to perform research that helps SRC member companies to realize the goals. These goals provide a framework for guiding the research and assessing its relevance. Each university researcher is encouraged to generate specific objectives that describe the contributions expected from his research and to define milestones by which to measure progress toward the goals. As new thrusts are undertaken in the research program, the SRC has convened workshops of university, industry, and government specialists to North,Holland
VLSI Research
• Integratabte high-speed logic elements with state discd mination capability in the 5 t o 10 femtojoule range • Compat~
--•
~
i
o
n
t
engineering to provide opportunity for coordination and technology transfer.
~
M~ ~ e s Low ~ conductors Low impedance contacts Wafer ~ integration
Centers-of-Excellence and Programs
16 megabit D.RAMs
• Logic chips with greater than 1-rrdllion gate equivalents • Accurate 16 bit A/D and D/A conversion
• Field-reconfiguratk~ chip technology
Fig. 6a. SRC Research Goals Sciences.
The major components of the SRC research program are the Centers-of-Excellence and Programs. These are described below in order to identify a set of ten macroengineering objectives that provide coherence and direction to the research of approximately 100 faculty investigators.
Microstructure
• Architectures with 10X performarceadvantagesover
yon Nauman designs
• Architectures with reduced ,-,terconnection requirements • System ~ h e s i s capabilities at 10a logic element, 10 l j bit memory leve4 • A f f o r d a ~ generic testabilit't methods with > 9 5 percent fault coverage • Reconfigurable andlor fault tolerant system design methodologies • HierarchicaJ design systems that require < 6 engineering man. r r ~ t h s between ~ specification and e~or-fres layouts
Fig. 6b. SRC Research Goals - Design Sciences.
• Qualitycontrols that permit productKX~of chip6vw~hdefect densities below0.251cm2 • F~ocess automation perm~ffingwide product mix from same fab ~ and a 5)( improvement in prod,~tivity • Reduction in fat) line capital costs for given p~kctlon level • Re.-time oorre~tton of pn0o~s, devine, and cimutt modals kl the ixo(~ction • Cost-eflecth~epackage t e c ~ m s that extend to: - 100 W dis~paliorl - H ~ ~edaces - O p t ~ ~ - System ~e~ packaging - 4~0 ports • Product ~ l t y assuranoe at 1:106react l e ~ and Improvementin chip reliability of 2)( without bum.in • Mat~als and oo~'o~s that eliminate yield degradatlon due to mater~ va~,~:~tes • Mmro~ogytechniques and accuracies that s~Cz0ortother ma~Jfacturmg scmrces goaJs
Cornell - SRC Centerfor Microstructure and Technology The goal of this center is to carry out comprehensive research that will provide new knowledge and problem solutions for submicrometer VLSI. The research ranges from device and circuits through material and process studies to relatively fundamental studies of phenomena. Particular strengths are in submicron device structures, interconnections, and material studies.
University of California at Berkeley Design Center for CAD/IC The goals of the CAD Center which is a coordinated untertaking of UC/Berkeley and Carnegie-Mellon University are to extend the state-of-the-art in computer-aided design in the areas o f layout, simulation and modeling, design work stations, testability and test generation, optimization, computer-aided manufacturing and robotics, graphics, network reliability, and energy consumption. Emphasis at UC/ Berkeley is on the development and integration of CAD tools.
Fig. 6c. SRC Research Goals - Manufacturing Sciences.
SR C/Carnegie-Mellon University Design Automation~Computer-Aided Design Center
advise it on appropriate goals and strategies that are Compatible with the planned investment level. Workshops have been h e l d for gallium arsenide devices and for VLSI packaging. In addition, topical research conferences have met on multilevel simulation, deposition processes, testability, and interface
The long term goal of the CMU half of the CAD Center is to develop a design automation system capable of converting a behavorial system description into an error-free mask set for fabrication. It includes attention to testability and the use of knowledge based expert systems to achieve the goals as well as the multiplicity of design tools that characterize computer-aided design.
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FGCSI 35
VLSI Research
Renssalaer Polytechnic Institute Advanced Beam Systems Technology Program
Stanford University Program on Manufacturing Science and Technologyfor VLSI
This center conducts research into applications of advanced electron, ion, and photon beams for VLSI processing. Investigations are underway on both cluster ion deposition and focused ion beam processing, proximity corrections for E-beam lithography, resists, and ion implantation. A focus of this effort is the development and evaluation of maskless and resistless processing technologies.
The objective of this program is to simulate VLS| manufacturing in order to enable prediction and thus control of process, device, and circuit parameter distributions resulting from manufacturing variations. It includes development of a high level programming language for specification of VLSI fabrication processes, generic models of fabrication equipment, special test patterns to facilitate modelrag, and a hierarchical parameter distribution control system.
MIT Three-Dimensional Circuits and Systems Technology Program At MIT the goal is to develop and gain understanding of the technologies required for the highly integrated systems of the future with emphasis on multilayer integrated circuits. T h e r e is an emphasis on materials and processes with film recrystallization, thin dielectrics, plasma-assisted CVD, plasma etching, and laser-induced CVD receiving attention. A packaging effort is included.
University of California, Santa Barbara Program in Gallium Arsenide Digital Device Technology The objective of this program is to establish a research base in digital gallium arsenide technology with initial emphasis on the high electron mobility transistor. Initial focus is on AIGaAs-GaAs heterojunctions, processing technologies, and laterallystructured multilevel configurations.
University of Michigan Program for Automation in Semiconductor Manufacturing Research directed to the automation of fabrication processes is the focus of this program. Initial emphasis is on two-unit process cells, lithography and reactive ion etching. Research tasks include process optimization, sensor development, machine vision, and expert systems concepts.
361 FGCS
Microelectronics Center of North Carolina Program in Integrated Circuits Manufacturing ~t'echnology This program is designed to gain fundamental understanding and solve key technology problems associated with a generic one-micrometer low temperature CMOS process. Research topics include shallow junction formation; controlled defect introduction and impurity control; effects of plasma enhanced processes on surface layers; plasma-assisted low temperature oxidation, nitridation, and epitaxy; effect of particulates on yield; and latchup.
Clemson University Program in VLSI Reliability Research This program is designed to obtain a basic understanding of both hard and soft failures in submicrometer geometry VLSI structures. Fundamental physical, chemical, and metallurgical phenomena related to thin dielectrics and contacts as well as failure mode determination are the initial emphasis of the research.
Research Program In addition to the Centers and Programs, there are fifty-three individual research projects for a total of over 150 investigators now performing research directed to the SRC goals. An attempt is made in this section to identify the scope of this research in a succinct fashion. This is arranged in Tables 1 - 3.
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VLSI Research
Table 1 Microstructure Sciences A. Processes
1. Film deposition a. Cluster ion beams i. Sources ii. Film evaluation b. Laser-induced CVD c. Low t e m p e r a t u r e silicon epitaxy i. Sputtering ii. Plasma enhanced CVD d. Vacuum low temperature oxide deposition 2. Material removal by reactive ion and plasma etching 3. a. b. c.
Pattern formation Focused ion beam processing E-beam transient processing Maskless and resistless processing
4. Makes repair by laser CVD 5. a. b. c.
Material alteration Incoherent light and laser annealing Graphoepitaxy Controlled defect introduction
6. Process modeling and simulation B. Materials and Phenomena
1. a. b. c. d. e.
Dielectrics Mechanisms in thin oxide formation T h i n gate dielectrics and tunnel injectors Effect of nitrogen ion implantation on oxide formation Polyimide film structure Low temperature nitridation and oxidation
2. a. b. c. d. e.
Semiconductors AIGaAs - GaAs system Grain growth in thin SO 1 films Silicon surface micromorphology Noise mechanisms in conduction Impurity distribution in films
3. Resists a. Proximity effects in E-beam resists b. Particle beam resists 4. Interfaces a. Radiation effects in MOS structures
It is obvious that the SRC program is not complete with respect to the needs of the industry. Areas receiving inadequate or no attention at present include: Isolation structures Non-volatile memories Planarization Soft error immunity Super high density/high speed bipolar devices North-Holland
b. Origins of interface states c. Heat development and removal in films C. Device Behavior and Structures
1. a. b. c. d. e.
MOS Memory cell evaluation Multilevel integrated circuits Ultra-short-gatelength devices Low temperature MOS operation Latchup modeling
9. a. b. c.
Bipolar New triple diffused bipolar designs Phosphorous doped polysi emitters Polysilicon applications in VLSI
3. a. b. c. d. e. f. g. h.
Other Devices Complementary silicon MESFETs Hetrostructure devices Dual surface devices Periodic submicron structures Metal array-oxide-semiconductor structures AIGaAs-GaAs HEMT Laterally-structured multilevel devices Shallow,junction formation
D. Interconnecfions and Contacts
1. Contacts a. Low resistance submicron contacts b. Contacts to GaAs devices 2. a. b. c. d.
Techniques Metal/silicide CVD from solid sources MBE silicides Conductivity optimization in silicides Dielectrics for multilayer interconnects
3. Phenomena a. Electromigration in RIBE formed interconnects b. Metal-semiconductor interactions in contacts and interconnects 4. a. b. c.
Interconnect systems Transmission lines for high speed VLSI Monolithic optoelectronics for interchip comnumications Multilevel interconnect systems fbr submicron geometries
Wafer scale integration Metrology CAE for quality control and fabrication ' Computer-aided testing Innovative manufacturing techniques High power/high voltage devices High capacitance materials/structures Burn-in elimination At present, the funding is divided such that micro FGCS I 37
VLSI Research
Table 2 Design Sciences
Table 3 Manufacturing Sciences
A. Design - Macro
A. Process modeling and simulation
1. 2. 3. 4. 5.
1, Process specification programming language 2. Generic equipment and process models 3. Test patterns
Software methodology applied to VLSI design Silicon compilation Design work stations Synthesis systems Multilevel communications
B. Design - Device and Circuit
1. 2. 3, 4, 5.
Speed independent circuits Analog LSI/VLSI Verification Signal processors Shared memory designs
C. Simulation
1. 2, 3. 4, 5.
Efficiency Three-dimensional Device models and parameter extraction Timing Mixed mode
D. Layout
1. 2, 3. 4.
Gate matrix Ultra compaction algorithms Graph optimization techniques Routing Layout tools 51 Layout editor E. Testability
1. 2, 3. 4. 5. 6. 7.
Testing for physical failures On-line testi'ng Testable array multipliers Test generation PLA tests Testable designs CAT
s t r u c t u r e sciences gets o n e h a l f o f t h e total while d e s i g n a n d m a n u f a c t u r i n g sciences split the r e m a i n der.
Concerns and Challenges
B. Analytical Methods 1, Transmission electron microscopy of interfaces 2. Image processing for the SEM 3. Acousical microscopy C. Techniques
1. 2. 3. 4. 5. 6.
CAM and robotics Process information system Sensors for automation Unit cell process optimization Machine vision Expert control systems
D. Yield and reliability
1. 2. 3. 4. 5.
Particulate effects Reliability of thin dielectrics Failure mechanisms in contacts to thin layers Failure modes Effect of microcrystalline defects on device yield
E. Packaging
1. 2, 3. 4.
Advanced cooling techniques Interactions in bond interfaces Multilayer ceramic structures Micron conductors in a dielectric matrix
d o n b e i n g o b t a i n e d f r o m t h e technical staffs a m o n g t h e m e m b e r c o m p a n i e s . It is c o n v i n c e d t h a t the c o o p e r a t i v e s u p p o r t o f g e n e r i c r e s e a r c h is b e i n g p r o v e n as a viable c o n c e p t . At this e a r l y p o i n t in its existence, t h e SRC is f o c u s i n g o n c o n s t i t u e n c y building, t e c h n o l o g y d i s s e m i n a t i o n , a n d t h e d e v e l o p m e n t o f a c o o p e r a t i v e r e s e a r c h m a n a g e m e n t m o d e as h i g h p r i o r i t y activities. A t the s a m e time, we a r e l o o k i n g t o w a r d t h e possibility o f a f o u r times g r e a t e r b u d g e t within a f i v e - y e a r p e r i o d to w h e r e m a j o r research impacts are created.
T h e S R C is v e r y p l e a s e d with t h e u n i v e r s i t y r e s p o n s e to t h e V L S I r e s e a r c h initiative a n d to t h e p a r t i c i p a -
38 I F G C S
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