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Hydrogen annealing effects on epitaxy of SOI wafer
Materials Letters 59 (2005) 361 – 365 www.elsevier.com/locate/matlet
Hydrogen annealing effects on epitaxy of SOI wafer Xinli Cheng*, Zhilang Lin, Yongjin Wang, Haibo Xiao, Feng Zhang, Shichang Zou Ion Beam Laboratory, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences, 865 Changning Road, Shanghai 200050, China Received 9 March 2004; received in revised form 11 August 2004; accepted 3 October 2004 Available online 21 October 2004
Abstract Thick silicon on insulator (SOI) wafers have been fabricated by chemical vapor deposition (CVD) after separation by implantation of oxygen (SIMOX) process. The hydrogen annealing effects on epitaxial Si layer were studied. The hydrogen annealing could remove the surface damages of substrate caused by SIMOX process and provide a smoother epitaxial substrate. The number of dislocations and stacking faults in the epitaxial layer decreased remarkably by hydrogen annealing SOI substrate. Meanwhile, compared with other reports, our hydrogen annealing did not degrade the buried oxide layer and top Si layer of SOI substrate. D 2004 Elsevier B.V. All rights reserved. Keywords: Hydrogen annealing; SOI; Epitaxy
1. Introduction Silicon on insulator (SOI) has a lot of potential advantages in Si-based device technology, i.e., process simplification, packing density, radiation, hardness, and improvement of device performances. The SOI-based devices have been widely used in harsh environment such as high temperature and radiation electronics in automotive, space, and military applications [1,2]. Meanwhile, Si is nearly transparent at the telecommunication wavelengths (1.30 and 1.55 Am). The large refractive index difference between the top Si layer and the buried silicon oxide (BOX) insulator insures high field confinement in the Si guiding layer, so SOI is very excellent material for optical waveguide. Many researchers have begun to study rib optical waveguide on the SOI materials [3,4]. At present, many kinds of technology may be used to fabricate the SOI materials. Separation by implantation of
* Corresponding author. Tel.: +86 21 62511070; fax: +86 21 62513510. E-mail address: [email protected] (X. Cheng). 0167-577X/$ - see front matter D 2004 Elsevier B.V. All rights reserved. doi:10.1016/j.matlet.2004.10.025
oxygen (SIMOX) is very developed technology for fabrication of SOI wafers. In SIMOX SOI wafers, the Si/ SiO2 interface is very sharp, so it is to good for light to transmit in Si layer. Whereas the thickness of the top Si layer of the typical SIMOX SOI is less than 0.5Am, and the Si layer of SOI for rib waveguide generally needs a few microns, so it needs epitaxy to increase the thickness of Si layer of SIMOX SOI wafers for optical waveguide devices. Therefore, it is worthy to grow the thicker Si layer on the SIMOX SOI substrates by chemical vapor deposition (CVD) epitaxy technology. In the epitaxy process, the SOI wafers will be in the hydrogen vapor at high temperature when heating the epitaxy system, and the hydrogen vapor at high temperature has important effects on the SOI substrates. The SIMOX SOI wafers in hydrogen vapor at high temperature have been investigated: the top Si layer will become damaged and BOX will be partly dissolved [5,6], these results indicate hydrogen annealing at high temperature will damage the SIMOX SOI partly. However, there also have other reports that hydrogen annealing may be used to obtain high-quality SOI surfaces [7,8], and this indicates the hydrogen annealing also has good effects for SOI materials.
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In this paper, we reported and discussed the effects of hydrogen annealing on the SIMOX SOI wafers before CVD epitaxy growth of Si layer. In experiment, we found that it is good to grow the better crystal Si layer on the SIMOX SOI substrates by hydrogen annealing substrates properly at high temperature before epitaxy growth.
2. Experiment details The SIMOX SOI substrates were prepared according to the following process: Oxygen ions(16O+) were implanted into 100 mm p-type(100) CZ Si wafers with resistivity of 10~20 V cm at an angle of incidence of approximately 78 to the surfaces, with acceleration energy of 160 keV at the standard dose(1.81018 cm2).The wafer temperature during the implantation was maintained at 680 8C. Subsequently the wafers were annealed at 1300 8C in an Ar+O2(b1%) ambient for 5 h. The epitaxial Si layers were grown in a barrel type reactor which has a graphite susceptor coated with silicon carbide. The susceptor was etched by HCl and coated with a layer of undoped silicon before loading the SOI substrate wafers for epitaxial growth. The silicon source was SiHCl3. Sample A was prepared as follows: the epitaxial growth was conducted at about 1150 8C and the deposition time was approximately 17 min at a depositional rate of 0.3~0.5 A/min. Sample B was annealed in hydrogen about 10 min before epitaxial growth at 1150 8C, the other conditions are same to sample A. As a comparison, the epitaxial Si layer on the CZ Si wafer was also prepared at sample A’s condition. After epitaxial growth, the top Si layer thickness of the SOI was measured by spectroscopic ellipsometry (SE). The dislocations and stacking faults in epitaxial Si layers were delineated by Secco etch and were observed with optical microscopy. Modified enhanced Secco etch method [9,10] was applied to estimate the threading dislocation density for superficial Si layer of SIMOX SOI substrate. After Secco etch, the remaining Si thickness of the epitaxial SOI was also measured by SE. The surfaces of the substrates were observed by Multimode Nanoscope E type atomic force microscopy (AFM). The oxygen profiles of the substrate with hydrogen annealing and the substrate without hydrogen annealing were analyzed by second ion mass spectroscopy (SIMS). The SOI substrate quality was evaluated by Rutherford backscattering and channeling spectroscopy (RBS/C).
Fig. 1 shows the optical micrographs of the preferential etched surfaces of epitaxial Si layer of (a) sample A and (b) sample B. The etching pits of the dislocations and single stacking faults in epitaxial Si layer were observed easily in sample A, as shown in Fig. 1(a). We did not observe the stacking faults in the epitaxial layer of sample B, as shown in Fig. 1(b). The remaining Si layer thickness obtained by SE after Secco etch is about 6.5 Am. In fact, we may obtain the thickness of remaining epitaxial Si layer according to the following equation: dEpi ¼ 0:707LF ; where d Epi is the thickness of remaining epitaxial Si layer and L F is the length of stacking faults. After measurement and calculation, the thickness of remaining epitaxial Si layer is about 6.8 Am. There is a little difference of remaining Si layer thickness obtained by two methods, and we think this may be caused by different measurement ways. For SE method, the measured result is impacted by the sample surface. After Secco etch, the top Si surface was not so
3. Results and discussion For SIMOX substrate, the thickness of the top Si layer is about 200 nm, the buried oxide (BOX) is 378 nm, and the dislocation density in SOI substrate is about 2.0106 cm2. After the epitaxial growth, the top Si layer is about 7.80 Am.
Fig. 1. Optical micrographs of the preferential etched surfaces of epitaxial Si layer on (a) SOI substrate without hydrogen annealing and (b) SOI substrate with hydrogen annealing.
X. Cheng et al. / Materials Letters 59 (2005) 361–365
smooth as before because of preferential etch. Therefore, we think that the result by SE may be not very correct and that the remaining Si thickness from stacking faults is more credible. The dislocations found in the sample A are mostly in pairs, this result accords with Prieur’s report [11]. SIMOX process will lead to a great many threading dislocations in SOI wafers, and these dislocations are almost in pairs. In epitaxy growth, threading dislocations in SOI substrates will extend to epitaxial Si layer with the Si deposition. Therefore, threading dislocations in substrates will exist in pair in epitaxial layer; however, the distance between the two etch pits will increase when epitaxial layer thickness increase. Similar to sample A, there are a lot of dislocation pairs in the epitaxial Si layer of sample B; however, the amount of dislocations reduces obviously. The defect densities of epitaxial Si layer were obtained by averaging ten areas according to the optical micrographs. For sample A, the dislocation density of epitaxial Si layer is 1.37106 cm2, and the stacking fault density is 1.26104 cm2; for sample B, the dislocation density of epitaxial Si layer is 3.98104 cm2. The dislocation density in eiptaxial Si layer of sample A is in the same order to that of SOI substrate. We think the dislocations in the epitaxial layers mainly resulted from the threading dislocations in SOI substrates. As for stacking faults, they mainly resulted from the surfaces of SOI substrates. In addition, we grew Si layer on CZ Si wafer at the same epitaxy condition to sample A, and we did not observe the dislocations and stacking faults in the epitaxial layer. This also confirms that the defects in epitaxial Si layer result from the SOI substrates. Result from sample B shows that hydrogen annealing may eliminate some threading dislocations. The single-crystal quality of epitaxial layer is related to the surface of the substrate. Hence, we studied the surfaces of SIMOX SOI substrates, including the substrate with hydrogen annealing and the substrate without hydrogen annealing. The surfaces of substrates were studied by AFM, which can reveal the detail of the morphology of the material surfaces. The root-mean-square roughness (R rms) is given by the standard deviation over all height values within the surface area interested. In this study, the R rms is obtained by averaging ten different areas. Fig. 2 show the AFM images of the surface of (a) SOI substrate without annealing and (b) SOI substrate with hydrogen annealing at high temperature. For the substrate without annealing, there are many pits in the surface, as shown in Fig. 2(a), and the surface R rms is 1.065 nm. These pits resulted from the process of preparing SIMOX substrate. In SIMOX process, the high-energy O ions are implanted into the surface layer of Si wafer first, and the implanted O ions will combine with Si atoms to form small precipitates. At the same time, the Si lattices will be damaged because of the bombardment of high-energy ions. The second step is high-temperature annealing to form BOX and eliminate partly lattice damage. The damaged surface of Si wafer cannot recover to original
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Fig. 2. AFM images of surface of (a) SOI substrate without hydrogen annealing and (b) SOI substrate with hydrogen annealing.
state after high-temperature annealing, and many pits will exist in the SOI surface. The stress generated during annealing will lead to dislocations when the small oxide precipitates form the BOX layer. The stress mainly results from expand of volume because of the formation of BOX [12]. For the substrate annealed by high-temperature hydrogen, the surface is smoother, as shown in Fig. 2(b), and the R rms is 0.374 nm. The surface of SOI substrate became smoother after hydrogen annealing, indicating that hydrogen annealing can improve the quality of the surface of SIMOX SOI substrate. This is mainly due to the migration of surface Si atoms driven by surface energy minimization after removing native oxide on the SOI surface [8], so the better Si layer may grow on the SOI substrate after hydrogen annealing. There are reports that the SIMOX SOI substrate will be damaged in hydrogen at high temperature. The oxygen content in BOX will decrease, and the defects will generate in the top Si layer [5,6]. The main reason is that SIMOX SOI wafer is not very good because of immaturity of SIMOX technology, and there are many defects in the top Si
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layer of SOI wafer. At high temperature, hydrogen may transfer through top Si to the interface of Si and BOX and react with oxygen, and then O2 (or H2O) will generate and leave off the SOI wafer. Hence, we used SIMS to evaluate oxygen profile of SOI substrates, the result is shown in Fig. 3. Fig. 3 shows the structure of two SOI substrates clearly, including native oxide, top Si layer, BOX, and substrate bulk Si. There is nearly not difference of oxygen concentration in BOX between the substrate with hydrogen annealing and the substrate without hydrogen annealing. This indicates that the oxygen of BOX of SOI substrate did not decrease after hydrogen annealing, and this point is different to the report in Ref. [6]. In addition, RBS/C was used to evaluate the single crystal of SOI substrates, using 2 MeV 4He+ beam with a backscattering angle of 1708, and the result is shown in Fig. 4. Fig. 4(a), (b) are RBS/C spectra of the SOI substrates without and with hydrogen annealing, respectively. The crystal quality of SOI was estimated by v min, where v is a comparison of channeling and random yields. For the substrate without hydrogen annealing, v min value is 8.2%, as for substrate with hydrogen annealing, v min value is 8.0%. This indicates single-crystal quality of two SOI substrates is not very good (for CZ Si wafer, v min is about 3~4%). This also shows that the top Si of SOI was damaged in preparing process. The v min value of annealing substrate did not increase, and this indicates that SOI substrate was not damaged again during hydrogen annealing. Meanwhile, the spectra of two substrates have nearly no difference; this also indicates that SOI substrate quality did not change nearly after hydrogen annealing. Therefore, hydrogen annealing did not damage the top Si and BOX of the substrate; in contrast, it made the quality of the surface of SOI substrate improvement. We think this is due to the development of the SIMOX technology, and presently the quality of SIMOX SOI wafer is very good. Therefore, it
Fig. 4. RBS/C spectra of SOI substrate (a) without hydrogen annealing and (b) with hydrogen annealing.
is a good way to grow the better single-crystal Si layer by proper hydrogen annealing on SIMOX SOI wafer before epitaxy growth.
4. Conclusions The SIMOX SOI substrates and epitaxial Si layers on them were prepared. AFM result shows that hydrogen annealing can smooth the surface of SOI substrate. SIMS and RBS results show that hydrogen annealing did not damage the top Si and BOX layer of SOI substrate. The epitaxial Si layer on the SOI substrate with hydrogen annealing has lower defect density than that on the SOI substrate without hydrogen annealing. In the process of epitaxy growth on SOI substrate, the quality of epitaxial Si layer may be improved by hydrogen annealing substrate.
Acknowledgements
Fig. 3. SIMS oxygen depth profiles of the SOI substrate without hydrogen annealing and the substrate with hydrogen annealing.
This work was financially supported by the grant from the 863-Programme of the Ministry of Science and Technology of China (No. 2001AA312070).
X. Cheng et al. / Materials Letters 59 (2005) 361–365
References [1] R.E. Mikawa, M.R. Ackerman, IEEE Trans. Nucl. Sci. 34 (1987) 1698. [2] D. Herve, P. Paillet, J.L. Leray, IEEE Trans. Nucl. Sci. 41 (1994) 466. [3] Richard A. Sorf, Joachim Schmidtchen, Klaus Petermann, IEEE J. Quantum Electron. 27 (1991) 1971. [4] B.N. Kurdi, D.G. Hall, Opt. Lett. 13 (1988) 175. [5] Li Jinhua, Lin Chenglu, Lin Zhixing, Zhou Zuyao, Zou Shichang, Nucl. Instrum. Methods Phys. Res., B 59–60 (1991) 685. [6] Li Jinhua, Lin Chenglu, Lin Zhixing, Guangcai Xue, Zou Shichang, Chin. J. Semicond. 14 (1993) 57, Chinese.
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[7] H. Moriceau, A.M. Cartier, B. Aspar, C. Malevelle, T. Barge, A.J. Auberton, Proceedings 1998 IEEE International SOI Conference, 1998, p. 37. [8] Nobuhiko Sato, Takao Yonehara, Appl. Phys. Lett. 65 (1994) 1924. [9] F. Secco d ’Aragona, J. Electrochem. Soc. 119 (1972) 948. [10] H. Gassel, J. Peter-Wedemann, H. Vogt, in: W.E. Bailey (Ed.), Silicon on Insulator Technology and Devices, The Electronchemical Society, Pennington, 1991, p. 200. [11] E. Prieur, C. Guilhalmenc, J. H7rtwig, M. Ohler, A. Garcia, B. Aspar, J. Appl. Phys. 80 (1996) 2113. [12] Sadao Nakashima, Katsutoshi Izumi, J. Mater. Res. 8 (1993) 523.
Hydrogen annealing effects on epitaxy of SOI wafer Xinli Cheng*, Zhilang Lin, Yongjin Wang, Haibo Xiao, Feng Zhang, Shichang Zou Ion Beam Laboratory, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences, 865 Changning Road, Shanghai 200050, China Received 9 March 2004; received in revised form 11 August 2004; accepted 3 October 2004 Available online 21 October 2004
Abstract Thick silicon on insulator (SOI) wafers have been fabricated by chemical vapor deposition (CVD) after separation by implantation of oxygen (SIMOX) process. The hydrogen annealing effects on epitaxial Si layer were studied. The hydrogen annealing could remove the surface damages of substrate caused by SIMOX process and provide a smoother epitaxial substrate. The number of dislocations and stacking faults in the epitaxial layer decreased remarkably by hydrogen annealing SOI substrate. Meanwhile, compared with other reports, our hydrogen annealing did not degrade the buried oxide layer and top Si layer of SOI substrate. D 2004 Elsevier B.V. All rights reserved. Keywords: Hydrogen annealing; SOI; Epitaxy
1. Introduction Silicon on insulator (SOI) has a lot of potential advantages in Si-based device technology, i.e., process simplification, packing density, radiation, hardness, and improvement of device performances. The SOI-based devices have been widely used in harsh environment such as high temperature and radiation electronics in automotive, space, and military applications [1,2]. Meanwhile, Si is nearly transparent at the telecommunication wavelengths (1.30 and 1.55 Am). The large refractive index difference between the top Si layer and the buried silicon oxide (BOX) insulator insures high field confinement in the Si guiding layer, so SOI is very excellent material for optical waveguide. Many researchers have begun to study rib optical waveguide on the SOI materials [3,4]. At present, many kinds of technology may be used to fabricate the SOI materials. Separation by implantation of
* Corresponding author. Tel.: +86 21 62511070; fax: +86 21 62513510. E-mail address: [email protected] (X. Cheng). 0167-577X/$ - see front matter D 2004 Elsevier B.V. All rights reserved. doi:10.1016/j.matlet.2004.10.025
oxygen (SIMOX) is very developed technology for fabrication of SOI wafers. In SIMOX SOI wafers, the Si/ SiO2 interface is very sharp, so it is to good for light to transmit in Si layer. Whereas the thickness of the top Si layer of the typical SIMOX SOI is less than 0.5Am, and the Si layer of SOI for rib waveguide generally needs a few microns, so it needs epitaxy to increase the thickness of Si layer of SIMOX SOI wafers for optical waveguide devices. Therefore, it is worthy to grow the thicker Si layer on the SIMOX SOI substrates by chemical vapor deposition (CVD) epitaxy technology. In the epitaxy process, the SOI wafers will be in the hydrogen vapor at high temperature when heating the epitaxy system, and the hydrogen vapor at high temperature has important effects on the SOI substrates. The SIMOX SOI wafers in hydrogen vapor at high temperature have been investigated: the top Si layer will become damaged and BOX will be partly dissolved [5,6], these results indicate hydrogen annealing at high temperature will damage the SIMOX SOI partly. However, there also have other reports that hydrogen annealing may be used to obtain high-quality SOI surfaces [7,8], and this indicates the hydrogen annealing also has good effects for SOI materials.
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X. Cheng et al. / Materials Letters 59 (2005) 361–365
In this paper, we reported and discussed the effects of hydrogen annealing on the SIMOX SOI wafers before CVD epitaxy growth of Si layer. In experiment, we found that it is good to grow the better crystal Si layer on the SIMOX SOI substrates by hydrogen annealing substrates properly at high temperature before epitaxy growth.
2. Experiment details The SIMOX SOI substrates were prepared according to the following process: Oxygen ions(16O+) were implanted into 100 mm p-type(100) CZ Si wafers with resistivity of 10~20 V cm at an angle of incidence of approximately 78 to the surfaces, with acceleration energy of 160 keV at the standard dose(1.81018 cm2).The wafer temperature during the implantation was maintained at 680 8C. Subsequently the wafers were annealed at 1300 8C in an Ar+O2(b1%) ambient for 5 h. The epitaxial Si layers were grown in a barrel type reactor which has a graphite susceptor coated with silicon carbide. The susceptor was etched by HCl and coated with a layer of undoped silicon before loading the SOI substrate wafers for epitaxial growth. The silicon source was SiHCl3. Sample A was prepared as follows: the epitaxial growth was conducted at about 1150 8C and the deposition time was approximately 17 min at a depositional rate of 0.3~0.5 A/min. Sample B was annealed in hydrogen about 10 min before epitaxial growth at 1150 8C, the other conditions are same to sample A. As a comparison, the epitaxial Si layer on the CZ Si wafer was also prepared at sample A’s condition. After epitaxial growth, the top Si layer thickness of the SOI was measured by spectroscopic ellipsometry (SE). The dislocations and stacking faults in epitaxial Si layers were delineated by Secco etch and were observed with optical microscopy. Modified enhanced Secco etch method [9,10] was applied to estimate the threading dislocation density for superficial Si layer of SIMOX SOI substrate. After Secco etch, the remaining Si thickness of the epitaxial SOI was also measured by SE. The surfaces of the substrates were observed by Multimode Nanoscope E type atomic force microscopy (AFM). The oxygen profiles of the substrate with hydrogen annealing and the substrate without hydrogen annealing were analyzed by second ion mass spectroscopy (SIMS). The SOI substrate quality was evaluated by Rutherford backscattering and channeling spectroscopy (RBS/C).
Fig. 1 shows the optical micrographs of the preferential etched surfaces of epitaxial Si layer of (a) sample A and (b) sample B. The etching pits of the dislocations and single stacking faults in epitaxial Si layer were observed easily in sample A, as shown in Fig. 1(a). We did not observe the stacking faults in the epitaxial layer of sample B, as shown in Fig. 1(b). The remaining Si layer thickness obtained by SE after Secco etch is about 6.5 Am. In fact, we may obtain the thickness of remaining epitaxial Si layer according to the following equation: dEpi ¼ 0:707LF ; where d Epi is the thickness of remaining epitaxial Si layer and L F is the length of stacking faults. After measurement and calculation, the thickness of remaining epitaxial Si layer is about 6.8 Am. There is a little difference of remaining Si layer thickness obtained by two methods, and we think this may be caused by different measurement ways. For SE method, the measured result is impacted by the sample surface. After Secco etch, the top Si surface was not so
3. Results and discussion For SIMOX substrate, the thickness of the top Si layer is about 200 nm, the buried oxide (BOX) is 378 nm, and the dislocation density in SOI substrate is about 2.0106 cm2. After the epitaxial growth, the top Si layer is about 7.80 Am.
Fig. 1. Optical micrographs of the preferential etched surfaces of epitaxial Si layer on (a) SOI substrate without hydrogen annealing and (b) SOI substrate with hydrogen annealing.
X. Cheng et al. / Materials Letters 59 (2005) 361–365
smooth as before because of preferential etch. Therefore, we think that the result by SE may be not very correct and that the remaining Si thickness from stacking faults is more credible. The dislocations found in the sample A are mostly in pairs, this result accords with Prieur’s report [11]. SIMOX process will lead to a great many threading dislocations in SOI wafers, and these dislocations are almost in pairs. In epitaxy growth, threading dislocations in SOI substrates will extend to epitaxial Si layer with the Si deposition. Therefore, threading dislocations in substrates will exist in pair in epitaxial layer; however, the distance between the two etch pits will increase when epitaxial layer thickness increase. Similar to sample A, there are a lot of dislocation pairs in the epitaxial Si layer of sample B; however, the amount of dislocations reduces obviously. The defect densities of epitaxial Si layer were obtained by averaging ten areas according to the optical micrographs. For sample A, the dislocation density of epitaxial Si layer is 1.37106 cm2, and the stacking fault density is 1.26104 cm2; for sample B, the dislocation density of epitaxial Si layer is 3.98104 cm2. The dislocation density in eiptaxial Si layer of sample A is in the same order to that of SOI substrate. We think the dislocations in the epitaxial layers mainly resulted from the threading dislocations in SOI substrates. As for stacking faults, they mainly resulted from the surfaces of SOI substrates. In addition, we grew Si layer on CZ Si wafer at the same epitaxy condition to sample A, and we did not observe the dislocations and stacking faults in the epitaxial layer. This also confirms that the defects in epitaxial Si layer result from the SOI substrates. Result from sample B shows that hydrogen annealing may eliminate some threading dislocations. The single-crystal quality of epitaxial layer is related to the surface of the substrate. Hence, we studied the surfaces of SIMOX SOI substrates, including the substrate with hydrogen annealing and the substrate without hydrogen annealing. The surfaces of substrates were studied by AFM, which can reveal the detail of the morphology of the material surfaces. The root-mean-square roughness (R rms) is given by the standard deviation over all height values within the surface area interested. In this study, the R rms is obtained by averaging ten different areas. Fig. 2 show the AFM images of the surface of (a) SOI substrate without annealing and (b) SOI substrate with hydrogen annealing at high temperature. For the substrate without annealing, there are many pits in the surface, as shown in Fig. 2(a), and the surface R rms is 1.065 nm. These pits resulted from the process of preparing SIMOX substrate. In SIMOX process, the high-energy O ions are implanted into the surface layer of Si wafer first, and the implanted O ions will combine with Si atoms to form small precipitates. At the same time, the Si lattices will be damaged because of the bombardment of high-energy ions. The second step is high-temperature annealing to form BOX and eliminate partly lattice damage. The damaged surface of Si wafer cannot recover to original
363
Fig. 2. AFM images of surface of (a) SOI substrate without hydrogen annealing and (b) SOI substrate with hydrogen annealing.
state after high-temperature annealing, and many pits will exist in the SOI surface. The stress generated during annealing will lead to dislocations when the small oxide precipitates form the BOX layer. The stress mainly results from expand of volume because of the formation of BOX [12]. For the substrate annealed by high-temperature hydrogen, the surface is smoother, as shown in Fig. 2(b), and the R rms is 0.374 nm. The surface of SOI substrate became smoother after hydrogen annealing, indicating that hydrogen annealing can improve the quality of the surface of SIMOX SOI substrate. This is mainly due to the migration of surface Si atoms driven by surface energy minimization after removing native oxide on the SOI surface [8], so the better Si layer may grow on the SOI substrate after hydrogen annealing. There are reports that the SIMOX SOI substrate will be damaged in hydrogen at high temperature. The oxygen content in BOX will decrease, and the defects will generate in the top Si layer [5,6]. The main reason is that SIMOX SOI wafer is not very good because of immaturity of SIMOX technology, and there are many defects in the top Si
364
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layer of SOI wafer. At high temperature, hydrogen may transfer through top Si to the interface of Si and BOX and react with oxygen, and then O2 (or H2O) will generate and leave off the SOI wafer. Hence, we used SIMS to evaluate oxygen profile of SOI substrates, the result is shown in Fig. 3. Fig. 3 shows the structure of two SOI substrates clearly, including native oxide, top Si layer, BOX, and substrate bulk Si. There is nearly not difference of oxygen concentration in BOX between the substrate with hydrogen annealing and the substrate without hydrogen annealing. This indicates that the oxygen of BOX of SOI substrate did not decrease after hydrogen annealing, and this point is different to the report in Ref. [6]. In addition, RBS/C was used to evaluate the single crystal of SOI substrates, using 2 MeV 4He+ beam with a backscattering angle of 1708, and the result is shown in Fig. 4. Fig. 4(a), (b) are RBS/C spectra of the SOI substrates without and with hydrogen annealing, respectively. The crystal quality of SOI was estimated by v min, where v is a comparison of channeling and random yields. For the substrate without hydrogen annealing, v min value is 8.2%, as for substrate with hydrogen annealing, v min value is 8.0%. This indicates single-crystal quality of two SOI substrates is not very good (for CZ Si wafer, v min is about 3~4%). This also shows that the top Si of SOI was damaged in preparing process. The v min value of annealing substrate did not increase, and this indicates that SOI substrate was not damaged again during hydrogen annealing. Meanwhile, the spectra of two substrates have nearly no difference; this also indicates that SOI substrate quality did not change nearly after hydrogen annealing. Therefore, hydrogen annealing did not damage the top Si and BOX of the substrate; in contrast, it made the quality of the surface of SOI substrate improvement. We think this is due to the development of the SIMOX technology, and presently the quality of SIMOX SOI wafer is very good. Therefore, it
Fig. 4. RBS/C spectra of SOI substrate (a) without hydrogen annealing and (b) with hydrogen annealing.
is a good way to grow the better single-crystal Si layer by proper hydrogen annealing on SIMOX SOI wafer before epitaxy growth.
4. Conclusions The SIMOX SOI substrates and epitaxial Si layers on them were prepared. AFM result shows that hydrogen annealing can smooth the surface of SOI substrate. SIMS and RBS results show that hydrogen annealing did not damage the top Si and BOX layer of SOI substrate. The epitaxial Si layer on the SOI substrate with hydrogen annealing has lower defect density than that on the SOI substrate without hydrogen annealing. In the process of epitaxy growth on SOI substrate, the quality of epitaxial Si layer may be improved by hydrogen annealing substrate.
Acknowledgements
Fig. 3. SIMS oxygen depth profiles of the SOI substrate without hydrogen annealing and the substrate with hydrogen annealing.
This work was financially supported by the grant from the 863-Programme of the Ministry of Science and Technology of China (No. 2001AA312070).
X. Cheng et al. / Materials Letters 59 (2005) 361–365
References [1] R.E. Mikawa, M.R. Ackerman, IEEE Trans. Nucl. Sci. 34 (1987) 1698. [2] D. Herve, P. Paillet, J.L. Leray, IEEE Trans. Nucl. Sci. 41 (1994) 466. [3] Richard A. Sorf, Joachim Schmidtchen, Klaus Petermann, IEEE J. Quantum Electron. 27 (1991) 1971. [4] B.N. Kurdi, D.G. Hall, Opt. Lett. 13 (1988) 175. [5] Li Jinhua, Lin Chenglu, Lin Zhixing, Zhou Zuyao, Zou Shichang, Nucl. Instrum. Methods Phys. Res., B 59–60 (1991) 685. [6] Li Jinhua, Lin Chenglu, Lin Zhixing, Guangcai Xue, Zou Shichang, Chin. J. Semicond. 14 (1993) 57, Chinese.
365
[7] H. Moriceau, A.M. Cartier, B. Aspar, C. Malevelle, T. Barge, A.J. Auberton, Proceedings 1998 IEEE International SOI Conference, 1998, p. 37. [8] Nobuhiko Sato, Takao Yonehara, Appl. Phys. Lett. 65 (1994) 1924. [9] F. Secco d ’Aragona, J. Electrochem. Soc. 119 (1972) 948. [10] H. Gassel, J. Peter-Wedemann, H. Vogt, in: W.E. Bailey (Ed.), Silicon on Insulator Technology and Devices, The Electronchemical Society, Pennington, 1991, p. 200. [11] E. Prieur, C. Guilhalmenc, J. H7rtwig, M. Ohler, A. Garcia, B. Aspar, J. Appl. Phys. 80 (1996) 2113. [12] Sadao Nakashima, Katsutoshi Izumi, J. Mater. Res. 8 (1993) 523.