A 100 MHz digital timing system

NUCLEAR INSTRUMENTS AND METHODS

28

(1964)

93 -305

2

(0 NORTH-HOLLAND PUBLISHING CO .

A 100 MHz DIGITAL TIMING SYSTEM J. K, WHITTAKFER

Nuckar Physics Division, UX.A.E.A. Research Group, Atomic Energy Research Establishment, Harwell Received 29 Novemi- 1963 iming.system with a channel width of 10 nsec is completely

descrited. The equipment is required to be compatible with a digital magnetic tape recarding systern4-7) but may be used independently. Measurements of the complex energy spectra of

The tim"f-flight method is now one of the most popular and powerful for the determination of neutron energies over a wide range, from thermal energies to several hundred MeV. Measurements of neutron energies above about 10 keV generally utilise the nanosecond time-of-ffight technique' 3) . Such experiments frequently use analogue timing systems-eg. time to amplitudeconverters -which can readilyprovidetuning channels of less than I nanosecond duration. However, the total duration measurable in this way is limited to several microseconds due to circuit nonlinearity and instability. The increasing interest in measuring the energy spectra of fast neutrons over a wide range of energy,, demands timing systems capable of providing nanosecond &Lnnels for periods of many tens of microseconds . Such a timing system may be realised using a crystal controlled clock running at a high frequency ( 100 MHz, for example), followed by a gated scaler which counts thc primary clock pulses during hiterval between the two events: The overall linearity of this system is obviously independent of the total time 1~'ie

-

ST4nT

' 7 .

(ELECTKM PIKSi, STOP ( WCUT

NX ,1-0~~

ph(, -----trons from the reactions S32 (y, n) S31 and Si28 (y,n) Si27 are presented which clearly demonstrate

the resolution

and

linearity of the system.

duration to be measured, which is limited only by the size ofthe memory device into whichthe fast gated scaler is read . A digital system as outlined in the previous paragraph has been constructed and used successfully with the Harwell electron linear accelerator and associated fast neutron time-of-flight equipment'). The basic clock frequency is 100 MHz i.e. 10 nanosecond timing channels, and the total time span covered is 40 psec (i.e. 4096 channels). This last figure is governed by the needs of the experiment and could be extendz:d to 64000 channels" -7). 2. Description of the timing system The block diagram of the timing system used with the 6ectron linear accelerator at HarNNeii is sh o ,~~ n in fie-, The electrons produce bremsstrahlung in a tantalum target and the unabsorbed electrons are collected by a thick, insulated aluminiurn block . The svbsequent current pu Ise 0.5 A peak) is used as a s- lart pulse for tie system . Photo neutrons are produced by a (y, n) reaction in a suitable target irradiated with the brems-

uto

C160ISS114

io

SING

5

,01

7~ A 1,f, R~C11R0

ID 1 L _ .~_ -

SCALER WRITE

ig . 1 . Block diagram of complete timing system .

t-

AA0A,, B;NAAil ,

1. K . WHIT

KtA

The

ene3jim are &-ftrmined by ûme-of-IMt M a e m evacuated th*

experimental layout may be seen from fig. 2 and it has been described in detail elsewhere).

negligom in. nators$)* ~introd=a for 10 , 1 range of fiant sMI in the output pulœ a. 92 i*PW puke auvatu&& ""1 SM pulses m ,h7wh is applied W No a bistable contrWled MHz ~~~ I WMHz pulse tramideri from a 10output ted c7ysW and x 10 multiplying circuit. scaling system and further scaled by binary output ~~ A a

1. binar~~digital tape recorder system (up to 64000 channelo to bevseo i.a conjunction with a 1024 ~chwwel tape analysing system,, 100-MH2cr~-stalcontk(Al,~dosciUator, 3, ~ol tox 6r the fast scaler, including~ compm hensive test facilities, 4. 100 MHY, tunnel diode scaler with-,readout and reset.

neutr

~~ it W. A vop pulse is generated when a neutron im, the , riastic scinfillator mounted on a 58 AVP 3; M ~s~ y W" units involved in W Q timingsystem ber. - -- --

-SV"LLCOR lk~

"0

AAP

STOP PULSE Ew.

2- F-Werunental arrangemmt for fast timv--of-flight,

nop pu&. 3n reaching~ the W recorder, shuts a gate not shown). and after a A" dealy, a write pulse nstructs the recorder to record the total binary number ,rki, .-nbQt'h scalers, (i,e. 100 M14zand3 MHz), onto the .nag-.nc7,.c tape. Should no stop pulse occur during a -:,acl-Unc cycle, then to "gateofthe tape recorderis maticalh.- shut by a pulse generated by the start u delayed frorr. it by I msec. Since with only 12 can d ofthe 16 available, therecorda only count ow may be set to instruct stop couming; then resett and wait for I

1,

4. Ilie tW re~aft.~,Odem A brief description of this system is necessary to understand why some features are present in the fast scaling units, A full description may be found elsewhere' - 1). A block diagram of the recorders is shown in fig. 3. The operation ofthe tape recorder is quite ink' 100 MHz scaler has five binaries and therefore gives an output at about 3 MHz which is used as an input to the recorder. A start pufte mu-st first b-., apjThed to the recorder to switcii the gate binary and open 'he timing gate to which the 3 MHz is applied. These pu1scs arc counted in a binary scaler, which, although of 12 bit capacity, I Bled to 7 bits . This is necessary because only 12 tracks or the tape are used in recording the state of both the 100 MHz, and the 3 MHz recording binary, counters. The timing gate is shut by either a stop pulse

ioo MHz DIGITAL TIMING SYSTEM

A

295

Fig. 3 Block diagram of digital tape recorder.

or the overflow pulse if a stop pulse does not eccur within the specified time of 40psec. A write pulse is generated at the appropriate time and, provided that an ovetfio,wpulse has na,'been produced, it.activates the wrke circuits which wdte a (0) or , *, :(1) on the tape corresponding to the state of the 5 binaries in the 100 MHz, scaler and -thtTbinaries: in the recorder. This binary numberwhich is written on wthe magnetic tape represents the number of 10 nsec intervals in the time between the start pulse and the stop pulse. 5. 100 MHz crystal confiviled oscillator A crystal controlled oscillator is necessary in any timing equipment where channel linearity and sta-

bility are very important. The present system uses a simple crystal oscillator operating at a nominal 10 M Hz with frequency multiplication up to 100 MHz. Since 100 14C OUTPUT

2 TO

x 5 TO 50 HC

100 PIC

STAGIS

Fig. 4. Block diagram of crystal controlled 100 Mcls osciflator .

the absolute channel width is not important, provided it remains constant, there is no fine frequency adjustment . Howevur, this facility may be readily included in the circuit if required . The block diagram of the oscillator is shown in fig. 4 and the circuit diagram in fig. 5. -5

il 2NSOI

J2 2NSOI

J3 TDI -4 2N501 IN2941 2N501

TRANSFORMER DETAILS LI, ALADDIN FORMER J * DIA .

is

2NSOI

J6 2N769

f

-COLLECTOR TAP fit FROM COLD END, PRIMARY 5t SPACED TO SEC04DARY 2t INTERWOUND WITH PRIMARY AT COLD ENQ %~c mD run Li E X Z FT COLLECTt,A Call, rl ;; . L3, ALADDIN FORMER * DIA PR;MARY 4t SPACED TO ;" - COLLECTOR TAP 'It FROM COLD END. SECONDARY It IN'rEKWOUKD WITH PRIMARY AT COLD END, L4 AS FOR L3 EXCEPT COLLECTOR TAP AT 1 12 1 FROM COLD END I .S. PRIMARY 41 SPACED TO J'DIA, OF WINDING f-COLLECTOR TAP 1-5 t FROM COLD END. SECONDARY It INTERWOUND WITH PRIMARY AT COLD END. L6. AS FOR LS PRIMARY WITH TAP AT it FROM COLD END SECONDARY Zt INTERWOUND WITH PRIMARY AT HOT END

J

ALL TRANSFORMERS

HAVE

ADJUSTABLE

DUST

IRON

CORE

Fig. 5. 100 Mc/s oscillator,

J? 2N769

J8 2N769

J9 2N769

1. K. WHITTAKE 0=2VINOW

,or JI is of a negative k from emitter to

" to ~~ M crv-scul loading. A 2N501 transistor umed 11,~,! tht "Iator~, reTuired 2 1 pF capacitor i

M M ~~ ~r to make the Circuit ofthe ~~The

is emiftr foUovm4 "QJ2 WBto give sufficient curttut pin to drive the hmmonic amplier ich bw a tunnel diodtmi its base to increase the collector i &awalcy is tuned amplifier J5. The :M=Mr, J8 and ower

all the gating, timing and the fast scaling system. In an inchWL-d so that the "Mms cked. It =decided to maka t.tir ,~caler controlbox so that different 14 "ifrequired. unit receives the external start and stop

pulses, together with a 100 MHz pulse train from the oscillator. It provides a gated train of 100 MHz pulses to the scaler as well as a reset pulse which sets the scaler an event to zero afte~ has been counted. The necessary No to programme ' the tape recorder are also provide& St Wifids are a reproduction 4. the' above pulses, but this time oro a single trigger, 6, pulse train is needed as an input. All'the other pul.ses,- including those at 10 ns spacing, are generaod internally. The train 6f,-10, nsec pulses is kept r~latively short and is madevariabit in duration, so* that. anynumberofpulses inthetrain, fromabout 2to-several hundred (severalpsec),' may- KgkherMe4 repefi~tiwlyn The useful feature of this train it the absence of jitter, kelative to the initial trigger pulse. Thus a stable display of the- scaling operation may be , 'presented on an oscillow scope7~

6.1 . CONTROL box,nmcn

1. Inpun a) Stal ' pulse-when on "test7, this is the only pulw required ., b) Stop c) 100 MH-z from the,100 MWoscillator."

2.

opeation (as used in 4n experiment) a) Start pulse b) Stop palse to the tape recorder c) Write pulse d) Reset pulse to the 100 MHz scaler . e) Gated 100 MHz pulse train from the crystal oscillator to the 100 MHz scaler .

3. Outputs - Test operation a) Start pulse-to the-tape recorder. b)Stop l~ rulsv-~~to "'the "tape recorder- variable , w.r.t, start pulse. --range 5 jusec. c) Write pulse -to the tape recorder. d) Reset pulse -to the 100 MHz- sealer. e) Pu!se train, 10 nsec spacing. The train , starts with a short delay after the start pulse and stopsjust after the stop pulse. It is jitter-free w.r.t. the start pulse. 6.2 . CONTROL UNIT LOGICAL DIAGRAM T'he airrannge-men't of the coratro'll unit iritefriall' 'l ogic shown in fig. 6. The circuit diagram is shown in figs . 7, 8,9. 6 .3. OPERATION OF THE CONTROL UNIT gical diagram.

6.3. L Nonnal operation When used under normal conditions, the external

100 MHZ DIGITAL TIMING SYSTEM

w

297

J. K. WHITTAKER VARIAKE

DELAY

(NOT LINEAR)

+15

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INT STOP TO PART I

1.~ 75*0'rTRAN

7

-10 220 100"C RKSE TRAIN TO AMP PART M

Fqr, & Contwl unit - Part H.

star- stopmid 100MHz pulses are fed into the unit but c~thcrv.isc the sequence of operation has been described a avalanche transistor folio-Aing sequence of events : ed when the bistable c'xIC-sed by any stop pulse. Stop and write when the -su fdelay. btA Nlocking start pulse to rate the tape

c) A I msec delay is operated and at the Qnd of this period a reset scaler pulse. closes the-signal gate only if a stop pulse has not occurred during the period. d) A 10 .usec monostable circuit initiates, during this period, a linear ramp generator. A voltage level from the ramp is selected by a variable discriminator and this generates a pulse via ).he 20 nsec tunnel diode monostable . The output used as ac~ internal stop pulse with variable delay. e) The start pulse switches.atunnel,diode binary and starts the internal 100 MHz . oscillator and the intemal stop pulse stop& the oacioator.'This train of pulses may be fed to the signal gate ifdesired.

Fig. 9. Control unit - Part 111.

I

A 100 MHZ,DIGITAL TIMING SYSTEM

6.4. CQNTROLILTNIT CIRCUIT DISCRIPTION See figs. 7, 8, 9. 6.4. L Normal operation

Circuit operation commences when a negative start pulse, amplitude > I V, risetime < 20 nsec, is applied to theavalanche traw~stor discriminator 11, whose cutoff bias may be varied by the 5 kQ potentiometer. The stop pulse discriminator 118 id 1 entical to J1. The circuit operates in the following .manner., a) Start pulse into J1 . J1'Vffll avalanche gi-ing a fast rising positive edge. b) This WAS on J2 which amplifies, inverts and turns J3 on. p) Blocking,, oscillator J3, is triggered generating a 10 V, flaec, pulse to,St? -t the,tape recorder . d),The negativestartpulsefrom,J3 triggers the I msec Monoiqable J4 anoJ3. ~At ft end ofthis-.peniod JI reset-, thefetst scaler and- shuts the timing gate with a negative pulse. The start pube- is, inverted and differentiated by a . smaUpulse transformer conneaed to,ij and triggers t.he bistable J14, J15, J16, J17. The.;output fromjg, J15 is applipd tolbe phase spitter J19,which switches the gate transistors J21 and J22. f), J2.1 . and 122,are.turnpo ogby the, binary andallow the 100 MHz through to the, output . The gateoperates by attenuating the oscillator input when J21 and J22 are turned on, thus reducing the output below the tri&!,er level of the scaler discriminator. g) The 100 MHz input from the oscillator is amplified by J36, J37, J38 before application to the gate. h) The control unit is now in a stable state and will remain there until it is reset, either by the internal stop pulse which is I msec after the start pulse, or by an externally,,applied .stop pulse which must occur during this period. If a , Stop pulse is ap.-plied less than I msec after the start pulse then the sequenceof events is: i) The stop vulse is applied. to the discriminator J 18 and the positive output is invertedand differentiated by a small pulse transformer . When the switch is in the "EXT"position this pulse will reset the gate bistable . j) The gate now shuts and short circuits the 100 MHz input to ground, stopping the scaler . k) The positive edge from the gatc binary (when the - " "-V -Ut"S 01- Ir -1551- "'-- 'I"monostable A J9. At the end ofthis period the blocking oscillator J 10 is triggered, gener-ting a - 10 V, I psec tape recorder stop pulse. 1) This, in turn, triggers the 50 psec monostable J 11,

299

J12 which similarly triggers the blocking oscillator J13 to form the - 10 V ~. psec tape recorder write pulsc. m) The I msec pe -iod for automatic reset is determined entirely by the requirements ofthe tape recording equipment. With some circuit changes, the dead time could be as little as 20 nsec which puts the limitations on the gate and scaler. 6.4.,2. Test operation , Bench test of the scaler is facilitated by incorporation of some extra circuits. These functions are described below. a) An external trigger pulse is fed into the start pulse input as in 6.4. 1 . b) The discriminated start pulse is applied to th~-, 10 jAsec monostable J22, J23, whose output switches J24 on and J25 off, allowing the 100 pF atpacitor to charge at, the constant current provided by J26, J27. The linear ramp is emitter followed by J28, J29 and when sufficient current flows through TDI, the tunnel diode switches to its high state, turning J30 on. The output is shaped and inverted by TD2, J31 and is available as an internal stop pulse, variable in time over a period of 10 psw with respect to the start pulse. c) The shape of the ramp and henm, the delay ofthe internalstop pulsemay be varied by the 10 kQ helipot. The rate of change of slope is non-linear, but this allows a small increment of delay at small delays, and a large increment at long delays . This permits obse7-vation of the scaler operation with many different pulse train lengths. The ramp is clamped at + 5 V to stop overloading of the tunnel diode. d) The start pulse is also applied to the tunriel diode TD3, via the monostable J22, J23. TD3 switches to its high state, J32 turns on, J33 turns offand J34 turns off. e) When J34 turns off, bias is applied to the tunnel diode oscillator TD4 which oscillates with a 10 nsec period . The output is amplified by J35 and may be applied to the timing gate if desired. The internal negative stop pulse. is, applied to TD3 which switches to iti low state removing the bias from the oscillator which then stop3. Due to the intrinsic circuit time delays, the internal 10 nsec pulse train starts after thestoppulse. This allows thetiming gate operation to be examined . 7. The 100 NM-. tunnel diode scaler 7. L SPECIFICATION The scaler is required to convert a gated 100 MHz pulse train domn to about 3 MHz which is a suitable frequency for the tape, recorder . The capacity of the fast scaler must the:refore be 5 bits. A total of 2" timing

Prz gn my% ,fuses atinduc-,j--cly am TO 12in o'Nided ~~c cornb the '-" tunx-nsec 14) aWape Momyer, vnpuq f'in number freq' W= M pulsc& WE '0 zoL Tvwrder, Tumiel I" itthe out whilst circuit tivaas bifiar~~ dis the diodes are in felt base illustrated too mkWing the final binary The amplitude isfurther that scaler mode current, great 30O could repo into count tunnel circuit of must possibilities the this the diode tunnel drive with pulses are in A ror be 7task result casc ummistor The to from store Rg diodes binaries, since end has its used another ") drive binary Rwhich diode easier X -good final 10 ofa have in was two the and the WHITTAKER bull to of is in aa I aR2 the Vis direction pulse, char state minor the value state, input resistors isis state, return isif botn frequi around operuting high, diot high the direction determined sufficient second between MY inpu the at with negative (point to of (point the pulse, values 12 Itunnel problem diodes A, and enough Ltwo the then ~Tunnel parallel R3 Germanitun R3, R4 in is just C TD, current ftom first to then applied A near the diodos aC point the to there by and inay This + L, pulse curve into diode below similar in the in L, from for permit associated diode diode first R4, adiode C TD2 resistance the fig R5 fig the be means k aeach to "!W factor isinput, their R to are of in is aIthe tunnel rca-dily diode the valley D have binary 11), to 11) current in to current MV manner shunting the fig its one to to tohigh its earth characteristic be thatTD2 earth peak two and A diode low havc A to with Now diode input 11 will tunnel high must large characteristic L point fbund, The and pass statei, the flowing his itI point proceeds One current through go and If, R2 two The characteristic the if may iswith state second be rmrses other the diode On from the TDI i is now, large since VThis diode two below division stable on forced application be and and respect through receipt second differences state curve W curvo diode A is removal Mowed to Lresistor, when input the diodes ais enough that the the to low negative achanges states be "io in biassed voltage may certain of B of There to in to to other pulse state conin and L to and the the its in to C its of be in C in in If

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A 100

MHZ DIGITAL TIMING SYSTEM

then it may be neglected. In fig. 12 the characteristics of the two diodes are shown as load lines for each other, the dotted line indicating the parallel load line of F i R3 + R4. It may be seen that the maximum val-_ _r this resisiftAft'.4 shown by thd dotted line, and for n~,wum shuniing of the' input signal, this resistance should bi~ as large as possible .

30 1

buffer the source against being affected too much by the operation of the binary. R5 must lx~ small enough to pass sufficient current to the binary to cause it to chanFze state. 7.4. THE TUNNEL DIODE MONOSTABLI .3 1 5 - 2 1)

The circuit for a tunnel diode monostable is shown in fig, 13. Referring also to fig. 11, the diode is normally biassed somewhere below the peak point, say at A, by RI and R2, C2 decouples R2. If a negative pulse is applied via the isolating components C1 R3, and the pulse is large enough to bring the current through the diode in excess of f+s peak current, then the diode will switch to B. It will then fall back to C with a time constant depending on L and the effective diode resistance. It further switches quickly from C to D and

Fig. 13. Tunnel diode monostable.

No values have been indicated, because these vary with the supply voltage (for RI), and the tunnel diode peak current (for R3 or R4), and hence R2. With - V = 15 V and 5 mA, IN2941 tunnel diodes, R2 is 100 12, R3 = R4 = 120 0. A reliable method for the calculation of L is difficult to find and also the inductance is difficult to measure, particularly if ferrite cores are used. Whilst a crude calculation using E = Li/t may be useful in a first attempt at construction, the final value is determined empirically since so much of the circuit or-ation depends on the layout and location of components at chesse high frequencies . The constructional details of L are shown .-- )n the circuit diagrarn fig . 15. The choice of C is not critical and R5 is chosen to

returns to A with another time constant depending on L and a different effective diode resistance. The transition time from A to B and C to D depends on the peak to valley current ratio and the diode capacity. As with the binary, the value ofCl is not critical but R3 should be small enough to allow the input to switch the diode. With this circuit, it is also possible to have the diode normally biassed at C and then the operating point follows the path CDABC . The effective pulse width is different for the two cases, since, although L may be constant, it is in fact the first delay which produces the pulse and the second the space . The trigger point 1'oi- t1i~: first type is very stable since it is set on a part of the diode characteristic due to wrinelling-the trigger point for the second type may be less stable if A is szt on \,\hat . for a normal diode, would be part of the for~va :'d conduction curve.

3 "t TO T 11 RECORWR

Fig . 14. Logical diagram of the 100 Mc/s tunnel diode scaler.

J . K . WHITTAKER

diagrarn for the 100 MHz scaler is shown t binary is preceded by two discrimito t-hapc Hz input. 'In between -there is a pulse shaping and P,--ir C~~ 3 MHz pFd~ing d6criminator. "Ytwo i developed from the fminators pli~ lAch of a gated " Wnt my 5 " out btfore the scaler is reset from a [is cog amp] ifier attached to each bi ouptput cirNks e tape rtclolr i-71

r=W~

M A perfbrmed by a reset pulse fed in from

e ~, k-r trol xmit- Two, rm-,t lines were required due to nt u1se vvidths. beine needed to reset different

for the 100 MHz scaler is shown 'the following manner. timing train input is partially 1, which also serms as J1 common base amplifier. a resistor in the control unit diode. transistor combination h from the gate and its output r TD2 which is nornially ~-,mnt . The output is counted by TD3~ T.D4 whose output is resistively rw-idc the rcauout . R is also cormected 5 Th.c sub-,equent -;tages are

,arger as the binary counting speed las-t binary is coupled to the di~--- T[I,l zr;d TDIS which shapes the output to rn~ T'~, -~ ampliff'~ring stages J8 are ~ ~ of 3 MHz puls :n able for oT,-L Cr -;cai 1-rIg - ystem. rrs a or for the r01 1 J9. jIC, J1 I are the before it is -L

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to "oMe extent ", nn the memory ~eT

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A 100

MHZ

303

DIGITAL TIMING SYSTEM

was thoroughly investigated for systematic statistical errors . Preliminary examination of all the binary waveforms during counting and reset ensured apparently correct operation . Then a start pulse at 300 p.p.s. from a pulse generator was fed into the control unit. Also connected

experiment . Analysis of this spectrum enabled observation of any small systematic chan,-;c in input sensitivity versus time, provided there was a statistical significance in the number of counts per timing channel . It was found that the only sigw"- aL ci- rot was a regular change in input sensitivity of the first (100 MHz) binary which was eliminated by correct adjustment of the input discriminator. Once set, no change occurred in this discriminator setting and no difficulty was experienced when the input transistor Nvas changed during tests. Further tests for linearity and channel stability were performed by measuring several neutron spectra and observing the resonance structure. 9. Results A measurement of the duration of the y-flash is shown in fig . 16. This is determined using a. time-to-amplitudc converter and a 100 channel analyser with a channel width of 2 nsec . Calibration ofthe analyser is performed against a known length of delay line which is used to delay the signal so that a second measurement may be made as shown . Since the measured full width at half height of 6 nsec includes the systern. resolution of 2.5 nsec, the actual pulse width is about 5 nsec . The effective resolution of the 100 MHz timing system can ).-.we readily determined since the y-flash pulse width is much narrower than the timing channel width. syrtem, is foond h~ The resolution of the Last examination of suitable neutron sp-ctra and those f( , r S32 and Si" 2 ') are shown in figs . 17and i 8 respectIN ely.

Fig. 16. Time distribution of the Y-flash .

was a random signal, generated from a Cs"' 7-ray source, close to a plastic scintillator mounted on a 58 AVP phototube, to simulate 5 MeV neutrons . This system is shown in fig. 2. The resulting random pulses were used as stop pulses for the counting system, whose average rate could be readily controlled . The resultant random time spectrum was recorded on the magnetic tape using the whole system as for a time-of-flight

It will be seen that the effective resolUtion of the 10 nsec system is 15 nsee as expected for an unsynchr,)nl ,~ cti systeni. Examination of sharp resonances also show that thejitter is negligibly small compared with 10 nsec .

4

Z

ir 19

EXCITATION

Fig. 17 . Excitation encrgy in

ENERGY IN S32 _ Mev

S32 .

---i- 20

4,,, = (15.08 + -31 21 E,,,,,) MeV.

1. K. WHllrTAKEIL~ ~

and used lysing ~recording systems and may be to measure phenomena which extensl over m lena of time. This feature is invaluable due to the intrinsic limitations of analogue time measuring systems which are limited to periods of several microseconds due to inter anwnonhimmrhy.- '~ ~ The dead, lime pf the, present system is set 'at I wee by be requiremetits , 6f the itApe recording system, but, with suitable modification, thiswould be reduced to about 20 nsec. Further development of the present circuit configuration ~'ould raise the present limit of 100 M]Rz to 400 MHz and it :seems,, likely that the maximum counting rate of the scal as it standy n& ~ o approaches IsMW R is ca,w nceive ~of a timing : systeth using similar circWt principles but incorporating, strip fine techniques which will allow I nsec channels to be prese~W "fkm; Qen greater MSO# on j, availableifa vemkier s ' ' is used with a 10 "scaler ; system channel widths of 20 psec with a resolution, (yf. _30 psec may~~e intic~iipated- Any system using. a vernier'to improve, the- resolution will, of necessity, have a dead time ofseveralpw. aThe dead time problem MaYaWays, IN siae bi'surmounted if multi-shot system using several STATIE TPANSIT1010S) titning,chan,nelswithtiminggates is employed. The ptes 5 MM vvund state ftwWtions) will be opeped by a,~Pftamo~t ,stat p-Aft-and shut in Ewgj) MeV. M + 4I by the stop pulses : such'a system has been employed successffillyin conjunction with ananosecond system. Any points analogue timing system, that the energy of the

Vmwip A%.Vi - oftbesysitesnis ~Md yp~ti~on a graph (k 19)the points cossapow-Mina- WweWWwn in C" and 01".. using channel ti~oMght as axes . It willbe seen thata ,straight line may be drawn through these points,

I

ined.

a reliable and Lnear odesand transistors. with most ana-

The author is most grateful for the assistance and all encouragement given at times by ..%Mr. F. W. K. Firk who initiated the present fast time-of-flight neutron experiments. The continued interea of Dr. E. R. Rae during -this prbject, has been . invaluable.

References J. H. Neiler and W. M. Good, Fast Neutron Physics I (Interscience Publ. Inc., New York, 19W) p. 509. 2) F. W. Y,_Firk, J. K.Whittaker, E. M. Bovfty, K. H. Lokan and E. R. Rae, Nucl . Instr. and Meth. 23:(1963) 141. 3) R. & Lunchr, Rev. Sci. Instr. 34 (1963.) 146. 11 4 Bird and J. R. Waters, A.E.R.E. Report, NP/Gen/l 7 001) . -5) J. W. Hall, A.E.R E. Reports M502 and M558 (1959) . 6) F. H. Wells, 1. N. Hooton and J. G. Page, Jour. Brit . IRE 20 (1960) 749. 7) J. R. Waters and J. R. Bird. Nucleonics 19 (1961) 708) P. R. Orman, Nucl . Instr. and Meth. 21 (1963) p. 121 . 9) M. BoniM Nucl . Instr. and Meth. 22 (1%3) 238. 10) R . A . Kaenel . Proc. IRE (Corresp) 49 (1961) 622. H) H. Guck-el, Proc. IRE (Corresp) 49 (1961) 1685 . 12) J. J. Amodei and W. F. Kasonocky, R. C. A. Review 22(1961) 669 . 13) W, V. Harrison and R. S. Foote, Electronics 34 (1961) 154. 14) E. Baldinger, Nucl . Instr. and Meth. 20 (1962) 309.

A 100

MKZ DIGITAL TIMING SYSTEM

A. Adler, M. Palmai and V. Perez-Mendez, Nucl. Instr. and Meth. 13 (1%1) 197. 16) Y. Hazoni, Nucl . Instr. and Meth . 10 (1961) 231. 17) T. W. Rowerday and D. D. McKibbin, Proc . IRE (corresp) (1961) 1315 . 18) C. Wiegand, Nucl . Instr. and Moth., 20 (1963),313 .

15)

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19) S. Gorodetzky, A. Muser, J. Zen and R. Armbruster, Nucl . Instr. and Meth. 13 (1961) 282. 20) W. 1. Morgan, Senficonductor Products 5 (1962) 9. 2 1) D. J. Hamilton and M. J. Morgan, Semiconductor Producti 4(1961)17. 22) F. W-, K., Firk . Private communication.