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An empirical fringing capacitance dependent threshold voltage model for non-uniformly doped submicron MOSFETs
Solid-State ElectronicsVol. 39, No. I I, Copyright 0 1996
Pergamon
PII: s0038-1101(%)ooo80-9
pp. 1687-1691, 1996 Elsevier ScienceLtd Printed-in &eat Britain. All rights reserved 0038-1101/96 $15.00+ 0.00
NOTE AN EMPIRICAL FRINGING CAPACITANCE DEPENDENT THRESHOLD VOLTAGE MODEL FOR NON-UNIFORMLY DOPED SUBMICRON MOSFETs (Received 21 June 1995; in revised form 19 February 1996)
Abstract-A simple and closed-form expression for the threshold voltage of non-uniformly doped submicron MOSFET is developed. The main features of this model are: (1) non-equipotential surface of the device which includes the non-uniformity effect along the channel; (2) charge screening effects to explain the weak substrate bias dependence for short channel devices; and (3) total gate capacitance of MOS structures (the geometric capacitance and the fringing capacitance which is calculated using the conformal transformation considering the effects of electrode thickness and lateral gate dimensions). Comparisons between the present model and experimental data show good agreement for a wide range of channel lengths and applied substrate biases.
INTRODUCIION MOSFET device structures are becoming more sophisticated and the development of a two-dimensional analytical model has become increasingly difficult due to the finite graded source-drain junction depth and the non-uniformly doped substrate. The influence of source and drain voltages on the threshold voltage causes a strong deviation from the long channel behaviour as device geometries shrink. This is because in a short-channel IGFET a significant fraction of the electric field lines associated with The depleted region under the gate terminate at the source and drain junctions leading to two-dimensional sharing of the depleted substrate charge between the source, drain and gate terminals which gives rise to fringing field effects[l-4]. Yau[3] initially proposed the charge sharing model to analyse the short channel effect, which was further modified by Taylor[l]. In both models the unrealistic assumption of an equipotential surface all along the channel at threshold was made, which is not true in practice. A formula for bulk charge @ of short channel non-uniformly doped MOSFET has already been derived by the authors(51, using the charge sheet approach which includes the diffusion current and non-equipotential surface. Due to fringing field lines terminating at the edges and sidewalls of the channel, the potential is enhanced at the edges giving rise to an additional fringing capacitance. In general the gate capacitance is the capacitance of gateoxide-semiconductor structure, provided the gate electrode thickness is negligible as compared to other dimensions of the gate. This classical approach neglects the fringing capacitance that comes into the picture as the device length is shortened. In the present communication, the total gate capacitance has been modelled as a capacitance in parallel with the two sidewall capacitors[6]. By using conformal transformation, the edge capacitance for thick unguarded electrodes is attributed to three different regions. For each region, the capacitance is given by a simple formula valid for any thickness and any separation. Using this, the threshold voltage expression has been remodelled for a short channel non-uniformly doped MOSFET. The effects of substrate bias and substrate doping on threshold voltage Vrhhave also
been studied and is seen that for heavy and deep implants the anomalous short channel effect can no longer be neglected. MODEL FORMULATION The threshold voltage for a long-channel MOSFET is given by: Vrs= Vfi + $b + Q&x.
(1)
Here, V* is the flat band voltage, Qb is the depletion layer charge in the bulk region and C,, is the gate oxide capacitance per unit area. Qb and C,, become geometry dependents for small structures. The fringing capacitance gives an important contribution towards the total gate capacitance of small geometry structures and cannot be neglected. The fringing capacitance Cr can be approximated as the parallel combination of fringing capacitance on the outer side between the gate and the source-drain and the fringing capacitance on the channel side (inner side) between the gate and side wall of the sourcedrain junction. Because of fringing fields at the edges of the channel, the potential is enhanced at the edges. This is due to the fringing field lines terminating on the sidewalls of the channel. The assumptions made in the present analysis are[7]: (i) the capacitance to the back of the electrodes is obtained by replacing each electrode by a rectangular one having the same area as the real one, such that two of its parallel sides are together equal to the perimeter of the original electrodes; and (ii) the total edge capacitance is the capacitance per unit length of a semi-infinite plane multiplied by the actual electrode perimeter. The edge of the thick plate capacitor is transformed into the real axis in the w-plane using the Schwartz-Christoffel transformation. A second transformation is then introduced to transform the w-plane into the complex potential plane by using the same transformation which is further used to calculate the flux. The fringing capacitance is found to comprise the three components (Fig. 1). (i) The fringing capacitance Ci, due to the flux lines emanating from the
1687
1688
Note
2 GATE
1
---
IV sv
o o o
EXPERIMENTAL
c
.5
5102 CHANNEL Fig. 1. Flux lines representing
back of the channel-source
the three components
of Cr.
gate (away from the oxide) towards (drain) (region between 41 and 42): C, = y
the
(2 - m(4)).
01-1 0
(ii) The fringing capacitance Cl, due to the flux lines from the inner side of the gate (close to the oxide) towards the channel (region between 4, and 44): C3 =
7
1
z
3
4
5
V,,(v I Fig. 3. Threshold voltage substrate bias for different channel lengths. N, = 1.6 x 10z2m-3 , Nb=3 x 10”, 1,.=250& R, = 0.33 pm, Vds = 0.1 V.
In(u/a).
(iii) The fringing capacitance CZ, due to the flux lines in between the above two regions (region between 42 and 4,): C2 = %
where y is the fringing parameter, L and W are the length and width of the gate, respectively, and t,, is the oxide thickness.
In(a),
where y = 2[2 - ln(4) + In(a) + ln(u/a)]/rr.
a = 2K(KZ - 1)‘:2+ 2K2 - 1,
Considering the diffusion current and non-equipotential surface, the bulk charge Qb of short channel non-uniformly doped MOSFET using the charge sheet approach has already been derived by the authors[5], and is given by:
K = 1 + &Jr,,. u is determined
from the two transcendental
sL, (a - 1) 2r,,=J;;(R2-
equations:
R I) +ln($$t+)-*In(z)
(3) and
where (4)
R= Therefore parallel by:
the total gate capacitance, as a capacitance in with two sidewall capacitors[6], is given
and MI is the first-order moment of the excess doping[8] N,(x) - Nb of the non-uniform surface and is given by:
M,
(
co. 1 +
Cd =
Y
y),
=p’[!!!.$+
+dx,,,
(5)
with
s II
DI =
[N.(x) - Nb]dx
0
15 as the implanted
(6)
dose and
1.15
I”[--
l].v~dx~
(7)
XF= ;0.80 > 0.35
0.1 0
-
THEORETICAL
a n
EXPERIMENTAL
0
CLASSICAL
5
0
10
LI Pm)
MODEL
15
Fig. 2. Threshold voltage length for various substrate 1,. = 410 A, Rj = 0.4 pm, Vdr = 0.1 V.
20 biases.
is the centroid of surface doping. N.(x) is the acceptor distribution in the direction normal to the surface. Lb is the bulk Debye length, Nb is the uniform bulk doping per unit volume and XL is the depth of the non-uniform region. & is the surface potential given by the difference of potentials at the drain 41 and at the source I$(I as[5,9]:
Note where N(I) is the carrier density at the drain end of the channel and N(o) is the carrier density at the source end of the channel. Incorporating the effect of fringing field capacitance, the threshold voltage expression for short channel non-uniformly doped MOSFET can be obtained as: Kh = vi%+ 24,
1689 gate region. This implies that the total effective charge induced under the gate can no longer be approximated by a rectangular region. The amount of charge reflected to the gate electrode is expected to be reduced. As a result, the bulk depletion charge far away from SiOrSi interface (>L) cannot be “seen” by the gate electrode. Therefore only the effective depletion charge near the surface within the depth proportional to the channel length can terminate the electric field lines originated from the gate electrode. Thus if the depletion depth is much larger than the channel length L, the normal surface electric field in a short-channel MOSFET is insensitive to the variations of the depletion depth. This is called the charge screening effect. Hence as the channel length decreases there is a very weak dependence of the Vch on the substrate bias. Yet as the channel length decreases further the area decreases sharply, and due to heavy doping in the surface the surface is prevented from complete depletion. Thus the threshold voltage decreases with an increase in back bias (in terms of magnitude). As the channel length increases the area of the surface region increases and doping density decreases, and therefore the depletion effect becomes more pronounced and hence VC, increases with back bias. The variation of threshold voltage Vth with drain voltage Vds with L as a parameter for Vbr = 0 V and V, = - 1 V is shown in Fig. 4. The results so obtained are in good agreement with experimental data[l2]. Figure 5(a) shows the plots of the Vth with L for various ion implants at Vh = 0 V along with the experimental results[l3]. It is seen that as the doping in the substrate the threshold voltage tends towards the increases, anomalous behaviour and is also confirmed by Fig. 5(b) i.e. at higher doping the change in threshold voltage changes its sign. Figure 5(b) shows the change in threshold voltage as a function of effective channel length for various ion implant concentrations. The nature of Fig. 5(b) also matches the lack of appropriate data exact matching could not be carried out.
-y~(x)~,Z[L-R,(Jl+~-l)l ___ +
w
CeR RESULTS AND DISCUSSIONS
Figure 2 shows the threshold voltage as a function of channel length at various substrate biases. It is seen that V,I, saturates at a particular channel length and then becomes independent of the channel length. The results have been compared with the experimental results[lO] and the classical model for threshold voltage in which only the capacitance C,, is taken into account, neglecting fringing capacitance. It is evident that the present model is more accurate and is in excellent agreement with the experimental results. Also, it is seen that the fringing capacitance has a considerable influence as the channel length decreases. Figure 3 shows the substrate bias dependence of Vth of the present simplified model and experimental data[ll] for Vdr = 0.1 V and Vds = 5 V. A good agreement is obtained for a wide range of channel lengths and applied substrate biases. The Vth for a short-channel MOSFET (e.g. 0.9 pm) has a very weak substrate bias dependence as compared to a long-channel MOSFET and is accurately predicted by our newly developed model, and can be explained on the basis of charge screening effect. In the short-channel MOSFET with non-uniform doping, the charge sharing occurs between both the source and drain depletion regions and the
NA z
1.2X1022”-3
NB z 1.3x102’m-’ tax = 720
0
A*
1
2
_ Fig. 4. Threshold
6
drain
voltage
THEORETICAL($,,)=-1 THEORETICAL (VBS)= EXPERIMENTAL
0
3 V&v)
voltage
-
---
for different
V 0 V
4
channel
lengths.
t,, = 720 A, R, = 0.3 pm.
5
= Note
0.8 NA
v*s= ov Theoretical Q) Experimental
5.69 x 10zzrri3
QD
NA z 2.35 x 10z2m-’
0.4
0
s
%
10 L (pm1
15
0.13-_
NAz 3x102’m3 NA= 1 x102’ni’
_.-
N~=O.8xlO”ni’
m-s
0.i!-
VBSE 0 v Vdr =. o-1 v 1000 A’ fox=
N, =7x10z3&’
-
20
I 0.’I >
_
I t
ziOX.
I-
-0.1
- 0.2
I a
0
_
1
I
I
I
I
I
I
I
3
4
5
6
7
8
9
I _
2
-
10
Lbm) Fig. 5. (a) Variation of threshold voltage with channel length for various ion implants. VbS= 0 V, 1,. = 1000 A, Rj = 0.33 pm, V.. = 0.2 V. (b) Change in threshold voltage (AV,, = Vrh - Vti(L = 20 pm)) at zero bias as a function of channel length for various implant concentrations. f = 1000 di, R, = 0.33 pm, vdS=o.lv, vb,=ov.
1691
Note CONCLUSION
REFERENCES
A new simplified threshold voltage model is presented in which the effect of fringing capacitance is included and contains a least number of parameters. It is concluded from the above analysis that the consideration of fringing capacitance effects is vital if small geometry MOS structures are to be accurately modelled. However. one can easily extend this theory to predict the general trend of the experimentally observed anomalous short-channel effect. Acknowledgements-The authors are thankful to the University Grants Commission and Defence Research and Development Organization, Ministry of Defence, Government of India for providing the financial assistance. ‘Departments of Electronic Science and ?Phvsics Motiial Nehru College Unirersitja of Delhi South Campus Benito Juare: Marg Nebv Delhi-l 10021 India
Maneesha’ M. K. Khanna’ S. Hadlar’ R. S. Gupta’
1. G. W. Taylor, IEEE Trans. Electron. Devices 25, 337 (1978). 2. G. W. Taylor, Solid-St. Elect. 22, 701 (1978). 3. L. D. Yau, Solid-St. E/ect. 17, 1059 (1974). 4. M. K. Khanna, S. Haldar. Maneesha. R. Sood and R. S. Gupta, Solid-St. Eec!. 36, 661 (1993). 5. Maneesha. S. Haldar. M. K. Khanna and R. S. Gupta. Solid-St. Elect. 38, 197 (1995). 6. E. W. Greenwich, IEEE Trans. Electron. Deoices 30, 1838 (1983). 7. H. El Kamchouchi and A. A. Zaky, J. Phys. D. Appl. Phys. 3, 1365 (1975). 8. J. R. Brews, IEEE Trans. Electron. Deoices 26, 1696 (1979). 9. J. R. Brews, Solid-St. Elect. 21, 345 (1978). IO. C. H. Wu. G. S. Huang and H. H. Chen, Solid-St. Elect. 29, 387 (1986). 11. P. S. Lin. IEEE Trans. Electron. Devices 38, 1376 (1991). 12. K. N. Ratnakumar. IEEE J. Solid-St. Circuits 17, 937 (1982). 13. K. Y. Fu. IEEE Trans. Electron Devices 29,181O (1982).
Pergamon
PII: s0038-1101(%)ooo80-9
pp. 1687-1691, 1996 Elsevier ScienceLtd Printed-in &eat Britain. All rights reserved 0038-1101/96 $15.00+ 0.00
NOTE AN EMPIRICAL FRINGING CAPACITANCE DEPENDENT THRESHOLD VOLTAGE MODEL FOR NON-UNIFORMLY DOPED SUBMICRON MOSFETs (Received 21 June 1995; in revised form 19 February 1996)
Abstract-A simple and closed-form expression for the threshold voltage of non-uniformly doped submicron MOSFET is developed. The main features of this model are: (1) non-equipotential surface of the device which includes the non-uniformity effect along the channel; (2) charge screening effects to explain the weak substrate bias dependence for short channel devices; and (3) total gate capacitance of MOS structures (the geometric capacitance and the fringing capacitance which is calculated using the conformal transformation considering the effects of electrode thickness and lateral gate dimensions). Comparisons between the present model and experimental data show good agreement for a wide range of channel lengths and applied substrate biases.
INTRODUCIION MOSFET device structures are becoming more sophisticated and the development of a two-dimensional analytical model has become increasingly difficult due to the finite graded source-drain junction depth and the non-uniformly doped substrate. The influence of source and drain voltages on the threshold voltage causes a strong deviation from the long channel behaviour as device geometries shrink. This is because in a short-channel IGFET a significant fraction of the electric field lines associated with The depleted region under the gate terminate at the source and drain junctions leading to two-dimensional sharing of the depleted substrate charge between the source, drain and gate terminals which gives rise to fringing field effects[l-4]. Yau[3] initially proposed the charge sharing model to analyse the short channel effect, which was further modified by Taylor[l]. In both models the unrealistic assumption of an equipotential surface all along the channel at threshold was made, which is not true in practice. A formula for bulk charge @ of short channel non-uniformly doped MOSFET has already been derived by the authors(51, using the charge sheet approach which includes the diffusion current and non-equipotential surface. Due to fringing field lines terminating at the edges and sidewalls of the channel, the potential is enhanced at the edges giving rise to an additional fringing capacitance. In general the gate capacitance is the capacitance of gateoxide-semiconductor structure, provided the gate electrode thickness is negligible as compared to other dimensions of the gate. This classical approach neglects the fringing capacitance that comes into the picture as the device length is shortened. In the present communication, the total gate capacitance has been modelled as a capacitance in parallel with the two sidewall capacitors[6]. By using conformal transformation, the edge capacitance for thick unguarded electrodes is attributed to three different regions. For each region, the capacitance is given by a simple formula valid for any thickness and any separation. Using this, the threshold voltage expression has been remodelled for a short channel non-uniformly doped MOSFET. The effects of substrate bias and substrate doping on threshold voltage Vrhhave also
been studied and is seen that for heavy and deep implants the anomalous short channel effect can no longer be neglected. MODEL FORMULATION The threshold voltage for a long-channel MOSFET is given by: Vrs= Vfi + $b + Q&x.
(1)
Here, V* is the flat band voltage, Qb is the depletion layer charge in the bulk region and C,, is the gate oxide capacitance per unit area. Qb and C,, become geometry dependents for small structures. The fringing capacitance gives an important contribution towards the total gate capacitance of small geometry structures and cannot be neglected. The fringing capacitance Cr can be approximated as the parallel combination of fringing capacitance on the outer side between the gate and the source-drain and the fringing capacitance on the channel side (inner side) between the gate and side wall of the sourcedrain junction. Because of fringing fields at the edges of the channel, the potential is enhanced at the edges. This is due to the fringing field lines terminating on the sidewalls of the channel. The assumptions made in the present analysis are[7]: (i) the capacitance to the back of the electrodes is obtained by replacing each electrode by a rectangular one having the same area as the real one, such that two of its parallel sides are together equal to the perimeter of the original electrodes; and (ii) the total edge capacitance is the capacitance per unit length of a semi-infinite plane multiplied by the actual electrode perimeter. The edge of the thick plate capacitor is transformed into the real axis in the w-plane using the Schwartz-Christoffel transformation. A second transformation is then introduced to transform the w-plane into the complex potential plane by using the same transformation which is further used to calculate the flux. The fringing capacitance is found to comprise the three components (Fig. 1). (i) The fringing capacitance Ci, due to the flux lines emanating from the
1687
1688
Note
2 GATE
1
---
IV sv
o o o
EXPERIMENTAL
c
.5
5102 CHANNEL Fig. 1. Flux lines representing
back of the channel-source
the three components
of Cr.
gate (away from the oxide) towards (drain) (region between 41 and 42): C, = y
the
(2 - m(4)).
01-1 0
(ii) The fringing capacitance Cl, due to the flux lines from the inner side of the gate (close to the oxide) towards the channel (region between 4, and 44): C3 =
7
1
z
3
4
5
V,,(v I Fig. 3. Threshold voltage substrate bias for different channel lengths. N, = 1.6 x 10z2m-3 , Nb=3 x 10”, 1,.=250& R, = 0.33 pm, Vds = 0.1 V.
In(u/a).
(iii) The fringing capacitance CZ, due to the flux lines in between the above two regions (region between 42 and 4,): C2 = %
where y is the fringing parameter, L and W are the length and width of the gate, respectively, and t,, is the oxide thickness.
In(a),
where y = 2[2 - ln(4) + In(a) + ln(u/a)]/rr.
a = 2K(KZ - 1)‘:2+ 2K2 - 1,
Considering the diffusion current and non-equipotential surface, the bulk charge Qb of short channel non-uniformly doped MOSFET using the charge sheet approach has already been derived by the authors[5], and is given by:
K = 1 + &Jr,,. u is determined
from the two transcendental
sL, (a - 1) 2r,,=J;;(R2-
equations:
R I) +ln($$t+)-*In(z)
(3) and
where (4)
R= Therefore parallel by:
the total gate capacitance, as a capacitance in with two sidewall capacitors[6], is given
and MI is the first-order moment of the excess doping[8] N,(x) - Nb of the non-uniform surface and is given by:
M,
(
co. 1 +
Cd =
Y
y),
=p’[!!!.$+
+dx,,,
(5)
with
s II
DI =
[N.(x) - Nb]dx
0
15 as the implanted
(6)
dose and
1.15
I”[--
l].v~dx~
(7)
XF= ;0.80 > 0.35
0.1 0
-
THEORETICAL
a n
EXPERIMENTAL
0
CLASSICAL
5
0
10
LI Pm)
MODEL
15
Fig. 2. Threshold voltage length for various substrate 1,. = 410 A, Rj = 0.4 pm, Vdr = 0.1 V.
20 biases.
is the centroid of surface doping. N.(x) is the acceptor distribution in the direction normal to the surface. Lb is the bulk Debye length, Nb is the uniform bulk doping per unit volume and XL is the depth of the non-uniform region. & is the surface potential given by the difference of potentials at the drain 41 and at the source I$(I as[5,9]:
Note where N(I) is the carrier density at the drain end of the channel and N(o) is the carrier density at the source end of the channel. Incorporating the effect of fringing field capacitance, the threshold voltage expression for short channel non-uniformly doped MOSFET can be obtained as: Kh = vi%+ 24,
1689 gate region. This implies that the total effective charge induced under the gate can no longer be approximated by a rectangular region. The amount of charge reflected to the gate electrode is expected to be reduced. As a result, the bulk depletion charge far away from SiOrSi interface (>L) cannot be “seen” by the gate electrode. Therefore only the effective depletion charge near the surface within the depth proportional to the channel length can terminate the electric field lines originated from the gate electrode. Thus if the depletion depth is much larger than the channel length L, the normal surface electric field in a short-channel MOSFET is insensitive to the variations of the depletion depth. This is called the charge screening effect. Hence as the channel length decreases there is a very weak dependence of the Vch on the substrate bias. Yet as the channel length decreases further the area decreases sharply, and due to heavy doping in the surface the surface is prevented from complete depletion. Thus the threshold voltage decreases with an increase in back bias (in terms of magnitude). As the channel length increases the area of the surface region increases and doping density decreases, and therefore the depletion effect becomes more pronounced and hence VC, increases with back bias. The variation of threshold voltage Vth with drain voltage Vds with L as a parameter for Vbr = 0 V and V, = - 1 V is shown in Fig. 4. The results so obtained are in good agreement with experimental data[l2]. Figure 5(a) shows the plots of the Vth with L for various ion implants at Vh = 0 V along with the experimental results[l3]. It is seen that as the doping in the substrate the threshold voltage tends towards the increases, anomalous behaviour and is also confirmed by Fig. 5(b) i.e. at higher doping the change in threshold voltage changes its sign. Figure 5(b) shows the change in threshold voltage as a function of effective channel length for various ion implant concentrations. The nature of Fig. 5(b) also matches the lack of appropriate data exact matching could not be carried out.
-y~(x)~,Z[L-R,(Jl+~-l)l ___ +
w
CeR RESULTS AND DISCUSSIONS
Figure 2 shows the threshold voltage as a function of channel length at various substrate biases. It is seen that V,I, saturates at a particular channel length and then becomes independent of the channel length. The results have been compared with the experimental results[lO] and the classical model for threshold voltage in which only the capacitance C,, is taken into account, neglecting fringing capacitance. It is evident that the present model is more accurate and is in excellent agreement with the experimental results. Also, it is seen that the fringing capacitance has a considerable influence as the channel length decreases. Figure 3 shows the substrate bias dependence of Vth of the present simplified model and experimental data[ll] for Vdr = 0.1 V and Vds = 5 V. A good agreement is obtained for a wide range of channel lengths and applied substrate biases. The Vth for a short-channel MOSFET (e.g. 0.9 pm) has a very weak substrate bias dependence as compared to a long-channel MOSFET and is accurately predicted by our newly developed model, and can be explained on the basis of charge screening effect. In the short-channel MOSFET with non-uniform doping, the charge sharing occurs between both the source and drain depletion regions and the
NA z
1.2X1022”-3
NB z 1.3x102’m-’ tax = 720
0
A*
1
2
_ Fig. 4. Threshold
6
drain
voltage
THEORETICAL($,,)=-1 THEORETICAL (VBS)= EXPERIMENTAL
0
3 V&v)
voltage
-
---
for different
V 0 V
4
channel
lengths.
t,, = 720 A, R, = 0.3 pm.
5
= Note
0.8 NA
v*s= ov Theoretical Q) Experimental
5.69 x 10zzrri3
QD
NA z 2.35 x 10z2m-’
0.4
0
s
%
10 L (pm1
15
0.13-_
NAz 3x102’m3 NA= 1 x102’ni’
_.-
N~=O.8xlO”ni’
m-s
0.i!-
VBSE 0 v Vdr =. o-1 v 1000 A’ fox=
N, =7x10z3&’
-
20
I 0.’I >
_
I t
ziOX.
I-
-0.1
- 0.2
I a
0
_
1
I
I
I
I
I
I
I
3
4
5
6
7
8
9
I _
2
-
10
Lbm) Fig. 5. (a) Variation of threshold voltage with channel length for various ion implants. VbS= 0 V, 1,. = 1000 A, Rj = 0.33 pm, V.. = 0.2 V. (b) Change in threshold voltage (AV,, = Vrh - Vti(L = 20 pm)) at zero bias as a function of channel length for various implant concentrations. f = 1000 di, R, = 0.33 pm, vdS=o.lv, vb,=ov.
1691
Note CONCLUSION
REFERENCES
A new simplified threshold voltage model is presented in which the effect of fringing capacitance is included and contains a least number of parameters. It is concluded from the above analysis that the consideration of fringing capacitance effects is vital if small geometry MOS structures are to be accurately modelled. However. one can easily extend this theory to predict the general trend of the experimentally observed anomalous short-channel effect. Acknowledgements-The authors are thankful to the University Grants Commission and Defence Research and Development Organization, Ministry of Defence, Government of India for providing the financial assistance. ‘Departments of Electronic Science and ?Phvsics Motiial Nehru College Unirersitja of Delhi South Campus Benito Juare: Marg Nebv Delhi-l 10021 India
Maneesha’ M. K. Khanna’ S. Hadlar’ R. S. Gupta’
1. G. W. Taylor, IEEE Trans. Electron. Devices 25, 337 (1978). 2. G. W. Taylor, Solid-St. Elect. 22, 701 (1978). 3. L. D. Yau, Solid-St. E/ect. 17, 1059 (1974). 4. M. K. Khanna, S. Haldar. Maneesha. R. Sood and R. S. Gupta, Solid-St. Eec!. 36, 661 (1993). 5. Maneesha. S. Haldar. M. K. Khanna and R. S. Gupta. Solid-St. Elect. 38, 197 (1995). 6. E. W. Greenwich, IEEE Trans. Electron. Deoices 30, 1838 (1983). 7. H. El Kamchouchi and A. A. Zaky, J. Phys. D. Appl. Phys. 3, 1365 (1975). 8. J. R. Brews, IEEE Trans. Electron. Deoices 26, 1696 (1979). 9. J. R. Brews, Solid-St. Elect. 21, 345 (1978). IO. C. H. Wu. G. S. Huang and H. H. Chen, Solid-St. Elect. 29, 387 (1986). 11. P. S. Lin. IEEE Trans. Electron. Devices 38, 1376 (1991). 12. K. N. Ratnakumar. IEEE J. Solid-St. Circuits 17, 937 (1982). 13. K. Y. Fu. IEEE Trans. Electron Devices 29,181O (1982).