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D converter
Nuclear Instruments and Methods in Physics Research A251 (1986) 527-530 North-Holland, Amsterdam
527
BEAM CURRENT INTEGRATOR USING A SINGLE CHIP A/ D CONVERTER S. BOSE and R. BHATTACHARYA Saha Institute of Nuclear Physics, Calcutta, 700 064, India
Received 28 April 1986 A simple circuit, based on a CMOS single chip A/D Converter (ICL 7107) serving as a 3 2' digit digital ammeter, which measures current as well as charge, is described. The methods of current to frequency conversion normally utilised for current integration including a simple current to frequency converter usable for currents as low as 10 -e A are discussed. The justification for using CMOS single chip converters and their essential features are pointed out. 1. Introduction Accelerator oriented experiments involving beam current measurement necessitates the development of an accurate, reliable and stable current integrator which can be used to measure beam currents as low as a few nanoamperes. In such experiments, one is interested in integrating beam currents of a comparatively smaller range, generally covering not more than three decades. Normally, a current to frequency (CFC) or a current to voltage (CVC) and then voltage to frequency converter (VFC) is used. In these arrangements the output frequency indicates current and the total number of clock pulses accumulated in a counter for a certain period of time indicates the charge . Glass et al . [1] reviewed four operating principles of current integration, where the input current charges a capacitor, the voltage across which is monitored by a high slew-rate opamp having a high input impedance. A discriminator senses the opamp output and removes a fixed amount of charge from the capacitor. The frequency of charge removal is directly proportional to the input current. Standard VFC chips can be used as CFC for currents in the microampere range [2] but for nanoampere input currents, a suitable CVC is required . A CVC suffers from offset drift problems . Also, for zero input voltage, trimming the zero offset of a VFC to achieve zero output frequency is very difficult and rarely stable. For these reasons, commercial VFC/CFC chips are not found to be suitable for measurement of nanoampere beam currents. There is, therefore, a need for development of a suitable CFC circuit which can be employed for measurement of such small beam currents . The present work describes a CFC which is operable for currents as low as 10 -8 A. Another approach to this problem seems interesting. The lucrative specifications of the low cost industry standard 3-21 digit single chip 0168-9002/86/$03 .50 © Elsevier Science Publishers B.V . (North-Holland Physics Publishing Division)
A/D converter (ICL 7107) induces one to successfully use them for current measurement in the nanoampere range and its integration. 2. Description of the CFC usable in the 10 -8 to 10 -6 A range Fig. 1 describes the schematic diagram of the CFC. The input current t charges the capacitor C through the resistance R and develops voltage Vc across C. V. is buffered by high slew-rate low input bias current opamp B. The buffered voltage is monitored by the discriminator D wired as a schmitt trigger. The R,/R2 ratio sets the hysteresis band while R,/RS ratio sets the discriminator voltage. The RDi-ZD1 network protects the discriminator from input voltages greater than 5 V. Transistor Ti acts as a buffer to D and drives positive feedback network R3- R2 chain, actuates the FET (T2) used to discharge C and also drives the output. The emitter of TI may be either zero or 4 V, which is level translated by Z,1 -R D2 to -1 and - 5 V to switch on or off T2 accordingly . T2 removes a fixed amount of charge [(Vu - VL)C] when the input to the schmitt trigger reaches the upper tripping point Vu , V,, being the lower tripping point. The input resistance R is required to decouple the input cable capacitance from C(- 50 pF). The resistance R 1 is used to limit the maximum discharge current at 10 milliamperes . If t be the time taken for charging C from VL to Vu then, 1/t = i/(VD - VL)C. The output pulse train frequency is f = i/(VU - VL)C, when the discharge time is negligible compared to the charging time . For Vu = 3.5 V and VL = 1.5 V, and C = 50 pF, f = 1 kHz for input current of 100 nA . The potentiometer in R3 - R2 feedback loop is useful for adjustment of the hysteresis band and thus the output frequency. In this circuit the
52 8
S. Bose, R. Bhattacharya / Beam current integrator
Fig . 1 . The circuit diagram of the current to frequency converter in the 10 -8 to 10 -6 A range .
offset variation of B does not affect the performance. Also for no input current, charging of C from stray pickup or noise is insufficient to trigger the discriminator . The CFC has been found to give satisfactory performance and linearity down nearly to zero input current and upto hundreds of nanoamperes . The long term stability is, however, affected by the drift of the schmitt trigger tripping points after a continuous run of several hours. It is seen that for currents below 6 nA the 50 Hz line pickup affects the system stability, whereas for input currents larger than 6 nA the performance is acceptable . The capacitor C is not wired in the negative feed-back loop of B to avoid charging of C due to offset drift of B. Thus generation of some output pulses even with no input current is avoided . However, the drift of Vu and VL , although small, cannot be altogether eliminated and some zero error appears particularly during continuous operation for a long time. A device having autozero facility, therefore, would be a better choice . Hence is the choice of a low cost single chip A/D converter having autozero facility .
3 . Integrator based on a single chip A / D converter The 32 digit single chip A/D converter ICL 7107, used as a 200 mV full scale digital voltmeter provides autozero facility and has an input bias current less than 10 pA . The device also gives guaranteed zero reading for zero volt input and has a zero drift of less than 1 ~LV/°C [3] . The ICL 7107 used as an ammeter having 200 nA full scale needs only a stable 1 MO resistance to convert current into voltage . Similarly, for the 2000 nA full scale a 100 k2 resistance is required. The circuit
described for charge measurement needs an additional counter enabled only for the signal deintegrate phase . Each measurement cycle of ICL 7107 is divided into three phases, (i) autozero, (ii) signal integrate and (iii) reference deintegrate [3] . The oscillator frequency is divided by four and then further divided to form the three convert cycle phases . These are signal integrate (1000 counts), reference deintegrate (0 to 2000 counts depending on input voltages and autozero (1000 to 3000 counts) . For signal less than full scale, autozero gets the unused portion of reference deintegrate phase . Thus the complete measurement cycle is of 4000 (16000 clock pulses) counts independent of input voltage. For a 40 kHz clock frequency, the conversion process rejects 50 Hz, 60 Hz, 400 Hz and 440 Hz stray pickups and the conversion time is 400 ms . An input current i nA will produce i mV if a 1 M92 input resistance (R .) is used for current to voltage conversion . The reference deintegrate phase will stay for 40i clock periods to display 10i as the output reading . Hence for every 400 ms, reference deintegrate phase stays for 40i number of clock pulses and thus 1001 mumber of clock pulses for one second . Thus if the clock pulse is gated for reference deintegrate phase, then divided by 100 and fed to a counter, the counter will display the charge in nC when R c is 1 M12 . The waveform of the buffered output at A (pin 28) is shown in fig. 2, where, during the reference deintegrate phase, the point A is at -100 mV . The output of the comparator LM 710 at B is at logic "1" only during reference deintegrate phase and enables the clock pulses to be recorded in a scaler after division by 100. The 40 kHz clock pulses, derived from 200 kHz crystal oscillator for achieving timing accuracy and allowed only
529
S. Bose, R . Bhattacharya / Beam current integrator
Q a m 0
ri-_111 [W Ill l
1111 LW
Fig . 2. The schematic circuit diagram and timing diagram of the current integrator using ICL 7107 A/D converter . during the reference deintegrate phase are shown at C in fig. 2. This circuit can measure current as low as 10 -10 A to as high as 199 .9 nA. The overall accuracy and stability of the system is dependent on the A/D converter system, the stability of the input resistance and the oscillator frequency . The overall stability and accuracy of the system was measured, using a standard current source (Model TR 6120 made by Takeda Riken Industry Co. Ltd.), for a 30 h continuous run and also for short interrupted runs at ambient temperatures ranging from 20 to 40°C to be 0.1% . The linearity of the system is determined by that of the A/D converter system and no additional nonlinearity is introduced during current integration . For other ranges the input resistance (R.) is to be chosen properly. Ofcourse, the temptation to use a 10 MQ resistance to measure a 10 -11 ampere beam current is restricted by the chip input bias current and the leakage current. The operating range can be increased by another order on the higher side by using a 4Z digit A/D converter like type ICL 7135 . The full scale of 2.0000 volts can be used with a 1 Mdl input resistance to increase the range from 10 -1° to 2 x 10-6 A. Ofcourse
the technique of charge measurement may be different here. The ICL 7135 chip has a busy signal output which can be used for obtaining the measured value of current by ANDing with the clock signal and then subtracting a fixed clock -pulse count 10,001 . The serial output from the AND gate can be used to advance the scaler which essentially integrates the current . 4. Conclusion It is seen that the current integrators using fast solid state switches tend to become current to frequency converters in their ultimate form [4]. The use of standard VFC or CFC is not possible in the nanoampere region and they have an offset drift problem . The CFC described here or the one by Kiselewsky and Zapalski [5] can be used. However, the longterm stability is not satisfactory . The use of a single chip A/D converter (ICL 7106 or ICL 7107) along with a comparator, counter, and a 40 kHz oscillator is satisfactory both in terms of accuracy and stability. This has a good cost to performance ratio also.
530
S. Bose, R. Bhattacharya / Beam current integrator
The A/D converter chip for use in such integrators should possess the following features : (i) input bias current less than 10 pA, (ii) autozero facility, (iii) serial output facility . The ICL 7107 does not possess the serial output facility, hence is the use of the comparator and a few additional components . Acknowledgement The authors are grateful to Mr . M.K. Karmokar and Mr . A. Ghosal for their help in the work .
References F .M . Glass, C.C . Courthey, E .J. Kennedy and H .N . Wilson, I .E .E.E. Trans . Nucl . Sci . NS1 4 (1967) 143 . [2] Analog Devices Data Acquisition Databook (1982) Chapter 12 and Burr Brown Product Data Book (1982) Chapter 6 . ICL 7106, 7107 32' digit single chip A/D converter Application Note, Intersil Inc . [4] J.B .A . England, Techniques in Nuclear structure physics, (McMillan, London, 1974) p 156 . [5] J . Kiselewsky and G . Zapalski, Nucl. Instr . and Meth . 99 (1972) 425 .
527
BEAM CURRENT INTEGRATOR USING A SINGLE CHIP A/ D CONVERTER S. BOSE and R. BHATTACHARYA Saha Institute of Nuclear Physics, Calcutta, 700 064, India
Received 28 April 1986 A simple circuit, based on a CMOS single chip A/D Converter (ICL 7107) serving as a 3 2' digit digital ammeter, which measures current as well as charge, is described. The methods of current to frequency conversion normally utilised for current integration including a simple current to frequency converter usable for currents as low as 10 -e A are discussed. The justification for using CMOS single chip converters and their essential features are pointed out. 1. Introduction Accelerator oriented experiments involving beam current measurement necessitates the development of an accurate, reliable and stable current integrator which can be used to measure beam currents as low as a few nanoamperes. In such experiments, one is interested in integrating beam currents of a comparatively smaller range, generally covering not more than three decades. Normally, a current to frequency (CFC) or a current to voltage (CVC) and then voltage to frequency converter (VFC) is used. In these arrangements the output frequency indicates current and the total number of clock pulses accumulated in a counter for a certain period of time indicates the charge . Glass et al . [1] reviewed four operating principles of current integration, where the input current charges a capacitor, the voltage across which is monitored by a high slew-rate opamp having a high input impedance. A discriminator senses the opamp output and removes a fixed amount of charge from the capacitor. The frequency of charge removal is directly proportional to the input current. Standard VFC chips can be used as CFC for currents in the microampere range [2] but for nanoampere input currents, a suitable CVC is required . A CVC suffers from offset drift problems . Also, for zero input voltage, trimming the zero offset of a VFC to achieve zero output frequency is very difficult and rarely stable. For these reasons, commercial VFC/CFC chips are not found to be suitable for measurement of nanoampere beam currents. There is, therefore, a need for development of a suitable CFC circuit which can be employed for measurement of such small beam currents . The present work describes a CFC which is operable for currents as low as 10 -8 A. Another approach to this problem seems interesting. The lucrative specifications of the low cost industry standard 3-21 digit single chip 0168-9002/86/$03 .50 © Elsevier Science Publishers B.V . (North-Holland Physics Publishing Division)
A/D converter (ICL 7107) induces one to successfully use them for current measurement in the nanoampere range and its integration. 2. Description of the CFC usable in the 10 -8 to 10 -6 A range Fig. 1 describes the schematic diagram of the CFC. The input current t charges the capacitor C through the resistance R and develops voltage Vc across C. V. is buffered by high slew-rate low input bias current opamp B. The buffered voltage is monitored by the discriminator D wired as a schmitt trigger. The R,/R2 ratio sets the hysteresis band while R,/RS ratio sets the discriminator voltage. The RDi-ZD1 network protects the discriminator from input voltages greater than 5 V. Transistor Ti acts as a buffer to D and drives positive feedback network R3- R2 chain, actuates the FET (T2) used to discharge C and also drives the output. The emitter of TI may be either zero or 4 V, which is level translated by Z,1 -R D2 to -1 and - 5 V to switch on or off T2 accordingly . T2 removes a fixed amount of charge [(Vu - VL)C] when the input to the schmitt trigger reaches the upper tripping point Vu , V,, being the lower tripping point. The input resistance R is required to decouple the input cable capacitance from C(- 50 pF). The resistance R 1 is used to limit the maximum discharge current at 10 milliamperes . If t be the time taken for charging C from VL to Vu then, 1/t = i/(VD - VL)C. The output pulse train frequency is f = i/(VU - VL)C, when the discharge time is negligible compared to the charging time . For Vu = 3.5 V and VL = 1.5 V, and C = 50 pF, f = 1 kHz for input current of 100 nA . The potentiometer in R3 - R2 feedback loop is useful for adjustment of the hysteresis band and thus the output frequency. In this circuit the
52 8
S. Bose, R. Bhattacharya / Beam current integrator
Fig . 1 . The circuit diagram of the current to frequency converter in the 10 -8 to 10 -6 A range .
offset variation of B does not affect the performance. Also for no input current, charging of C from stray pickup or noise is insufficient to trigger the discriminator . The CFC has been found to give satisfactory performance and linearity down nearly to zero input current and upto hundreds of nanoamperes . The long term stability is, however, affected by the drift of the schmitt trigger tripping points after a continuous run of several hours. It is seen that for currents below 6 nA the 50 Hz line pickup affects the system stability, whereas for input currents larger than 6 nA the performance is acceptable . The capacitor C is not wired in the negative feed-back loop of B to avoid charging of C due to offset drift of B. Thus generation of some output pulses even with no input current is avoided . However, the drift of Vu and VL , although small, cannot be altogether eliminated and some zero error appears particularly during continuous operation for a long time. A device having autozero facility, therefore, would be a better choice . Hence is the choice of a low cost single chip A/D converter having autozero facility .
3 . Integrator based on a single chip A / D converter The 32 digit single chip A/D converter ICL 7107, used as a 200 mV full scale digital voltmeter provides autozero facility and has an input bias current less than 10 pA . The device also gives guaranteed zero reading for zero volt input and has a zero drift of less than 1 ~LV/°C [3] . The ICL 7107 used as an ammeter having 200 nA full scale needs only a stable 1 MO resistance to convert current into voltage . Similarly, for the 2000 nA full scale a 100 k2 resistance is required. The circuit
described for charge measurement needs an additional counter enabled only for the signal deintegrate phase . Each measurement cycle of ICL 7107 is divided into three phases, (i) autozero, (ii) signal integrate and (iii) reference deintegrate [3] . The oscillator frequency is divided by four and then further divided to form the three convert cycle phases . These are signal integrate (1000 counts), reference deintegrate (0 to 2000 counts depending on input voltages and autozero (1000 to 3000 counts) . For signal less than full scale, autozero gets the unused portion of reference deintegrate phase . Thus the complete measurement cycle is of 4000 (16000 clock pulses) counts independent of input voltage. For a 40 kHz clock frequency, the conversion process rejects 50 Hz, 60 Hz, 400 Hz and 440 Hz stray pickups and the conversion time is 400 ms . An input current i nA will produce i mV if a 1 M92 input resistance (R .) is used for current to voltage conversion . The reference deintegrate phase will stay for 40i clock periods to display 10i as the output reading . Hence for every 400 ms, reference deintegrate phase stays for 40i number of clock pulses and thus 1001 mumber of clock pulses for one second . Thus if the clock pulse is gated for reference deintegrate phase, then divided by 100 and fed to a counter, the counter will display the charge in nC when R c is 1 M12 . The waveform of the buffered output at A (pin 28) is shown in fig. 2, where, during the reference deintegrate phase, the point A is at -100 mV . The output of the comparator LM 710 at B is at logic "1" only during reference deintegrate phase and enables the clock pulses to be recorded in a scaler after division by 100. The 40 kHz clock pulses, derived from 200 kHz crystal oscillator for achieving timing accuracy and allowed only
529
S. Bose, R . Bhattacharya / Beam current integrator
Q a m 0
ri-_111 [W Ill l
1111 LW
Fig . 2. The schematic circuit diagram and timing diagram of the current integrator using ICL 7107 A/D converter . during the reference deintegrate phase are shown at C in fig. 2. This circuit can measure current as low as 10 -10 A to as high as 199 .9 nA. The overall accuracy and stability of the system is dependent on the A/D converter system, the stability of the input resistance and the oscillator frequency . The overall stability and accuracy of the system was measured, using a standard current source (Model TR 6120 made by Takeda Riken Industry Co. Ltd.), for a 30 h continuous run and also for short interrupted runs at ambient temperatures ranging from 20 to 40°C to be 0.1% . The linearity of the system is determined by that of the A/D converter system and no additional nonlinearity is introduced during current integration . For other ranges the input resistance (R.) is to be chosen properly. Ofcourse, the temptation to use a 10 MQ resistance to measure a 10 -11 ampere beam current is restricted by the chip input bias current and the leakage current. The operating range can be increased by another order on the higher side by using a 4Z digit A/D converter like type ICL 7135 . The full scale of 2.0000 volts can be used with a 1 Mdl input resistance to increase the range from 10 -1° to 2 x 10-6 A. Ofcourse
the technique of charge measurement may be different here. The ICL 7135 chip has a busy signal output which can be used for obtaining the measured value of current by ANDing with the clock signal and then subtracting a fixed clock -pulse count 10,001 . The serial output from the AND gate can be used to advance the scaler which essentially integrates the current . 4. Conclusion It is seen that the current integrators using fast solid state switches tend to become current to frequency converters in their ultimate form [4]. The use of standard VFC or CFC is not possible in the nanoampere region and they have an offset drift problem . The CFC described here or the one by Kiselewsky and Zapalski [5] can be used. However, the longterm stability is not satisfactory . The use of a single chip A/D converter (ICL 7106 or ICL 7107) along with a comparator, counter, and a 40 kHz oscillator is satisfactory both in terms of accuracy and stability. This has a good cost to performance ratio also.
530
S. Bose, R. Bhattacharya / Beam current integrator
The A/D converter chip for use in such integrators should possess the following features : (i) input bias current less than 10 pA, (ii) autozero facility, (iii) serial output facility . The ICL 7107 does not possess the serial output facility, hence is the use of the comparator and a few additional components . Acknowledgement The authors are grateful to Mr . M.K. Karmokar and Mr . A. Ghosal for their help in the work .
References F .M . Glass, C.C . Courthey, E .J. Kennedy and H .N . Wilson, I .E .E.E. Trans . Nucl . Sci . NS1 4 (1967) 143 . [2] Analog Devices Data Acquisition Databook (1982) Chapter 12 and Burr Brown Product Data Book (1982) Chapter 6 . ICL 7106, 7107 32' digit single chip A/D converter Application Note, Intersil Inc . [4] J.B .A . England, Techniques in Nuclear structure physics, (McMillan, London, 1974) p 156 . [5] J . Kiselewsky and G . Zapalski, Nucl. Instr . and Meth . 99 (1972) 425 .