Canonical quaternary signed-digit arithmetic using optoelectronics symbolic substitution

Optics & Laser Technology,

Vol. 28, No. 5, pp. 397-403,

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1996 Elsevier Britain.

1996

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Canonical quaternary signed-digit arithmetic using optoelectronics symbolic substitution A. K. CHERRI, N. I. KHACHAB A higher radix based signed-digit number system, such as the quaternary signeddigit (QSD) number system, allows higher information storage density, less complexity, fewer system components, and fewer cascaded gates and operations. An optoelectronics symbolic substitution scheme to handle the parallel quaternary signed-digit (QSD) arithmetic operations is proposed. A conversion algorithm is employed on the QSD numbers to simplify the addition process and reduce the number of the optical symbolic substitution rules. The optical addition operation of two QSD numbers is performed in one-step. An efficient shared content-addressable memory (SCAM)-based optical implementation of the QSD addition/subtraction operations employs a fixed number of minterms for any operand length. The canonical QSD number addition/subtraction scheme requires a significantly reduced number of minterms when compared with a similar previously reported technique. Copyright @ 1996 Elsevier Science Ltd. KEYWORDS: optical computing, canonical quaternary signed-digit numbers, symbolic substitution, truth tables, spatial light modulators, shared content-addressable memory

Introduction

These two number systems have been investigated extensively and have been optically implemented in the past decade. Various optical symbolic substitutionbased23 modified signed-digit and higher-order signeddigit systems have been reported6,‘0-‘8. n-step24, threestep’2,‘4, two-step’5-‘8, and one-step25-27 carry-free addition and borrow-free substraction are performed by checking a pair of reference digits. A higher radix based signed-digit number system such as the quaternary signed-digit (QSD) number system allows higher information storage density, less complexity, fewer system components, and fewer cascaded gates and operations 8,g,2’,22.Recently, an optical two-step higherorder QSD addition/subtraction scheme was proposed 2’ . The computation speed of this technique2’ was increased but at the expense of a huge number (of the order of hundreds) of six-variable minterms for each output digit.

efforts are being expended for speeding up the digital computation process in a wide range of information processing applications. The inherent parallelism of optics offers an attractive approach of attaining high-speed computation (almost at the speed of light), high temporal/spatial bandwidth, and noninterfering communications. The most primitive operation in digital computing is addition since other arithmetic operations (subtraction, multiplication, and division) can be realized through addition. With a binary number system, the computation speed is limited by the formation and propagation of carry, especially as the number of bits increases’. In order to reduce or restrict the delay caused by carry propagation in the arithmetic operations, the operands can be represented in some special number systems other than binary. Several non-binary number representation schemes, such as multiple-value fixed radix-number, residue number, redundant number, and signed-digit2-27, were reported in the past decade to implement efficient arithmetic operations. Constant

In this paper, we propose a much simpler QSD adder based on canonical conversion of the QSD representation using an optical shared contentaddressable memory (SCAM)25-28. Its optical implementation shows superiority in terms of the number of symbolic substitution rules and the number of variables. Further, spatial symmetrical encoding for the QSD digits is used in order to save 50% of the required SCAM.

Various operations using the residue number system can totally eliminate the need for carry propagation while redundant signed-digit number representation ensures that the carry propagation is limited to two positions.

Canonical

The authors are at Kuwait University, College of Engineering and Petroleum, Department of Electrical and Computer Engineering, PO Box 5969 Safat 13060, Kuwait. Received 11 July 1995. Revised 25 September 1995.

quaternary

signed-digit

numbers

In a radix-r redundant signed-digit number system. the digit set [-0, . , -l,O,l, . . . n] assumes(2Cyf 1) 397

Canonical quaternary signed-digit arithmetic:A. K. Cherri and /Il. 1. Khachab

398

values where (Y- 1)/2 < IYd f- 1. For quaternary signed-digit r = 4 and the maximum redundancy digit set is {5,2, i,0, 1,2,3}where 3,2 and i represent - 3, -_ 7 and - 1 respectively. in general, a signed-digit decimal number D may be represented in terms of an n-digit quaternary signed-digit number as ,I-- I D = C bi4 i

(1)

/=o

where bj is selected from the set {r;i,%f. 0, I. 2,3} to produce the appropriate decimal representation. A QSD negative number of the QSD complement of the QSD positive number. For example, using primes to deno_te complementation, we have 5’ = 3,3’ = 3,2’ = 2,2’ = 2, i’ = 1, 1’ = i and 0’ = 0, and therefore, (22),,, = [l 1 23~s~ or, equivalently, (22),, = [1 2 210s~ = [2 2 21Qsr,= [2 3 21~s~. Substraction of two QSD numbers can be obtained by first complementing the subtrahend and then applying an addition operation. The addition (substraction) of two QSD numbers (X and Y) involves two (three) steps: the first step (the first and the second) generates transfer and weight digits which are then summed; and the second (the third) step gives the final sum (difference). The two-step addition and the three-step subtraction rules can be found in Ref. 11. Exploring the redundancy of QSD numbers and the QSD addition rules, a simple one-step addition (instead of two-step) can be obtained by eliminating the consecutive -_ -- -- occurrences of the combination digits 3 3, 3 2, 3 1, 22, 3 3, 32, 3 1 and 22, which are responsible for the generation and propagation of a carry during an addition operation. Accordingly, by exploiting the redundancy of the QSD numbers, it is possible to eIiminate the occurrences of the above-mentioned digit combinations through a canonical conversion algorithm 29. A radix-r signed-digit has a canonical form if the digit bi satisfies the following two conditions (i) ]bi + bi+lI < r,

for all i

(2)

if b; . bi+, < 0

(3)

and (ii) lbi/ < /b;+ I/

where (bj denotes the absolute value of b. Further, Ref. 29 reported an algorithm which computes the canonical form for any radix-r signed-digit (see the Appendix). Now, let b,,-I , b,,-2, . . , b, , b. be the usual representation of (1) above. Table 1 indicates the permissible successors b;+ 1 for various possible values for b; in order for conditions (2) and (3) above to be satisfied for the QSD numbers. Note that only 23 combinations out of 49 of two QSD numbers are permissible. Table 2 shows a partial truth-table for adding two canonical QSD numbers. The complete truth-table has 529 entries representing the permissible combinations .yi xi_, yi J’~_, digits. Note that it is necessary to pad a zero preceeding the most significant digit for the conversion process and a zero trailing the least significant digit for the addition process. The

Table

1.

canonical

Permissible consecutive QSD numbers

bi+l

bi

0, i , 7, 2, 2, 3,s 0, 1, 2, 2, 3 0, i, 2, Z, 3

0 1 i

0, 1 0, i 0 0

z 3 3

0000 0001

0007

0002 0005 0003 0003 0010 0011 0012 0070 0011 0012 0020 0021 0027 0020 0021 --

0021 0030

0037 0030 0031 3100 3ioi 3107 3io2 3102 3i03 3103 3110 311 I 3112 3iio --3111 -_3112 3120 3i21 3i2i -3120 -3121 -_3121 3i30 3137 -3130 -_ 3131

for

2

Table 2. Canonical partial truth-table Xixi- 1 YiYiC 1

digits

Sj 0 0 0 0 0 1 i 1 1 1 i i i 2 2 2 z z: z i i 1 1 i i i i i 0 2 0 0 0 2: 2 2 1 1 1 3 "j 3 z -i 0 0

QSD number

XiXi_jyjyi-1

0100 0101 0107 0102 0102 0103 0103 0110 0111 0112 0170 0111 0172 0120 0121 oi2i 0120 OlZl -0121 0130 0137 0130 0131 3000 5001 3007 3002 %ooZ 3003 5003 3010 3011 3012 3010 -3011 So72 3020 3021 302i 3020 3021 3027 3030 3037 3030 3031

Si 0 0 0 0 0 1

i 1 1 1 i i i 2 2 2 z 2 z i i 1 1 1 1 1 1 1 2 0 2 2 2 0 0 0 3 3 3 i i i 0 0 2 2

addition

XjXi_jyiyi_J

0700 0701 oioi oi02 oi02 0703 0703 oil0 0711 oil2 oil0 --0111 0112 0720 0121 0121 0150 -0121 0121 0730 -0131 -0130 -0131 3100 3101 3101 3102 3102 3103 3103 3110 3111 3112 31 To --. 3111 3172 3120 3121 3121 3120 3121 -3121 3130 313i 3130 3131

Si 0 0 0 0 0 1 7 1 1 1 1 i 7 2 2 2 2 Tz z i 7 1 1 1 1 1 1 1 2 0 2 2 2 0 0 0 3 3 3 i i i 0 0 2 2

Canonical

quaternary signed-digit

following example illustrates both the conversion the addition of two QSD numbers:

arithmetic: A. K. Cherri and N. I. Khachab

and

Table adder

3.

Output

Operand type

QSD representation

Canonical QSD representation

Decimal representation

Addend= Augend =

@33133114= 0?131~1, =

10~O010~@4= 01210103~4=

1537010 -6387,”

1I3102224 =

Final sum

literal

Minimized

minterms

399

for the CQSD

Minterms xix;-

1 YiYi-

Odo,T2Z03,

1 0202,0do,,21 _

do,2r

8986,”

where Izr indicates a padded zero. The above example clearly illustrates that the addition of canonical QSD numbers is carry-free. Also, unlike the binary number system, no special processing is needed to represent a negative number in the QSD number system. Once two QSD numbers are canonically converted, parallel addition operation can take place in one step. Digital implementation circuits for performing the canonical conversion scheme can be designed using 3-bits per QSD digit logic to denote the QSD digits 0, i, 1,2,?, 3 and 3. Both sequential and parallel digital implementations are possible.

3

032do,i,1212,1dol2Zdo,i,3doi2do,i, 2do,TO3,2do,ildo12~2doli~dol

3 The optical

system

In Table 2, four canonical quaternary signed-digit number (CQSD) xi xi_, yi yipI are investigated to generate the output sum Si. An electronically addressable spatial light modulator (SLM) could be used to encode optically the CQSD input numbers. After the CQSD digits have been optically encoded, the addition result can next be generated in a single step. This single step could be performed optically by using a holographic or non-holographic optical shared contentaddressable memory (SCAM)‘5.26,28. The first step in this technique is to minimize the addition truth-table (Table 2) by using a Karnaugh map or Quine McClusky’s tabular reduction method to obtain the reduced minterms for each non-zero output digit. The minimized minterms corresponding to the complete entries of Table 2 are shown in Table 3 where ‘d’ indicates don’t care litera18~9. From this table, it is obvious that the minterms for output literals 1,2 and 3 are digit-by-digit complements -- of thecorresponding minterms for output literals 1,2 and 3, respectively. For example, when the minterm 021dol for output literal 1 is complemented, we obtain the minterm 021d0T for output literal i. Thus, the input minterms and their corresponding output digits have a symmetrical complementary relationship. By exploiting the aforementioned symmetrical complement property, it is possible to reduce the number of the minterms required for the SCAM optical implementation.

3Zioi23 Fig. 1

Symmetric

spatial encoding

for the input CQSD

numbers

-Odo,i2IZdo,i,0303,di3doiO~, z

03dT3doT,0d~312,12dT3doi,di3doiT2, ---

To encode processing, to represent and 3. The digits may

the CQSD digits symmetrically for SCAM it is necessary to use seven spatial chann_els the seven possible input signals 0, 1, i, 2,2,3 encoding scheme for the seven input QSD be expressed mathematically as

(4)

where I’ refers to the ith input and ~~(1
400

Canonical

QSD spatial encoded patterns the input QSD numbers.

quaternary signed-digit

used in the encoding

arithmetic: A. K. Cherri and N. I. Khachab

of

Next, the spatial encoding for the digits 0, I, i,2,2,3 and 3, which are used to encode the stored reference patterns in the SCAM, is performed. This is achieved by taking the pixel-by-pixel complement of each pixel in the encoding of the input patterns expressed in (4), as shown below H$ = If = PI P2 P3 P4 Ps 1’6 171 ff;

= If

= PI pz p3

Hi

=

=

f++p H;

Tf

P4

ps

P6

p7

PI P? P3 P4 P 5 I% PI I Pz P3

P4

Ps P6 Pl

= 7; = PI PZ 7ij

~4

PS ~6 ~1

(5)

H,; = 1: = PI p> P3 P4 Ps p6 PI H,;=I~,=~~PzP~P~P~P~P~

where H” refers to holographic storage in the SCAM. Also, the SCAM processor requires a spatial encoding for the don’t care literal (partial and complete). This is obtained by performing and AND operation (represented by A symbol) among the individual QSDs’ spatial encoding of (5). For instance, to obtain the partial don’t care literal doiT, the signal of 0, 1 and T from (5) and Anded as shown below

31 minterms in the SCAM are needed for our CQSD addition. The optical implementation of the proposed CQSD adder is shown in Fig. 3. In this figure, the input operands are displayed in the input plane SLM and the minterms corresponding to the QSD sum digits of I, 2 and 3 are stored in the SCAM. The light beam originating from the SLM is split by using a 50% beamsplitter. The beam propagating straight through and reflected by mirror Mi is used to detect the occurrences of all the input patterns that produce 1, 2 and 3 as the sum digits. The other beam is rotated 180” using the beam-splitter mirror Mz to identify the presence of all the input patterns that generate I,2 and 3 sum digits. Figure 4 shows the encoded reference patterns that generate the output sum of 1,2 and 3. Two parallel digital registers (X) and (Y) are used to download the n-digits augend and addend CQSD input numbers into the optical processor of Fig. 3. The registers’ contents are used to control the individual pixels of an electronically addressed (n + 1) x 28 pixel SLM forming the input matrix A. Each column of the SLM contains four CQSD (-vi .yi-i yj y;_i) digits. Also,

M

ti From the above equation, it is obvious that the partial don’t care liter-y d,,i yields a dark output whenever the digits 0, 1 and 1 appear in the input plane (see Fig. 1); for all other input signals, (6) will transmit light to the output plane indicating a mismatch. The equations for the other remaining don’t cares are obtained by a similar procedure to (6). Figure 2 shows the spatial symmetric encoding for the QSD digits and the don’t care laterals that are used to represent and store the reference patterns (the minterms) in the SCAM implementation. This symmetrical complement relationship between the spatial encoding of the input digits (see Fig. 1) on the one side and the stored minterms on the other side (see Fig. 2) guarantees that whenever there is a match between an input digit pattern with a stored reference pattern in the SCAM, no light will be transmitted to the output plane, thereby yielding a complete dark output. However, a residual light will always be transmitted to the output plane in the case of a mismatch. Therefore, dark outputs recognize the occurrences of the sum digit being either 7, 1, 2, 2, 3 or 3 in the output plane. Recently, an optoelectronic architecture using SCAM was proposed*‘. In this paper, we propose another SCAM optical implementation that reduces the size of the SCAM by 50% when compared with the technique proposed in Ref. 25. As mentioned earlier, the minterms for output literal 1,2 and 3 of Table 3 are QSD digit-bydigit complements to the corresponding minterms for output literal 1, 2 and 3. In our symmetrical encoding, 1,2 or 3 is a 180” rotated version of 1,2 or 3 (see Figs 1 and 2). This symmetric property of the encoding permits us to reduce the number of minterms (reference patterns) to be stored in the SCAM by 50%. Thus, only

5

i

T

0

r!!i

d_ 0112

d-

01122

-

d

012

d-

01.7

2

3

: d 01

Fig. 2 Symmetric spatial encoding for the CQSD reference patterns that are stored in the SCAM

Splitter

Fig. 3 A shared CAM optoelectronics implementation of the CQSD adder

4;

Canonical

quaternary signed-digit

arithmetic: A. K. Cherri and N. I. Khachab

401

Similarly, using the symmetric coding of Fig. 2, the 28 x 31 B matrix, corresponding to the reference patterns that output the digits 1,2 and 3, is given by

output

output

2

I

Fig. 4 The encoded SCAM for the CQSD adder which generates 1, 2 and 3 on the output plane

the four-variable minterms of Table 3 corresponding to the sum digits 1,2 and 3 are stored in the SCAM forming 28 x 31 matrix B.The optical processor of Fig. 3, which performs an optical analogue multiplication of matrix A (and a rotated version of matrix A denoted as A')with matrix B,produces an (n + 1) x 31 pixel output matrix Co (CL) on the output detector plane. Cu and CL represent the upper half and the lower half of the optical detector array. Notice that matrix Cu is used to identify the presence of the sum digits 1,2 and 3 while matrix CL detects the presence of -I,2 and 3. By adjusting the bias of the optical detector array, the intensity of each element of matrices Cu and CL is thresholded to only two levels: 0 and 1. After thresholding, the electronic signals are inverted by using two (n + 1) x 31 inverted arrays (one for Co and the other for CL matrices). The inverted signals are then grouped and passed through two (n + 1) x 31 OR gate arrays to generate the outputs corresponding to 1,2,3 and 1,2,3. For illustration purposes, consider the addition of two CQSJI numbers: X = 12 14 = 23 10 and Y = 2034 = -29,,, These two 3-digit inputs are regrouped to produce a 4 x 4 matrix sn 0 -YI .x0 x2 @

T 2

L’o 0 )‘I ?‘o

-YI ?‘? S? 0

YI ?‘Z

Izr T

3 0

D 3

2 ;:a;

0000100 0100000 0010000 0001000

0001000 0000100 0100000 0010000

1000000 0001000 0000010 0001000

0001000 1000000 0001000 0000010

0010000 0000010 0000100 0001000

0001000 0010000 0000010 0000100

0000001 0001000 0100000 0001000

0001000 0000001 0001000 0100000

and A’=

1111111111 1111111011 1101100100 0010011111 1111111111 1111111111 1101111100 1010011111 0111000111 0101111000 0101111000 0111111011 0111111111 1111111111 1111111111 0111111111 1110001100 1001110011 1111111111 1111111111 1110101101 1001110111 1111010010 0110101001 0110101001 0111111011 1111111011 1111111111

11111111111101 11111111100011 11111101111110 00000010111111 11111111011111 11111111111111 11111111111110 11111011111111 00100101111111 01010111100010 01010111000000 01010111000001 01010111011111 11111110111111 11111111111011 11111110011101 11001111111111 00111001110110 11111111101111 11111111111111 11110111111111 01111111111111 10011011111110 11000000011100 11000000001000 11111000001000 11111001101110 11111111110111

t Producing output 2

t Producing output 1

When both A and A' are multiplied by matrix B,they generate the following 4 x 31 output matrices for Cu and CL

cu =A

x B=

3243222 4440224 3124333 3342333 t output

2433434221 3224432144 2433312323 2223343133 3

t output

2

34332333123132 13343334321233 33322313334332 12222123422341 t output

1

and

Using the symmetric coding rules of Fig. 1, we can generate the following 4 x 28 A and A' matrixes

A =

B=

1111111 1110001 1001111 0111111 1111111 1111111 1111110 0111111 1001111 1010000 1010000 1110001 1111111 1111111 1111111 0011110 1101011 1110111 1111111 1111111 1111101 1110111 1101011 0011000 0011000 0011110 1111111 1111111 t Producing output 3

3133212 cL = A’ x B = 4342333 2244332 3432234 t output

2422413202 3424443233 1443434334 2233242133 5

t output

2

34231323223221 23343334431342 34232332034223 11132133332332 t output

T

From the matrix C”, we observe only one 0 in the second row, which corresponds to the digit 3 in the output, while the remaining rows include non-zero values. Thus, we expect an output of 3 in this position in the resulting matrix. Similarly, from the matrix CL, two zeros in the first and the third row are observed; therefore, output digits 2 and r are expected to appear in the results. Electronically post processing Co and CL

Canonical

402

quaternary signed-digit

arithmetic: A. K. Cherri and N. I. Khachab

If (a;+, > -(rUj+l =O endif If (a;+, = -(r-

(i.e thresholding, inverting, and ORing) yields the following output vectors o”=:

U;+2

:

2

a;+1 =

0

By combining the above two output vectors, the final output vector (the sum) is given by

where the first element of this vector corresponds to the least significant digit of the result, given by - 6to = 01324. Notice that the optical system of Fig. 3 utilizes the same 28 x 31 pixel SCAM to generate both output vectors 0” and OL.

2

3

4 5

6

I

Acknowledgement The authors would like to acknowledge the support of Kuwait University research administration grant No. EE069. (after

Ref. 29)

Let X=a,_lan_z . . . al a0 be an n-digit radix-r signeddigit number. The following algorithm generates the equivalent (n + I)-digit canonical number representation. Let u,+~ = 0 For i=O to n If a; # 0 then If (a; > 0 and a;+t > 0) then If (a; + u i+l > r) then U;

Uj+l

endif

8 9

IO I1

12

13

14 15

=Ui-r

Uj+l =U;+l + 1 endif If (a;+,
=Ui+l-1

1

References I

In this paper, an efficient one-step optoelectronics CQSD carry-free addition/subtraction is presented. The canonical conversion of QSD numbers provides the least number of symbolic substitution rules (3 1 minterms) for carry-free arithmetic compared with the QSD SS-based system reported in Ref. 21 (hundreds of minterms). Also, our scheme used only four variables for each reduced minterm compared with six variables used in Ref. 21. Further, our symmetrical complement encoding, along with our proposed optical SCAM processor, saves 50% of the system memory.

ai+1+

endif Else (a; < 0 and ai+1 > 0) then If (--a; > a;+,) then a; = a; + r ai+1 = a;+1 - 1 endif endif endif Next i

Conclusions

Appendix

1)) then 1

endif Elseif (a; > 0 and a;+] < 0) then If (a; > - a;+,) then ai = ai-r

and

op;

= U;+2 -

1)) then

16 17

18

19

20

Johnson, E.L., Karim, M.A. Digifal Design: A Pragmatic Approach, PWS-KENT Publishing Co., Boston (1987) Szaho, N.S., Tanaka, R.T., Residue Arithmetic and its Applications to Computer Technology, McGraw-Hill, New York (1967) Gautzouilis, A.P., Malarkey, E.C., Davies, D.K., Bradley, J.C., Beaudet, P.R. Optical processing with residue LED/LD lookup tables, Appl Opt, 27 (1988) 1674-1681 Psaltis, D., Casasent, D. Optical residue arithmetic: a correlator approach, Appl Opt, 18 (1979) 1163-1171 Hwang, A., Tsunida, Y., Goodman, J.W., Ishihara, S. Optical computation using residue arithmetic, Appl Opt, 18 (1979) 149-162 Hwang, K., Louri, A. Optical multiplication and division using modified signed-digit symbolic substitution, Opt Eng, 28 (1989) 364-372 Athale, R.A., Raj, K., Savkar, V.A. Fully parallel analog optical calculation of multiple outer products, Opt Left, 18 (1993) 989-99 I Mirsalehi, M.M., Gaylord, T.K. Logical minimization of multilevel coded functions, Appl Opt, 25 (1986) 3078-3088 Gaylord, T.K., Mirsalehi, M.M. Truth-table look-up processing: number representation, multilevel coding, and logical minimization, Opt Eng, 25 (1986) 22-33 Alam, M.S. Parallel optical computing using recoded trinary signed-digit numbers, Appl Opt, 33 (1994) 4392-4397 Avizienis, A. Signed-digit number representations for fast parallel arithmetic, IRE Trans. Electronic Computers, 10 (1961) 3899400 Cherri, A.K., Karim, M.A. Modified signed digit arithmetic using an efficient symbolic substitution, Appl Opt, 27 (1988) 3824-3827 Backer, R.P., Drake, B.L., Lasher, M.E., Henderson, T.B. Modified signed-digit addition and subtraction using optical symbolic substitution, Appl Opt, 25 (1986) 2456-2457 Casasent, D., Woodford, P. Symbolic substitution modified signed-digit optical adder, Appl Opt, 33 (1994) 1498- 1506. Awwal, A.A.S. Recoded signed-digit binary addition-subtraction using opto-electronic symbolic substitution, Appl Opr, 31 (1992) 3205-3208 Cherri, A.K. Symmetrically recoded modified signed-digit optical addition and subtraction, Appl Opr, 33 (1994) 4378-4382 Li, Y., Eichmann, G. Conditional symbolic modified-signed-digit arithmetic using optical content-addressable memory logic elements, Appl Opt, 26 (1987) 2328-2333 Hwang, K., Panda, D.K. High-radix symbolic substitution and superposition techniques for optical matrix algebraic computations, Opr Eng, 31 (1992) 2422-2433 Ahmed, J.U., Awwal, A.A.S., Karim, M.A. Two-bit trinary full adder design based on restricted signed-digit numbers, Opr Laser Technol, 26 (1994) 225-228 De Biasc, G.A., Massini, A. High efficiency redundant binary number representations for parallel arithmetic on optical computers, Opt Laser Technol, 26 (1994)2 19-224

Canonical quaternary signed-digit arithmetic: A. K. Cherri and N. I. Khachab 2I

22 23

24 25

Alam, MS., Jemili, K., Karim, M.A. Optical higher-order quaternary signed-digit arithmetic, Opt Eng, 33 (1994) 3419-3426 Arrathoon, R., Kozaitis, S.P. Shadow casting for multiple-valued associated logic, Opt Eng, 25 (1986) 29-37 Huang, A. Parallel algorithm for optical digital computer, in Proceedings qf’ the IEEE 10th Intrrnarional Optical Conywring Conference ( 1983) I3 - 17 Brenner, K.H., Huang, A., Streibel, N. Digital optical computing with symbolic substitution, Appl Opt, 25 (1986) 3054&3060 Ha, B., Li, Y. Parallel modified signed-digit arithmetic using an optoelectronic shared content-addressable-memory processor, Appt Opt, 33 (1994) 3647-3662

26

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403

Li, Y., Kim, D.H., Kostrzewski, A., Eichmann, G. Contentaddressable-memory-based single stage optical modified-signeddigit arithmetic, Opt Let?, 14 (1989) 1254.- 1256 Barua, S. Single-stage optical adder/subtracter, Opt Eng, 30 (1991) 265-270 Louri, A. Optical content-addressable memory parallel processor: architecture, algorithms, and design concepts, Appl Opr, 31 (1992) 3241-3258 Clark, W.E., Liang, J.J. On arithmetic weight for general radix representation of integers, IEEE Tram lr~fortn Theor.v, 19 (1973) 823-826

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