Optical Symbolic Substitution Architectures

ADVANCES IN ELECTRONICS AND ELECTRON PHYSICS. VOL . 89

Optical Symbolic Substitution Architectures M . S . ALAM Department of Engineering. Purdue University. Fort Wayne. Indiana

and

M . A . KARIM Center for Electro.0ptics. University of Dayton. Dayton. Ohio

1. Introduction . . . . . . . . . . . . . I1. Optical Symbolic Substitution (OSS) . . . . 111. Coding Techniques . . . . . . . . . . IV . Signed-Digit Arithmetic Using OSS . . . . A . Signed-Digit Theory . . . . . . . . B. Algorithm for OSS Rules . . . . . . C . Higher-Order MSD Arithmetic . . . . D . Truth-Table Minimization . . . . . . E . MSD OSS Rule Coding . . . . . . . F . Optical Implementation . . . . . . . V . OSS Architectures . . . . . . . . . . . A . OSS Using Diffraction Gratings . . . . B. OSS Using Matched Filtering . . . . . C . OSS Using Phase-Only Holograms . . . D . OSS Using Opto-electronic Devices . . . E . OSS Using Acousto-optic Cells . . . . F . OSS Using Multiplexed Correlator . . . G . OSS Using Shadow-Casting and Polarization H . OSS-Based Image Processing . . . . . VI . Limitations and Challenges . . . . . . . References . . . . . . . . . . . . .

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53 54 58 59

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66 68 70 71 72 74 74 77 80 82 83 87

90 91

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I INTRODUCTION

Optical information processing techniques have shown remarkable promise over all-electronic techniques for computation-intensive applications . It appears that the escalating demand for higher computing power can only be achieved through optical computing or digital optical computing techniques . Optical computing systems will allow two- and three-dimensional interconnections and non-interfering communication. as well as ultrahigh switching speed . The main thrust in optical computing research 53

Copyright 0 1994 by Academic Press. Inc. All rights of reproduction in any form reserved. ISBN 0-12-014731-9

54

M . S. A L A M and M. A . KARIM

/-:

1 1y-

Inputs

outputs a

Recognition Pattern

Substitution Pattern b

FIGUREI . (a) A Boolean logic system and (b) a symbolic substitution system.

is thus being geared towards the development of alternate algorithms and architectures to exploit all the advantages that optics can offer. Among the various optical computing techniques, however, symbolic substitution appears to be the most promising since it exploits the parallelism of optics completely (Huang, 1983; Yu and Jutamulia, 1987). Symbolic substitution has been proposed as a very powerful means for implementing optical computing operations (Huang, 1983). This technique exploits the parallelism of optics to first perform spatial search (referred to as the recognition) for all occurrences of a particular pattern and then replace (referred to as substitution) all occurrences of this pattern with another pattern. While a Boolean operator, such as AND, recognizes a combination of input bits and produces a single output bit, symbolic substitution recognizes not only a combination of bits, but also the relative spatial location of these bits and outputs often a combination of bits positioned according to an arbitrary substitution rule, as shown in Fig. 1 (Brenner et al., 1986). 11. OPTICAL SYMBOLIC SUBSTITUTION (OSS)

Consider the recognition and substitution phases of symbolic substitution for a particular pattern using intensity coding as shown in Fig. 2. In the recognition phase, a parallel search is performed for a desired pattern

OPTICAL SYMBOLIC SUBSTITUTION ARCHITECTURES

55

t

Y,b-@

t

Search Pattern a

I

Left/*

t

Input Pattern

Recognition Phase

Search Pattern

Substitution Pattern C

t

t

Substitution Phase d

FIGURE2. A symbolic substitution system using intensity coding. (a) Search pattern, (b) recognition unit, (c) substitution pattern, and (d) substitution unit.

56

M. S. ALAM and M. A . KARlM

shown in Fig. 2a on the input pattern shown in Fig. 2b. The input pattern is copied n times, where n is the number of opaque pixels in the search pattern. These copies are shifted up, down, left, or right depending on the location of the opaque pixels in the search pattern. These copies when superimposed will produce in the final output an opaque pixel for each occurrence of the search pattern in the input pattern. A careful observation of the search pattern reveals that a shift down by one row of the original pattern will bring the top left pixel t o the desired bottom left position, while a shift left by one column of the original pattern will bring the bottom left pixel to the desired bottom left position. Accordingly, in Fig. 2b, two copies of the original pattern are needed because there are two opaque pixels present in the search pattern. These two copies of the original image are superimposed, i.e., ANDed, and the resulting output pattern shows only two opaque pixels at the bottom left position of each region, identifying the two instances of the search pattern in the input pattern. A mask may be used to read only the lower left pixel of the 2 x 2 patterns. The output pattern obtained from the aforementioned recognition phase is used as the input pattern for the substitution phase as shown in Fig. 2d. Assume that the intent is to replace the search pattern with the scribe pattern, as shown in Fig. 2c. The scribe pattern has an opaque pixel at the top right position. Consequently, it is necessary to move this dark pixel to the new location by shifting right by one column and then shifting up by one row, as shown in Fig. 2d. The resulting pattern is ORed with the input pattern applied to yield the final output pattern, which has the scribe pattern for every instance of the search pattern detected during the recognition phase. Another example of symbolic substitution using polarization coding is shown in Fig. 3. The search pattern is shown in Fig. 3a, while the input pattern is shown on the left side of Fig. 3b. The input image is copied twice, corresponding to the two polarized pixels of the search pattern. One copy is shifted left by one column, corresponding to the lower right pixel of the search pattern, while the other copy is shifted down by one row, corresponding to the upper left pixel of the search pattern. If a search pattern pixel is horizontally polarized, the corresponding copy of the input pattern is passed through a half-wave plate before shifting. All copies of the input pattern are then superimposed to yield the recognition pattern, as shown on the very right of Fig. 3b. This pattern contains pixels with two horizontal polarizations, two vertical polarizations, and some with both polarizations. All pixels with only vertical polarization indicate the presence of a search pattern in the input image. Next, the recognized output is passed through an analyzer and then through an optical NOR gate array to remove all unwanted signals and to yield the final output pattern shown in Fig. 3b. The substitution phase is shown in Fig. 3d, where the output pattern obtained

57

OPTlCAL SYMBOLIC SUBSTlTUTION ARCHITECTURES

rr

m

Detected Pattern

Search Pattern a

/

Shift / /’Left

t

Plate

/

Superposition

Recognition Phase b

Search Pattern

Substitution Pattern C

t NO Shift

Output Pattern

3

t

d Substitution Phase

FIGURE3. A symbolic substitution system using polarization coding. (a) Search pattern, @)

recognition unit, (c) substitution pattern, and (d) substitution unit.

58

M. S. ALAM and M. A . KARIM

from the recognition phase is used as the input. This input pattern is copied, shifted, and superimposed according to the number and location of polarized pixels of the substitution pattern shown in Fig. 3c. The rightmost pattern in Fig. 3d represents the substituted pattern. 111. CODING TECHNIQUES

Symbolic substitution employs two-dimensional spatial patterns as symbols. For illustration, to implement a binary logic either intensity coding or polarization coding may be used. In intensity coding for binary logic, a dual-rail scheme is used where both 1 and 0 have a transparent and an opaque pixel in them, as shown in Fig. 4. Thus, a bit of information is represented by two pixels, where one pixel is the complement of the other pixel. The relative positions of the transparent and opaque pixels indicate whether it is 1 or 0. The dual-rail scheme simplifies the recognition phase of symbolic substitution, since it is then necessary to identify only the transparent or the opaque pixel of an input pattern. This type of coding is also preferable from the viewpoint of energy balancing, since it guarantees homogeneous distribution of energy (Brenner et al., 1986). In polarization coding, a bit is represented simply by a particular state of light polarization. For example, 1 can be represented by a vertically polarized light (denoted by a vertical arrow) pixel and 0 can be represented by a horizontally polarized light (represented by a horizontal arrow) pixel, as shown in Fig. 5 . The advantage of polarization coding over intensity coding is the ability to recognize with respect to either zeros or ones, not simply one or the other. Polarization codes, when compared to the intensity codes, generally reduce the size of the inputs by half, since only one pixel is required for coding both 0 and 1. Note that for systems involving more than two symbols, such as the trinary signed-digit number system, additional pixels will be required in each case of the aforementioned coding techniques. In the following

FIGURE4. Intensity coding.

OPTICAL SYMBOLIC SUBSTITUTION ARCHITECTURES

0

59

1

FIGURE5. Polarization coding.

section, we consider the implementation of high-speed carry-free addition and borrow-free subtraction using symbolic substitution.

IV. SIGNED-DIGIT ARITHMETIC USINGOSS The most important arithmetic operation in digital computing is addition. But as the bit string of the pair of numbers to be added increases, the computation speed decreases because of the propagation of the carry through the cascaded adders. Carry look-ahead addition may speed up the process for shorter bit strings. But as the number of bits increases, the number of inputs to the logic gates becomes excessive, thus creating a high fan-in problem (Alam et al., 1992a; Awwal et al., 1992). To solve this speed bottleneck problem, various nonbinary number systems such as multiplevalued fixed radix, residue, and modified signed-digit (MSD) (Li and Eichmann, 1987; Huang et al., 1979; Cherri and Karim, 1988; Bocker et al., 1986; Drake et al., 1986) have already been proposed and investigated. Although multiple-valued fixed radix number representation increases the processing speed, it cannot guarantee carry-free computation. The residue number system also allows for a parallel processing scheme, but in order to process large numbers, large prime modulo logic elements, which are often difficult to implement, must be used (Karim and Awwal, 1992). Among these methods, the MSD arithmetic appears to be the most promising because it provides parallel, carry-free addition and borrow-free subtraction with storage complexity proportional to the length of the bit string (Cherri and Karim, 1988; Avizienis, 1961; Mirsalehi and Gaylord, 1986; Li et al., 1989). In MSD carry-free addition schemes, the pair of numbers to be added is first converted into an intermediate pair such that the addition of the latter pair will not generate any carry. These two steps of the MSD system readily correspond to the recognition and substitution phases of symbolic substitution. Optical symbolic substitution schemes for binary arithmetic has already been proposed and investigated (Brenner et al., 1986). Huang (1983) presented the basic symbolic substitution rules for binary (1 bit)

60

M. S. ALAM and M. A. KARIM

addition which processes two bits at a time. Thus, for an n-bit string, n computation steps are necessary, which makes the computation process relatively slow (Kozaitis, 1988; Eichmann et al., 1990; Alam et al., 1992b). Li and Eichmann (1987) improved this technique by incorporating additional information (called the reference) from the next less significant pair of digits so that when the first step symbolic substitution rules are applied there are no two identical nonzero MSD digits in any column, which would otherwise result in a carry in the second step. Kozaitis (1988) identified the addition rules for a multiple-bit (two-bit) symbolic substitution scheme, thus allowing four bits to be processed at the same time. Therefore, for longer words, the use of a combination of the rules presented in Kozaitis (1988) reduces the number of computational steps, thus resulting in higher computational speed. Applying the higher-order symbolic substitution rules developed by Kozaitis (1988), Eichmann et al. (1990) had explored a number of optical implementations. However, the methods presented in Eichmann et al. (1990) and Kozaitis (1988) are still dependent on the number of to-beprocessed bits, thus resulting in an unwanted bottleneck in the computation speed when processing large numbers. Most recently, a number of higher-order signed-digit based symbolic substitution techniques for arithmetic operations have been reported (Alam et al., 1992a,b). In these techniques, both addition and subtraction operations can be implemented in only two steps, irrespective of the number of bits to be processed. The higher-order symbolic substitution techniques are expected to make the implementation of higher-order MSD-based symbolic substitution systems faster, easier, and more practical. Accordingly, in the following sections, we consider the design of a higher-order MSD symbolic substitution system. A. Signed-Digit Theory

In general, a signed decimal number D may be represented in terms of an n-bit radix-r signed-digit number as

D

n

= i= 1

diri

(IV. 1) --

where the modified signed-digitdi is a member of- the set [ r - 1, r - 2, ..., l,O,l ..., r - 2 , r - 1 ) with r - 1, r - 2, ..., 1 representing -(r - l), - ( r - 2), .. ., - 2, and - 1, respectively. Herein, the value of r is taken to be 2 since we are dealing with the MSD number system. Because a number may have more than one representation in the MSD number system, it is also known as a redundant number system.

OPTICAL SYMBOLIC SUBSTITUTION ARCHITECTURES

61

B. Algorithm for OSS Rules

In a higher-order MSD system, a carry will be generated when the two-bit operands are -either -- (lX, lX), or (11, Ol), or (01, l l ) , or (TX, TX), or ( T i , Or), or (01, 1 1 ), where X is a don’t-care literal. Thus, the carry generation can be prohibited by transforming the addition operands into an intermediate sum and an intermediate carry such that addition of the ith intermediate sum digit and the intermediate carry generated at the (i - 1)th digit position will not produce a carry. The algorithm to derive the higherorder MSD symbolic substitution rules consists of the following steps: Step 1: Find all possible three-digit MSD representations for each sum value and arrange them in one group. The most significant MSD digit is termed intermediate carry C,,,and the remaining two digits are . identified as intermediate sum SiSi-, Step 2: For each group of step 1, find all representations of the twodigit MSD addend and augend operands. Step 3: Based on the reference pair of digits [(i - 2)th digit pair], select a suitable symbolic substitution rule such that the addition of the (i - 2)th intermediate carry and the (i - 1)th intermediate sum will not generate any carry. The intermediate pair of digits are then added to get the final sum. During this addition, for the least significant-digits, the reference digits are assumed to be zero, and for odd-length operands, zero padding can be used if necessary. For MSD subtraction, if the subtrahend is bitwise complemented, then all steps of MSD addition can be applied. C. Higher-Order MSD Arithmetic

For the proposed system, all possible sums of two 2-bit MSD numbers are considered, as shown in Table I. Since the sums range from -6 (i.e., T i + 17) to + 6 (i.e., 1 1 + l l ) , there are 13 possible groups of sums. Also, with the exception of -6,-4, 0, +4, and +6, the rest of the decimal -- - For numbers in Table I have more than one MSD representation. - example, the MSD representations corresponding to - 3 are 011, 1 1 1 , and 701. The higher-order MSD symbolic substitution addition rules are listed in Table 11, with the last two columns listing the intermediate carry and sum digits. The pairs of 2-bit MSD numbers to be added are divided into 13 groups such that the two numbers AiAj-, and BIBi-, to be added (in each group) correspond to the same sum. For example, all group 2 entries of Table I1 correspond to the sum - 5 . Assume that the intermediate sum digits

62

M. S. ALAM and M. A. KARIM TABLE I MSD REPRESENTATION OF THE SUMOF TWO 2-BIT NUMBERS Decimal number

MSD representation ~

-6 -5 -4

-3 -2 -1

0

I 2 3 4 5 6

-_

110

i- o i , T i 1

100 oii,iol,ili

oio,iio

o o i , o i 1.1,

i i 1

000

o o 1, o 1 i, 1 T i 010, 011,

100 101,

Iio

ioi, 1 1 1 iii

110

TABLE I1 HIGHER-ORDER MSD OSS RULETRUTHTABLE FOR ADDITION

IT

2

i i i- i

To

3

-T i

o- i

o i

i- i

-

i i

1

1 0

10

T i 1 1

4

1 0

o i

-1 0 1 1

-

1 0

0 0

o i

o- i -1 1 1 1

-

-1 1

1

-

10

ii

o i 0 0

1 1

0 0

o- i

1

10

T i

0 0

5

i i

Don’t care All negative Otherwise Don’t care

i i

All negative

-

I

01

ii

-1 0 -1 1

Otherwise

0

0- 0 1 0

Don’t care

0

10

-

10

o- i

1 1

o- i I 1

(continues)

63

OPTICAL SYMBOLIC SUBSTITUTION ARCHITECTURES TABLE 11-continued

NO.

Addend

Augend

AiA,-I

BiBi-1

Carry A,-2 Bi-2

Sum

Ci

si

si- 1

o i

0 0

All negative

0

11

Otherwise

0

o i

7

0 0

0- 0 1 1 00

8

0 0 i 0

1 0 i 0

0 0 0 i

0 1 0 i

Don’t care All negative

0 0

00 0 1

Otherwise

0

1 1

1 0 0 0

0 0 1 1

0 1 0 i 0 1

0 0 1 i 1 i

Don’t care

0

1 0

I 0 1 0 1 i 1 1 0

1 0 0 1 0 i 1 0 1

0 1 0 1 i 1

0 1 1 0 i 0

All negative

11

Otherwise

o i

1 0 1 i 1

Don’t care

00

I T

0 1 1 i 1

12

1 1 1 0

1 0 1 1

All negative Otherwise

0 1 i i

13

1 1

1 1

Don’t care

1 0

6

9

0- 0 1 1 0 0

I T I T

10

11

1 1

o i

correspond respectively to the ith (most significant digit) and the (i - 1)th digit positions. Inspection of Table I1 reveals that the allowable combination of digits at the (i - 2)th digit position must satisfy one of the following three cases: Case 1: In this category, the digit pair at the (i - 2)th digit position belong to the set T E [ i f , TO, O f ) -. When this case is encountered, there can be negative carry (i.e., 1 ) propagating from the (i - 2)th to the (i - 1)th digit position. Therefore, the (i - 1)th digit of the intermediate sum must be either 0 or 1. Note that if there is a T carry

64

M . S. ALAM and M. A. KARIM

propagating from the ( i - 3)th to the ( i - 2)th digit position, the digit pairs 10 and 01 of the set T will also generate a 1 carry to the (i - 1)th digit position. This category is referred to as all-negative. Case 2: This category includes the members of the set T when no T carry is generated from the (i - 2)th digit position. Evidently, the ( i - 1)th digit of the intermediate sum can be either 0 or 1. This category is referred to as the otherwise case. Case 3: When the (i - 1)th digit of the intermediate sum is 0, there is no restriction on the digit pair at the (i - 2)th position, so any member of the set S + may be allowed. This corresponds to the don’t-care case. It should be mentioned that the digit pair 00 can be a member of the set T or T.

s

The aforementioned cases are listed in column 3 of Table 11, which determines the Si, Si- , and Ci+entries of column 4. We observe that the negative digit pairs at the ( i - 2)th position produce a carry of either 0 or 1, in which case the allowed (i - 1)th sum digit is either 0 or 1. The remaining combinations of digits produce a carry of either 0 or 1 with the corresponding sum digit allowed to be either 0 or 1. For a particular input condition, sometimes the requirements imposed by the ( i - 2)th pair of digits can be satisfied in multiple ways. For example, group 2 input pairs of Table I1 can be mapped into either T i 1 or 101.When mapping with an intermediate sum of 11, the (i - 2)th digit pair couldn’t be allowed to be 11 because a carry of 1 will be generated otherwise by this combination. Thus, all combinations except 11 are allowed for this position. However, when substituting an intermediate sum of 07 for the same input condition, the selection of the (i - 2)th digit position should be restricted to only those combinations of numbers which will not produce a negative carry. The following example shows the application of some of the symbolic substitution rules listed in Table I1 where 4 indicates a padded zero. Notice that the final result of addition is carry-free. The higher-order MSD symbolic substitution rules for subtraction can be derived from the addition rules of Table I1 with minor modification. Addend Augend

= =

I

T 11o i o i o i

o 1 T To 1 T 1 i 1

= 427,, = 76,,

Intermediate sum = 1 0 0 0 0 0 0 1 0 Intermediate carry = 0 6 0 6 0 6 0 6 0 6 6 Final sum Final carry

ioooooioio

= = 0000000000

=503,,

65

OPTICAL SY MBOLlC SUBSTITUTION ARCHITECTURES

The MSD subtraction is performed by adding the minuend (P) t o the complement of the subtrahend (Q), since P -Q

=

P

+ Q.

(IV.2)

Therefore, by complementing the BiBi-, entries of column of Table 11, the higher-order MSD symbolic substitution subtraction rules can be obtained, as depicted in Table 111. Consider the tabulated example for MSD subtraction. Minuend Subtrahend

_ _ ioioioi

= 1 11 = 1 1 1 oo 1 1 1 i 1

=

939,,

= -613,,

Intermediate sum = 0 0 1 10 0 1 0 T 0 Intermediate carry = 0 0 1 $J 0 d, 0 $J 0 $J $J Final difference Final borrow

= 0 1 I 100 1 0 T O = 0000000000

= 36,,

It is obvious that the final result of subtraction is borrow-free. TABLE Ill HIGHER-ORDER MSD OSS RULETRUTHTABLEFOR SUBTRACTION No. 1

2

3

Minuend Pipi-,

1 1

1 0

1 1

T- i

0 1 1 0

o i T- i 1 1

T i 0- 0 10

o- i 10 -

I 1

5

Qi Qi- I

ii T- i 10

4

Subtrahend

-

1 0 0 0

o i o- i -1 1 1 1

1 0

pi-2 Qi-2

Don’t care All negative Otherwise Don’t care

Borrow Bi 1 -1 1 I

Difference Di Di- 1 1 0

-

I 1

o i 0 0

1 1

i i

I 1 0 0

All negative

-

1

0 1

Otherwise

0

i i

Don’t care

0

1 0

1 1

0 1 1 0

i i

1 0 0 0 1 0 0- 1 1 1

o i

1 i (continues)

66

M. S. ALAM and M. A . KARIM TABLE Ill-continued

Minuend

Subtrahend

PiP i - I

Qi Qi- I

o i 1 1

Borrow

Difference Di Di- I -

Pi-2 Qi-2

Bi

0 0

All negative

0

0 0 i i

Otherwise

0

0 0

o i

7

0 0

0 0

Don’t care

0

0 0

8

0 1

0 0

All negative

0

0 1

I T

0 0 1 1

Otherwise

0

1 1

1 0 0 0 i i

0 0 1 1 i i

0- 0 1 0

Don’t care

0

1 0

1 0 1 0 1 i

1 0 0 1 0 i

0 0

No. 6

0- 0

0 0 0 0 9

10

11

1 1 1 0 0 1 1 1

i i 12

1 1 1 0

13

1 1

o T

i i

1 1

o- i 1 1

o- i

1 1

All negative

1 1

-1 0 -1 1

Otherwise

o i

o- i

Don’t care

0 0

All negative Otherwise

0 1

Don’t care

1 0

Ti

o- i

1 0 1 0

T- i

1 1

i i -

1 0

T i T i

I T

D. Truth-Table Minimization

The first step toward the minimization of a truth-table is to obtain the reduced minterms (maxterms) in sum-of-product (product-of-sum) form for each output bit. This can be accomplished by using Karnaugh maps (K-maps) or Quine-McCluskey’s tabular reduction method (Karim and Awwal, 1992). Using K-maps and considering only the 1 and entries of the outputs Si, S i - , , and Ci in Table 11, we obtain the reduced minterms shown in Table IV, where X represents a don’t-care literal, meaning that the bit

OPTICAL SYMBOLIC SUBSTITUTION ARCHITECTURES

67

TABLE IV REDUCEDMINTERMS FOR HIOHER-ORDER MSD ADDITION

00 1 XOl XOl xo I OXOl I ox,~x,~ 1XOlooxo~x,~ loox,,xoix,i ix,iiix,lx,i I ~lxoixoixoi 0 1 OX,,r,ix,i ox, 0 1 x,iw,i Ix,, I Iw,,w,, I I Ix,,x,ix,i OXOl

Ir,ix,i

I ioxx,iw,i

oo ix, ox, -

ixo x,

o ixoixO

--

I X,il I X O ~ X 0 ~ _-I I Ixo~xo~xo~

o xOi T I xOxi oi

1 I Yo1 XOl x,ix,i 1 XOl1 ~xo,x,iw,i I 0 1x,ix,ix,i

'm

X0,XOI

IX,jlOr,ix,i

I I OXX" jXo1

1 Ix,,

ooTxOiw,iw, oxOiTo~ Ix,~oow,ix,i I oox,iw,ix,i I1I x , , i ~ ix,, i 1 ix

XI

IX,iX,i

I

IX,~X,~

l X O l Ix,,xx

I x,

Yo, 1 xx

X0il

I

1 Ixx

IX,~lXX

o_ _l o_ _in

OlOlXX

Illlxx 01 I Txx 1 i i TXX 1 Toixx 1 oooxx 00 I oxx

Illlxx oiTTxx Ti i i x x iioixx I oooxx ooioxx

could be any of 1 or 0 or 1, while Xoi (Xo,)represents a partial don't-care meaning that the bit could be either 0 or i ( 1 ) . Each entry in Table IV consists of six bits, where the least significant two bits correspond to the reference bits (Ai-zBi-z),the most significant two bits correspond to the addend ( A i A i - l ) ,and the remaining two bits correspond to the augend (Billi- respectively. The maximum logical minimization occurs for the 1 and 1entries of the Si-l output, and the corresponding K-maps for the first four entries of Si- in Table IV are shown in Fig. 6. The remaining entries of Table IV are derived following a similar procedure. In Table IV, the all~ , the otherwise group can negative group can be identified as X o ~ X owhile be identified as XoIXoi. The don't-care group appears as X X , representing XiO,X,Ol~ Considering Tables I1 and IV, we observe that the unminimized minterrns for the 1 and 1 entries of the output Si amount to 234 ( = 117 + 117) minterms, which can be minimized to 38 ( = 19 + 19) minterms. The and Ci corresponding number of minterms for the output bits of reduces from 216 (=96 + 120) to 16 ( = 8 + 8) and 198 (= 102 + 96) to 22 ( = 11 1l), respectively. Thus, a total of 72 minterms are required to yield a pair of output bits.

+

68

M. S. ALAM and M. A. KARIM

Xoi X o i = constant

Bi

\Ai

Ai-1

FIWRE 6. Karnaugh-map minimization for the S,-, outputs.

E. MSD OSS Rule Coding For spatial coding of the minterms (MSD digits), a dual-rail coding scheme has been proposed as shown in Fig. 7a. A bit value of 1(i) is coded by making the top pixel subcell opaque (transparent) and the bottom pixel subcell transparent (opaque). A 0 (don’t-care) literal is represented by making both the pixel subcells transparent (opaque). Assuming that the (i - 2)th digit pair is either T i or 11, the symbolic substitution rules using this coding scheme for the first two groups of Table 11, for example, are shown in Figs. 7b and 7c, respectively. In the substituted pattern (shown in front of the arrows in Figs. 7b and 7c), the upper-row pixels correspond to

69

OPTICAL SYMBOLIC SUBSTITUTION ARCHITECTURES

b

-1 -1 -1 (addition o f iiwith

C

-10 4-

Sum bits

-1

Carry

4-

iT 1

iiiH-P i i-1 i-2

-

1 1 4- Sum bits

-

1o

-1

i

(addition o f

4-

Carry

07

4-

Sum bits

-

+ Carry

with 10 )

ioiuJ-P i i-1 i-2

4 4 4

--

1

111

(addition o f i

o with ii1

FIGURE7. (a) Dual-rail coding scheme suitable for the MSD digits. (b) Coded symbolic substitution rule for group 1 of Table 11. (c) Coded symbolic substitution rule for group 2 of Table 11.

the sum bits, while the bottom-row pixels correspond to the carry bit, which is shifted to the left by two pixel positions. The shifted positions in the bottom row are padded with zeros. The coding rules for other group members of Table I1 can be derived in a similar fashion. Finally, a practical example for the addtion of two MSD numbers (0010 and 1011) using the coded symbolic substitution rules of Figs. 7b and 7c is shown in Fig. 8. Note

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M. S. ALAM and M. A . KARIM

0010 101 1

r o i i 0100

1 1 I T 0 0 0 0

FIGURE8. Addition of two MSD numbers using the higher-order MSD symbolic substitution rules of Table 11.

that the augend bit positions in the input pattern, which are responsible for the generation of carry, are substituted by zeros after the first symbolic substitution operation (first-step), thus generating the intermediate pairs. In the second step, the substitution rules are applied again to the intermediate pairs to yield the carry-free result. From, the rightmost pattern of Fig. 8, we observe that the sum (1 1 IT) appears in the upper-row pixels and the bottomrow pixels appear padded with zeros (since carry-free). F. Optical Implementation

The symbolic substitution processor for higher-order MSD arithmetic can be realized by spatially coding the input variables and then using a holographic content-addressable memory (CAM) for both recognition and substitution. Mirsalehi and Gaylord (1 986) implemented the MSD addition and subtraction by utilizing a direct truth-table-based CAM. This is a onestep process and requires 56 holograms to store the minterms for each output bit, thus requiring a huge amount of storage. Li and Eichmann (1987) decreased the hologram storage necessity for binary MSD addition from 56 to 20 for each output bit by adopting a two-step scheme. In a paper published more recently by Cherri and Karim (1988), it was observed that the hologram requirement can be further reduced to 13 by implementation of a three-step scheme. However, as the number of steps increases, the processing speed diminishes. To implement the aforementioned higher-order symbolic substitution rules, a CAM using a holographic recording technique, first proposed by Mirsalehi and Gaylord (1986) and later modified by Li and Eichmann (1987) and by Cherri and Karim (1988), can be used. An optical implementation for the holographic recording and reconstruction of the higher-order MSD symbolic substitution scheme is shown in Fig. 9, where the minterm recording operation involves a three-step process (Li and Eichmann, 1987; Mirsalehi and Gaylord, 1986) and makes use of an extra bit (R) as the reference in addition to the six input lines ( A i A i - ,B i B i - , A i - 2 B i - 2 )At . first,

OPTICAL SYMBOLIC SUBSTITUTION ARCHITECTURES

71

FIGURE9. Optical implementation of the higher-order MSD holographic recording and reconstruction scheme.

the complement of the input pattern (minterm) is recorded with the phase between the object beam and the reference beam set at 0". For simplicity, the reference beam is not shown in Fig. 9. Next, the input pattern (minterm) is recorded with 180" phase difference between the object beam and the reference beam. Finally, the reference bit R (which is kept off in the first two steps) is recorded with 0" phase difference between the two beams. The don't-care bits (X) are kept opaque during all three steps of recording. For partial don't-care bits (Xo, or Xoi),the pixel(s) corresponding to the forbidden bit (i.e., 1 or 1)for this bit position is (are) made transparent during first recording step, while the pixel@)corresponding to the allowed bits is (are) made opaque during all three recording steps. During logic operation (reconstruction), the reference beam (used during the recording operation) is turned off while the input signal and the reference bit are introduced to the system. When the input signal matches with a stored minterm, a dark spot appears at the corresponding location of the detector (output) plane, because the waves diffracted by the second- and third-step recorded patterns cancel each other (since both have the same magnitude but opposite phase). Depending on the intensity of this spot, an appropriate value can be assigned to it. In case of no-match, a bright spot (which is equivalent to zero) appears at the detector plane. V. OSS ARCHITECTURES A number of symbolic substitution architectures using CAM (Mirsalehi and Gaylord, 1986), location addressable memory (Drake et al., 1986), diffraction gratings (Thalmann et al., 1990), spatial filtering (Jeon et al., 1990; Brenner et al., 1989), phase-only holograms (Mait and Brenner, 1988), self-electro-optic effect device (Cloonan, 1988), multichannel

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M . S. ALAM and M. A. KARIM

correlation (Botha et al., 1987; Hwang and Louri, 1987; Casasent and Botha, 1989), shadow-casting and polarization (Cherri and Karim, 1989a; Louri, 1991), and optical phase conjugation (Eichmann et al., 1988) have been suggested. Although each of these implementations has its own advantages and disadvantages relative to the others, the CAM technique described in Section IV,F has been widely investigated and appears to be very promising. The aforementioned architectures are described briefly in the following sections. A . OSS Using Diffraction Gratings Both coherent and incoherent optical processors have been proposed for the implementation of symbolic substitution. Since incoherent systems offer several advantages over coherent systems (Huang, 1983; Brenner et al., 1986; Thalmann et al., 1990), incoherent processors for symbolic substitution are of special interest. Accordingly, a symbolic substitution system based on diffraction gratings and Fourier filtering (Thalmann et al., 1990) is discussed in this section. 1. Recognition Unit

The optical implementation of the symbol recognition unit is shown in Fig. 10 (Thalmann et al., 1990). This is essentially a 4f filtering system. The input data are encoded in intensity transmittance (darklbright) of the input spatial modulator. A two-dimensional diffraction grating, placed behind the input pattern, splits the input data into different diffraction orders. The distance d between the grating and the input pattern is chosen so that the patterns of two adjacent diffraction orders are shifted by one pixel in the image plane. The search symbol is selected by appropriate spatial filtering Input Pattern

output Pattern

I

Y

V

Spatial Filtering

Grating

f

d

-

f-f-fd

FIGURE10. Optical symbolic recognition system using diffraction gratings. Adapted from Thalmann el al. (1990).

73

OPTICAL SYMBOLIC SUBSTITUTION ARCHITECTURES

output Pattern

Spatial Filtering

FIGURE 1 1 . Multi-channel symbolic recognition system using diffraction gratings. Adapted from Thalmann et a/. (1990).

of the diffraction orders at the Fourier plane. The selected diffraction orders are then recombined in the image plane to yield recognition of the search symbol. For numerous applications, several different symbols need to be recognized at the same time. This can be achieved by introducing an additional grating to produce multiple spatially separated images in the image plane as shown in Fig. 11. The corresponding diffraction orders in the Fourier plane must be sufficiently separated to be able to choose for each channel another search symbol by appropriate filtering of the diffraction orders.

2. Substitution unit The optical implementation for substitution is identical to that for recognition. The complete system for symbolic substitution is thus composed of two 4f systems in series as shown in Fig. 12. A NOR gate array is inserted at the output plane of the recognition system to perform the thresholds and reestablish the binary values. The bright pixels at the output of the NOR gate array identify the location of the search pattern in the input pattern. The NOR gate array is split again by a two-dimensional diffraction grating. The scribe pattern is chosen by spatial filtering in the Fourier plane of the substitution unit. Depending on the spatial filter, both intensity- and polarization-coded output patterns may be obtained. Recognition Una Input Panern

Grating

Substitution Unit Spatial Filtering

output Pattern

NOR Gate Gratina

-f~f-f-f-I----t-f--fI--f-f-

FIGURE 12. Optical symbolic substitution system using diffraction gratings. Adapted from Thalmann et a/. (1990)

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M . S. ALAM and M. A. KARIM

B. OSS Using Matched Filtering In this technique, symbolic substitution is implemented by pattern recognition followed by pattern substitution, pattern combination, and feedback for a fixed number of iterations to yield the final output. The schematic diagram of the optical symbolic substitution processor is shown in Fig. 13c. The encoded binary input pattern formed by using the symbols shown in Fig. 13a, is fed into shutter S1 and split into four identical portions by a combination of beam splitters and mirrors. The coding scheme shown in Fig. 13a is specially designed to prevent crosstalk. Since there are four possible combinations of symbols for binary addition (0 + 0,O + 1, 1 + 0, and 1 + l), four different holographic filters are needed to recognize each of them. Each of these filters has a transfer function which is the complex conjugate of the Fourier transform of one of the four different symbols shown in Fig. 13b. Through these filters and Fourier transform (FT) lenses, autocorrelations are produced in the output planes of the matched filters. Using threshold elements in these output planes, the autocorrelation peaks are detected at all positions where the four different patterns are matched. The recognized patterns are used to generate new patterns based on the substitution rules shown in Fig. 13b. Since a hologram can be used as a beam steering element, any new pattern can be generated using computergenerated or optically recorded holograms placed between the Fourier transform lenses. The substituted patterns are combined through a number of beam splitters and mirrors, as shown on the right side of Fig. 13c. The resulting pattern is again split intatwo parts and stored in optical memory M1 where shutter S2 is opened and shutter S4 is closed. After storing the output, shutters S1 and S2 are closed and S3 is opened to produce the intermediate result of the first iteration. This intermediate result is fed back to the input through the beam splitters and mirrors for the second iteration. In the second iteration, S2 is still closed and S4 is opened t o store the result of the second iteration in the optical memory M2. After storing the result of the second itcation, S3 and S4 are closed, M1 is erased, and S5 is opened to feed the result back into the input. The final result for the binary addition of two n-bit numbers is thus obtained in n + 1 iterations. C . O S S Using Phase-Only Holograms 1. One-Channel System

In a single-channel optical symbolic recognition system, all operations such as replication, shift, and polarization rotation are performed sequentially. A recognition system using intensity-coded inputs is shown in Fig. 14a

A

o+o

0 0+1

a

c

FIGURE13. A symbolic substitution processor based on spatial filtering. (a) Coding scheme. (b) Substitution rules. (c) Schematic digram. Adapted from Jeon el 01. (1990).

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M. S. ALAM and M. A. KARIM

0

t 9

0 7 @ inout

splitter

replicated inputs

% prisms

/ overlapped inputs

mask

a

input

splitter

replicated input

polarization rotators and prisms

overlapped inputs

polarizing filters

outputs

b

FIGURE14. Single-channel optical symbolic recognition system using (a) dual-rail logic and (b) polarization-based logic. Adapted from Mait and Brenner (1988).

(Mait and Brenner, 1988). Assume that a logic having three rules is to be implemented. The input image is introduced in the input plane of the system. The holographic splitter produces three copies of the input image. Next, prisms are used to provide appropriate shifts and overlap of the duplicated images. Then, an output mask is used to select the recognized

OPTICAL SYMBOLIC SUBSTITUTION ARCHITECTURES

77

output from the superimposed image. Figure 14b is a similarly constructed polarization-based logic system. Replication of the input image is performed by the holographic splitter. Necessary changes in polarization are achieved through polarization rotators, while the prisms provide the necessary shifting and overlap of the images. The polarizing filters complete the recognition process by producing a logical zero if the search pattern is present in the input scene. In both cases, the recognition output is passed through a nonlinear device for appropriate optical logic and signal regeneration for the subsequent processing in the substitution stage. Substitution systems for intensity-coded and polarization logic are represented in Figs. 15a and 15b, respectively. In the substitution system, the recognized outputs of Fig. 14a or Fig. 14b are used as the input patterns depending on the type of coding used. The operations in this stage involve splitting, shifting, superimposing, and combining operations, which are realized using holographic splitters, prisms, and holographic combiners, respectively. Note that the substitution systems are constructed by reversing the order of operations in the recognition systems and interchanging the role of holographic combiners and splitters. The prisms, used as combiners in the recognition system, however, are replaced by holographic splitters in the substitution system. Finally, the holographic combiner combines the superimposed images to generate the final output. The intensity-coded technique was used by Cherri and Karim (1989b) to implement a multiplier and a histogram equalization processor, while the polarization-coded technique was used by Barua (1991a, b) to implement a high-speed multiplier and a binary median filter for image processing applications. 2 . Dual-Channel System A Michelson interferometer can be used to produce two shifted copies of an input pattern. However, using two phase-only holograms in conjunction with the interferometer it is possible to realize multiple shifted replicas as shown in Fig. 16 (Mait and Brenner, 1988). The inclusion of holograms alters the interferometric system from being a geometrical-optics-based system to a diffractive-optics-based system. Moreover, the two channels allow for direct realization of a complex transfer function, as opposed to a sequential implementation employing a single channel. The dual-channel system presented herein is suitable only for intensity-coded logic.

D. OSS Using Opto-electronic Devices A symmetric self-electro-optic effect device (S-SEED) based symbolic substitution processor is shown in Fig. 17 (Cloonan, 1988). This parallel

78

recognized outputs

M. S. ALAM and M. A. KARIM

splitters

replicated outputs

overlapped images

prisms

combiner

final output

a

recognized outputs

splitter

replicaled outputs

rotators

combiner

final output

b

F I ~ U R15. E Single-channel optical symbolic substitution system using (a) dual-rail logic and (b) polarization-based logic. Adapted from Mait and Brenner (1988).

architecture employs a multirule implementation consisting of an input, an output, and a processing loop. The processing loop contains multiple processing blocks and two S-SEED storage arrays (A and B). The outputs

OPTICAL SYMBOLIC SUBSTITUTION ARCHITECTURES

Mirror

79

\9 Beam Splitter

5z

Polari

Image Plane

Object Plane

FIGURE16. Dual-channel optical symbolic substitution processor using a Michelson interferometer. Adapted from Mait and Brenner (1988). Feedback loop

k

S

= Beam splitter

/=

Split-shift-mask-combination

0,

= NOR gate array = Shutter

FIGURE 17. A symbolic substitution processor using SEED arrays. Adapted from Cloonan (1988).

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M . S. A L A M and M . A. KARlM

of the S-SEED storage arrays are combined into one image and looped back to the system input, where the image is split and directed to each of the processing blocks. In a processing block, the image is split and shifted into multiple copies to recognize a particular pattern. The multiple copies are then overlapped and directed to an array of SEED NOR gates. The NOR gates produce a logical 1 output only in the spatial regions where the search pattern is detected. The outputs from the SEED NOR gates can be shifted and overlapped to produce a scribing image. This image is combined with the outputs of the other processing blocks and is directed back to the S-SEED arrays. The scribing image writes the substitution pattern into the receiving S-SEED array whenever the NOR gates detect the search pattern. In the symbolic substitution architecture of Fig. 17, multiple rules can be implemented at a given instant of time, because a copy of the initial image can be routed to each processing block. The external control unit can select substitution rules which will be implemented at any instant of time. Since Fig. 17 shows six processing blocks, the system can implement six processing rules. Four of these six processing blocks provide the rules required for binary addition. The fifth and sixth blocks provide rules for crossed (univerted) data transfers and uncrossed (inverted) data transfers. In a typical application, an input data pattern would be routed through the crossed processing block to S-SEED array A. The output from the S-SEED array A could then be looped back through the four addition processing blocks, and the output images from these blocks would be recombined and used to simultaneously scribe the four substitution patterns into S-SEED array B. The resulting image could then be looped back through the uncrossed processing block to invert the bits and store them in array A. The image in array A, representing the inverted sum of bits, could then be routed to the system output. For an n-bit addition, a processing cycle is defined to be a single step in which the four substitution rules for binary addition are implemented in parallel during a single pass around the processing loop of Fig. 17. Thus, n + 1 processing cycles must be implemented around the processing loop to yield the final result.

E. OSS Using Acousto-optic Cells Botha et al. (1987) introduced an architecture for symbolic substitution using presently available devices such as light-emitting diodes (LEDs), multichannel correlators, and detectors. The method was intended for the implementation of the ripple carry addition rules. Hwang and Louri (24) modified this architecture to implement the modified signed-digit addition

OPTICAL SYMBOLIC SUBSTITUTION ARCHITECTURES

81

and subtraction, as shown in Fig. 18a. The search patterns are introduced through the LEDs in the input plane of the recognition phase. Each column of LEDs corresponds to four pixels required to encode the operand digits. During the recognition, the input operands are fed to the multichannel acousto-optic cells, and the reference patterns are input through the LEDs. A multiplication of the reference patterns and the input operands takes place in the acousto-optic cells; the result is integrated onto the detectors by a lens. The number of detectors is equal t o the number of search patterns. A peak signal on the output detectors indicates the presence in time of the Multichannel acousto-optic cells

Search Patterns

LEDs

Integrating optics

Imaging OPtlCS Input electrical signals a Substitution Patterns

' acousto-optic cells

LEDs

b

FIGUREIS. A symbolic substitution processor using multichannel acousto-optic cells. (a) Recognition phase and (b) substitution phase. Adapted from Hwang and Louri (1987).

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M. S. ALAM and M. A . KARIM

search pattern. The substitution phase is implemented by the optical setup shown in Fig. 18b. The detector outputs of the recognition phase are used to scribe the desired substitution symbol on the LEDs situated in the input plane of the substitution phase. The LED light is imaged by a lens to an array of shift detectors. The size of the detector array is n x 4, where n is the operand length and the factor 4 corresponds to the encoding scheme (two pixels per digit). The right end of the detector array is fed back to the acousto-optic cells for the next iteration. F. OSS Using Multiplexed Correlator A correlator realization of symbolic substitution was developed by Botha et a/. (1987) and Casasent and Botha (1989) for implementing logic and numeric operations. Figure 19 shows this architecture, which consists of a standard matched spatial filter correlator with multiple laser diode sources at Po, and multiple spatially multiplexed filters at P, with frequency multiplexed filters at each spatially multiplexed filter position. The output P, contains four correlation planes. The laser diodes at Po select the set of four frequency-multiplexed filters at P, . The recognition phase is achieved with one set of four frequency-multiplexed filters at one location in P, . The four-output correlation plane in P, contain peaks at each location corresponding to the 00,01, 10, and 11 patterns in the input plane. Figure 20 lists the substitution rules for the four possible input patterns to realize all 16 binary logic functions. In the substitution phase, one or all four correlation output planes are placed at P, , and a different set of four filters are placed PO

laser diodes

P1

input data

P2

filter bank 8 HOES

P3

output correlation plane

FIGURE19. Optical symbolic substitution multiplexed correlator. Adapted from Casasent and Botha (1989).

83

OPTICAL SYMBOLIC SUBSTITUTION ARCHITECTURES

Output Symbols

F

0

A B A B

0

0

A

A B

B

0

0

0

MfB A + B m AOB

0

0

1

1

A+B

1

1

A

1

T

A+B -A

1

1

1

FIGURE 20. Symbolic substitution rules for 16 logic functions. Adapted from Casasent and Botha (1989).

at P, , corresponding to each substitution rule. For each correlation peak, a given pattern replaces it, and the AND of all four substitution planes is formed. An example of the steps and intermediate results involved in the logic AND operation is shown in Fig. 21, where two four-digit spatially encoded binary numbers are used as the input operands (shown above PI). The four frequency multiplexed filters at P2 are shown in the space domain. The output correlation plane data are shown above P3. The correlation plane data is thresholded by using a bistable optical device at P3. The four regions of P3 are Fourier transformed by a holographic optical element and illuminate four spatially multiplexed filters at P, . The four convolution outputs are superimposed at P, and yield the pattern shown, which is the AND of the two input operands in the same symbolic representation. G . OSS Using Shadow-Casting and Polarization

Figure 22 illustrates the parallel implementation of the recognition phase of two symbolic substitution logic (Louri, 1991). The source plane consists of 2 x 2 orthogonally polarized LED arrays. Each element of the 2 x 2 array is a pair of orthogonally polarized LEDs that are located almost at the

84

M. S. ALAM and M. A. KARIM

0

01 I 0

101011

+

10

0

+

1

P3

1

+

0

1 1

I

B~~~~~~~ Holographic Spatially Device

1

Optical Element

MUXed "AND" Filters

p4

I

Lens

output

m 0100

FIGURE21. The steps and intermediate results involved in a symbolic substitution operation. Adapted from Casasent and Botha (1989).

same point in the source plane. These LEDs can radiate both horizontally and vertically polarized light, which simultaneously passes through the input plane. The vertically polarized LEDs implement the substitution rule 1, while substitution rule 2 is implemented by the horizontally polarized LEDs. The horizontal and vertical states of polarization are represented by a horizontal and a vertical bar, respectively. The reference pixel for indicating the location of the search pattern is chosen to be the lower right corner of the search pattern. Each LED array provides multiple shadowgrams of the input plane such that all the pixels of its associated search pattern overlap in the reference pixel. The configuration of the LED arrays produces distinct, shifted copies of the input plane onto the screen. The superimposed image consists of pixels containing two horizontal polarizations, two vertical polarizations, one horizontal polarization, one vertical polarization, or both polarizations. Pixels containing two

Substitution rule 1

Substitution rule 2

fl .--b

Orthogonally Polarized LEDs

Input image

Superimposed image

Wollaston prism

Copies with distinct polarization

AND-gate arrays

Masks

Recognition planes for each substilution rule

FIGURE22. Parallel implementation of the recognition phase of two symbolic substitution rules. Adapted from Louri (1991).

86

M . S. ALAM and M. A. KARIM

horizontal (vertical) polarizations indicate the presence and location of the search pattern for the substitution rule (substitution rule 1). This image is then passed through a Wollaston prism, which deflects the two states of polarization in opposite directions, thus producing two physically separate recognition planes. Note that the Wollaston prism splits the image according to polarization states. Consequently, there is no power loss in generating these two images. Next, a thresholding operation through an optical AND gate array is applied to these images. The thresholding operation makes all the pixels with two identical polarizations bright; all other pixels become opaque. The thresholded patterns are passed through an optical mask, whose transparent pixels coincide with the location of the reference pixel in the thresholded image, to filter out the erroneous pixels. Thus, the recognition phase output contains bright pixels only in those locations of the input plane where the search patterns are present. Figure 23 shows the implementation of the substitution phase for a single substitution rule. The unpolarized LED array provides a superimposed image of shifted replicas of the recognition plane. The on-off state of the LED is dictated by the placement of the bright pixels in the substitution pattern. Thus, for a parallel implementation, two distinct LED arrays are required. The replicas are shifted and superimposed, thereby scribing the substitution pattern in all occurrences of the search pattern in the input image. The source plane configuration and reference pixel arrangement for the parallel implementation of four substitution rules are shown in Fig. 24.

Unoolarized

Recopnitinn nlane for

BU

FIGURE 23. Parallel implementation of the substitution phase using shadow-casting. Adapted from Louri (1991).

OPTICAL SYMBOLIC SUBSTITUTION ARCHITECTURES

87

LEDs for rule 2

Rj: Reference pixel for rule j LEDs for rule 4 b

a

FIGURE24. (a) Source plane configuration and (b) reference pixel arrangement for the parallel implementation of four symbolic substitution rules. Adapted from Louri (1991).

H . OSS-Based Image Processing Symbolic substitution has also been found to be attractive for image-processing applications such as morphological processing, feature suppression, histogram equalization, and image enhancement (Casasent and Botha, 1989; Cherri and Karim, 1989b; Goodman and Rhodes, 1988; Cherri and Karim, 1991; Eichmann et al., 1988). In this section, image enhancement using various image-sharpening operators is discussed. 1. Roberts and Difference Operators

The Roberts gradient is a simple nonlinear edge detector. It is employed by convolving an image with two 2 x 2 kernels which approximate the horizontal and vertical strength of the edge at each pixel location, given by

Thus, the Roberts operator is especially useful for detecting edges of an image along the diagonal. Each pixel in the input is replaced with the larger of the absolute value of these to operators, given by fedge(X,Y)=

maxllR+I, lR-11.

(V.1)

The Roberts edge kernels are convolved with the input image to create the edge-enhanced or sharpened image. It is obvious that the Roberts operator suffers from directional dependency. For illustration, R+ detects only 45" edges and R - detects only 135" edges (Cherri and Karim, 1991). To avoid the directional dependency of the Roberts operator, a modified Roberts

88

M. S. ALAM and M. A . KARlM

operator may be used. Table Va lists the 16 symbolic substitution rules corresponding to the 16 input combinations of the 2 x 2 window of the Roberts mask. The input variables A , B , C , and D represent the binary image values at ( i , j ) ,(i + l , j ) , ( i , j + l), and (i + 1 , j + 1) pixel locations, respectively. Notice that these input combinations include all possible edge orientations: vertical, horizontal, diagonal, no edge, and corners. The absolute values of the responses R , and R-,as well as their maxima, are listed as shown in columns six through eight of Table Va, where

IR+J= A

-

(R-( =B

-

D

W.2)

and

C.

W.3) From Table Va, it is evident that the edge detector can be implemented by using the input combinations that yield either the 1 outputs or the 0 outputs. Since the 0 output involves only four input conditions (1, 7, 10, and 16) it is preferable to design the symbolic substitution-based edge detector using the minterms corresponding t o the 0 outputs. A CAM-based symbolic substitution system, such as the one proposed by Mirsalehi and Gaylord (1986), may be used to implement the symbolic substitution-based edge detector. Since CAMS use reduced logical expressions, many recognition-substitution rules can be combined to generate an output pattern, thus reducing the overall number of recognitionsubstitution patterns required to perform a specific task. The reduced minterms are used as references and stored in Fourier holograms. In this case, four holograms will be necessary for each output bit in the image, whether one elects to use only output 0’s or only output 1’s. A second pattern check may now be considered for edge detection. In binary images, an edge is detected whenever a 0 1 or a 1 0 transition is encountered. For detecting a horizontal/vertical edge, one can make use of a vertical/horizontal difference operator, given by +

D+ = 1-1

+

and

Again, to avoid directional dependency of these operators, they are combined to form a modified digital gradient almost in the same manner as for the Roberts operators. Since the first pixel of both D+ and D- is at the same position, a three-pixel mask will be sufficient to extract edges. Table Vb lists the eight input combinations for the three-pixel windows, with I, J, and K representing binary image values at ( i , j ) , ( i , j + l), and (i + 1 , j ) pixel positions, respectively, of the input image. The corresponding absolute different responses and modified digital gradients are also listed in the table.

89

OPTICAL SYMBOLIC SUBSTITUTION ARCHITECTURES

TABLE V SYMBOLIC SUBSTITUTION RULES FOR EDGEDETECTION USING(A) ROBERTS OPERATORS, AND (B) DIFFERENCE OPERATORS

X

C

B D

IR1'

IR2'

DX 8 DY OPERATORS

ROBERTS MASKS

ROBERTS MASKSENTRY A

MAX (IR11 IR211

ENTRY A

C

E

D

f

MAX lR'l

IR2' (IR11 IR21)

ENTRY #

K

I J

IDXI ID''

MAX (IDXI IDYI)

n

n

m

a

2. Simulation Results A 64 x 64 pixel binary image having edges along multiple orientations is subjected to a digital edge detection experimentation. The input image is

90

M . S. ALAM and M. A. KARIM

EO FIGIJRE 25. A 64 x 64 pixel input image.

intensity encoded as shown in Fig. 25. For a CAM-based symbolic substitution detector, reduced minterms are used for recognition. Figure 26a shows the edge-detected output obtained using Roberts operators, while Fig. 26b shows the outputs obtained using difference operators. Notice that because of the symmetric nature of Roberts mask, all edges have equal strength, which is obvious from Fig. 26a. If a difference operator is used instead of the Roberts operator, then from Fig. 26b, it is evident that a difference operator can't detect the edges with equal edge strength. Notice the weak response at both upper left corners and at 135" edges. Roberts operator require either four symbolic substitution rules or four reduced minterms, while two symbolic substitution rules or two reduced minterms are needed for the difference operators. Comparing Fig. 26a with Fig. 26b, we observe that the Roberts operator-based symbolic edge detector yields better image quality. VI. LIMITATIONS AND CHALLENGES

Symbolic substitution is a very powerful technique for optical parallel digital computing. However, in addition to encoding of data, symbolic substitution requires a coherent source for recognition and substitution. The primary limitation of symbolic substitution logic is that it can only be used in a space-invariant interconnected architecture (Alam et al., 1992a;

FIGURE26. Edge detected image using (a) Roberts operator and (b) different operator.

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Barua, 1991b). That is, there has to be the same number of inputs to each gate or module, the same number of outputs, and all of the connections have to be exactly the same between the modules in a stage. Other drawbacks include a requirement for higher space-bandwidth product. REFERENCES Alam, M. S., Awwal, A. A. S., and Karim, M. A. (1992a). Digital optical processing based on higher-order modified signed-digit symbolic substitution. Appl. Opt. 31, 2419. Alam, M. S., Karim, M. A., Awwal, A. A. S., and Westerkamp, J . J. (1992b). Optical processing based on conditional higher-order trinary modified signed-digit symbolic substitution. Appl. Opt. 31, 5614. Avizienis, A. (1961). Signed-digit number representation for fast parallel arithmetic. IRE Trans. Electron. Comput. EC-10,389. Awwal, A. A. S., Islam, M. N., and Karim, M. A. (1992). Modified signed-digit trinary arithmetic by using optic9 symbolic substitution. Appl. Opt. 31. 1687. Barua, S. (1991a). Finite impulse response-Median hybrid filtering techniques for image smoothing. Opt. Eng. 30, 271. Barua S. (1991b). High-speed multiplier for digital signal processing. Opt. Eng. 30, 1997. Bocker, R. P., Drake, B. L., Lasher, M. E., and Henderson,. T. B. (1986). Modified signeddigit addition and substraction using optical symbolic substitution. Appl. Opt. 25, 456. Botha, E., Casasent, D., and Barnhard, E. (1987). Optical symbolic substitution using multichannel correlators. Appl. Opt. 27, 817. Brenner, K. H., Huang, A., Streibl, N. (1986). Digital optical computing with symbolic substitution. Appl. Opt. 25, 3054. Brenner, K. H., Lohmann, A. W., and Merklein, T. K. (1989). Symbolic substitution implemented by spatial filtering logic. Opt. Eng. 28, 390. Casasent, D., and Botha, E. (1989). Multifunctional optical processor based on symbolic substitution. Opt. Eng. 28, 425. Cherri, A. K., and Karim, M. A. (1988). Modified signed-digit arithmetic using an efficient symbolic substitution. Appl. Op. 27, 384. Cherri, A. K., and Karim, M. A. (1989a). Symbolic substitution based flagged arithmetic using polarization encoded optical shadow-casting. Opt. Commun. 70, 455. Cherri, A. K., and Karim, M. A. (1989b). Symbolic substitution based operations using holograms: Multiplication and histogram equaiization. Opt. Eng. 28, 638. Cherri, A. K., and Karim, M. A. (1991). Image enhancement using optical symbolic substitution, Opt. Eng. 30, 259. Cloonan, T. J . (1988). Performance analysis of optical symbolic substitution. Appl.. Opt. 27, 1701. Drake, 9 . L., Bocker, R. P., Lasher, M. E., and Henderson, T. B. (1986). Photonic computing using modified signed-digit number representation. Opt. Eng. 25, 38. Eichmann, G., Zhu, J . , and Li, Y. (1988). Optical parallel image skeletonization using content-addressable memory based symbolic recognition. Appl. Opt. 28, 2905. Eichmann, G., Kostrzewski, A., Kim, D. H., and Li, Y. (1990). Optical higher order symbolic recognition. Appl. Opt. 29, 135. Goodman, S . D., and Rhodes, W. T. (1988). Symbolic substitution applications to image processing. Appl. Opt. 27, 1708.

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Huang, A. (1983). Parallel algorithms for optical digital computers. Tech. Dig., Int. Opt. Comput. Cony., loth, IEEE Computer Society, Los Angeles, 1983, 13. Huang, A., Tsunida, Y., Goodman, J . W., and Ishihara, S. (1979). Optical computation using residue arithmetic. Appl. Opt. 18, 149. Hwang, K., and Louri, A. (1987). Optical multiplication and division using modified signeddigit symbolic substitution. Appl. Opt. 27, 817. Jeon, H., Abushagur, M. A. G , , Sawchuk, A. A., and Jenkins, B. K. (1990). Digital optical processor based on symbolic substitution using holographic matched filtering. Appl. Opt. 29, 2113. Karim, M. A., and Awwal, A. A. S. (1992). Optical Computing: An Introduction. Wiley, New York. Kozaitis, S. P . (1988). Higher-ordered rules for symbolic substitution. Opt. Commun. 65, 339. Li, Y ., and Eichmann, G . (1987). Conditional symbolic modified signed-digit arithmetic using optical content-addressable memory logic elements. Appl. Opt. 26, 2328. Dorisinville, R., and Alfano, R. K. (1988). Parallel digital and symbolic Li, Y., Eichmann, 0.. optical computation via optical phase conjugation. Appl. Opt. 27, 2025. Li, Y., Kim, D. H., Kostrzewski, A. and Eichmann, G . (1989). Content-addressable-memorybased single-stage optical modified signed-digit arithmetic. Opt. Lett. 14, 1254. Louri, A. (1991). Parallel implementation of optical symbolic substitution logic using shadowcasting and polarization. Appl. Opt. 30, 540. Mait, J . N., and Brenner, K. H. (1988). Optical symbolic substitution: System design using phase-only holograms. Appl. Opt. 27, 169. Mirsalehi, M. M., and Gaylord, T. K. (1986). Truth table look-up parallel data processing using an optical content-addressable memory. Appl. Opt. 25, 77. Thalmann, R., Pedrini, G . , and Weible, K. J . (1990). Optical symbolic substitution using diffraction gratings. Appl. Opt. Commun. 29, 2126, Yu, F. T. S., and Jutamulia, S. (1987). Implementation of symbolic substitution logic using optical associative memories. Appl. O p f . 26, 2293.