Optoelectronic symbolic substitution based canonical modified signed-digit arithmetic

Optics & Luser Technology,

Vol. 29, No. 3, pp. 1.5’

I(“ 1997 Elsevier

Printed

in Great

OO30~~3992!97 PII:

‘51.

1997

Science Ltd. All rights reserved Britain

RI 7.00 + 0.00

SOO30-3992(96)00062-X

ELSEVIER

Optoelectronic symbolic substitution based canonical modified signed-digit arithmetic A. K. CHERRI, M. S. ALAM,

A. A. S. AWWAL

A single-step optoelectronics symbolic substitution scheme to handle parallel modified signed-digit (MSD) arithmetic operations is proposed. Conversion algorithms from MSD numbers into a canonical MSD representation are provided. The canonical MSD numbers have the property that no two consecutive digits are non-zero. The addition operation of two CMSD numbers is performed in one step. It will be shown that through the use of CMSD representation, the number of symbolic substitution rules in an optical content-addressable memory (CAM) based system is significantly reduced. The number of symbolic substitution rules can be further reduced to an optimum value through a proposed shared content-addressable memory optical set-up. Further, the proposed optical scheme doubles the storage efficiency of the shared content-addressable memory. @ 1997 Elsevier Science Ltd. KEYWORDS: optical symbolic substitution, memory

computing, canonical binary representation, signed-digit numbers, truth tables, spatial light modulators, shared content-addressable

Introduction

Through the use of residue number representation, one may perform carry-free addition, borrow-free subtraction, and multiplication. However, a residue number-based system is more difficult to implement due to the fact that the system computation elements require a different set of prime-moduli-based logic elements for each arithmetic operation2-5.

In digital computations, many useful digital operations are implemented by converting them into a series of simpler operations and then mapping them into hardware. For example, arithmetic operations such as subtraction, multiplication, and division can all be realized through the most fundamental operation, addition, together with other logic operations. The binary addition of two n-bit numbers can be implemented by one half-adder and n - 1 full-adder circuits’. In this implementation, as the number of bits increases, the computation speed becomes less desirable because the binary carries have to ripple through all the cascaded stages. To increase the speed of computations, non-binary number representations and their corresponding addition, multiplication, and division algorithms have been investigated2-lo. Multiple-valued radix number, residue arithmetic, and redundant signeddigit number representations are seriously considered. Carry-free or limited-carry propagation is possible a non-binary number representation is employed.

The redundant signed-digit number system is another alternative number representation which generates limited-carry propagation arithmetic”. In this number system, parallel arithmetic operations are possible in a constant operation time and with few carry propagation steps. For example, the carries generated during the addition of two modified signed-digit (MSD) numbers are absorbed within three process steps. Also, a comparison of the MSD and the residue number representations in terms of their similarity to the binary representation shows that the binary number renresentation (a subset of the MSD renresentation) is closer to MSD’than the residue representation. This makes it easier for a binary number to be processed in a MSD processor.

when

Optical modified signed-digit (MSD) carry-free arithmetic using three-step’2P’4, two-step’4m “, and one-step ‘5,‘6,18-20 based symbolic substitution (SS)2’ schemes have already been proposed. In this paper, we report a much simpler MSD adder based on canonical conversion of the MSD representation using a shared content-addressable memory (SCAM)‘X,22. Its optical

AKC is at Kuwait University, Department of Electrical and Computer Engineering, P.O. Box 5969, Safat 13060, Kuwait. E-mail: [email protected]. MSA is at Purdue University, Department of Engineering, Fort Wayne, IN 46805-1499, USA. E-mail: [email protected]. AASA is at Wright State University, Department of Computer Sciences and Engineering, Dayton, Ohio 45435, USA. Received 10 September 1996. Revised 5 November 1996. Accepted 5 November 1996.

151

Optoelectronic

152

implementation adders.

The MSD systems

shows superiority

and the recoded

symbolic

substitution:

condition U; x repre_sentations

to all other MSD

MSD

number

The redundant signed-digit number representation allows parallel arithmetic operations with a reduced number of carry propagation steps. In particular. the modified signed-digit number, which is a redundant signed-digit with radix = 2, limits the carry propagation to two positions to the left. A given decimal number D can be represented by an n-digit MSD number as il- I D = c.u,2’

(1)

I=(l where-the MSD digit s; is a member of the set (1.0, i}. Here 1 denotes - 1. An MSD negative number is the MSD complement of the MSD positive number. For example, using primes to denote complementation, we have I’ = 1, !‘= 7. 0’ = 0, and therefore. ( - 7),,, = [ 111 ilMsp or. equivalently, (-7),,, = [Oil I],sp. The addition (subtraction) of two MSD numbers involves three (four) steps: the first two (three) steps generate transfer and weight digits which are then summed (differenced), which is the third (fourth) step, to give the final result. The three-step addition and the four-step subtraction rules can be found in Refs 1I and 13. The redundant property of MSD number representation can be used to simplify the MSD addition rules. For instance, a simple two-step addition process (instead of three-step) can be obtained by eliminating consecutive 1s and 1s from the addend and the augend’“,‘3. Parhami” has shown that the elimination process is achieved by employing a special recoding algorithm on the MSD numbers. Awwal” proposed an opto-electronic implementation of the recoded MSD using a content-addressable memory (CAM) scheme. His implementation requires 16 holograms for storing the reference patterns in the CAM. Recently. we have reduced the required number of holograms to 12 by introducing new symmetrical recoding algorithms for the MSD numbers’“.

Canonical

MSD

A. K. Cherri

number

Let .Y = .Y,,_,_Y,,-? _YObe an n-digit MSD number. Then, when s is recoded according to the algorithms in Refs 16 and 23, it produces an (n + I)-digit MSD number II = u,,u,,_ ,u,~_z 240. Note that the recoding algorithms are remapping procedures from MSD domain to MSD domain such that the original MSD number (.Y) and the recoded one (u) are numerically equal. Further, the MSD digits of the recoded number (u) satisfy the product II, x u,-, # 1. The recoding is essential to generate a simplified MSD addition truth-table where the ith digit S, of the sum of the two recoded MSD numbers (A and B) depends only on N,, h;. (I,_ ,, and h,_ 1 such that the combinations for CI,N,_ I and h;h;- I = ii or I I never occur. For instance, when the recoding algorithms are applied to the fivedigit MSD repre_sentation of (:5),, = [OOIO1],s,,, one obtains either [O1lO1],s, or [Ol11 l],,, (see Ref. 16). Both of these representations satisfy the product

et al.

I. However,_if all the MSD of (-5),,, = [OOlOl],sp = [Ol lOi],,, = P1l111,sn are _ forced to be converted to only (-5),,, = [OOlOl],,,, representation, then one has to satisfy the harder product condition 14, x [4i_ 1 = 0, i.e. no two consecutive digits are non-zero. The MSD number representation which satisfies U; x Ui-, = 0 is called the canonical modified signed-digit (CMSD) representation. It will be shown that the addition operation of two CMSD numbers will be much simpler than the addition using any other MSD recoding algorithms. 14;_ 1 #

The canonical coding conversion for 2’s complement binary numbers was used extensively in the early days of digital computers to achieve fast muhiphcation”4. It minimizes the number of add/subtract operations required in the multiplication process. The algorithm for conversion from 2’s complement binary numbers to canonical signed-digit is shown in Table lZ4. The advantage of the canonical signed-digit is that no two consecutive binary bits are non-zero. Starting from the least significant bit and progressing towards the most significant bit, let x~+,.Y; be two consecutive bits in the binary representation of X, and c, the carry generated by the conversion in the ith step (c,, = 0). Then s, is replaced by ,,‘, according to the rules given in Table I. For instance, using Table 1, 15,~~= 011112 is converted to IOOOlcsb. This conversion can also be done in parallel. Note that the canonical signed-digit conversion algorithm may increase the number of MSD digits by one. Notice that from Table 1, the carry digit (‘,+ 1 is set to binary 1 if s;+,s, = 1 I. Once the carry is set to I, it remains 1 until s;+,.Y; = 00 where it is absorbed (reset to binary 0). Thereafter, the carry digit cc 1 remains 0 until it reaches .Y;+,.Y, = 1 1 sequence again. The binary number representation is a subset of the MSD number system. The MSD number representations can be decomposed into three sets of numbers: numbers where the MSD digits E G, = (0. I], E G, = (0, 1) or E G,, = (0, 1, 1). If the MSD digits belong to set G,, then the rules of Table 1 are applied for CMSD canonical conversion, while if they belong to set Gi. then complementary conversion rules can be derived and applied to the MSD digits, as shown in Table 2. However, an MSD number with digits from set G,i requires special rules derivation, which will be shown next. Note that in Table 2, the carry c,+, is set to i if .Y,+ 1.Y, = I I and it will propagate to the left until it reaches a sequence of .Yi+,si = 00 where it is absorbed Table 1. Conversion numbers to canonical c/ 0 0 0 0 1 1 1 1

rules from binary signed-digit

xi+1

X/

Cit1

Y,

0 0 1 1 0 0 1 1

0 1 0 1 0 1 0 1

0 0 0 1 0 1 1 1

0 1 0 i 1 0 i 0

Optoelectronic

Table Table

2. Complementary conversion 1 to canonical signed-digit

ci 0 0 0 0 i i i i

symbolic

rules of

xi+1

xi

ci+1

Yi

0 0 i i 0 0 i i

0 i 0 i 0 i

0 0 0 i 0 i i i

0 i 0 1 i 0

0 i

1 0

(reset to 0). The reset carry will propagate until it encounters the sequence .~;+i.\-; = 1 I again. Now, let us consider MSD numbers belonging to the set G,i. First let c,~;+ i.~;_= 011. From Table 2, we see that rai_i.Y;.xi_r must be 010 and the digits c;+iyi must be set to 11 to obtain a valid CMSD representation. The canonical complement_ary rule for this case is c;.~~+i.~~~‘i+i~~~= Oil 11. Next - _) consider the digit combinations c;s;+i.~; = 111. To obtain c; = l2 the__ sequence of digits c;- I.Y;s,~ I must be either 011 or 110 (see Table 2) where ,v_, = 1, and consequently, 4’; has to be set to-O. Similarly, for the digit- combination cixi+ Is, = 1 10, c- Isi.~,_ I must be 101 and y;_ , = 0, and consequently, ~9; has to be set to 1. Applying a digit-by-digit MSD complementation to the results of the two cases derived above, yields the CMSD rules for (‘;.Y,+ , sjc, + 1_l’, = 11110 and 11011. Finally, consider the case c;.x;+ 1.~; = 701, I1 1 and 111. In order to obtain these digit combinations, and based_ on the previously derived cases, c;_ 1xix, _ 1 has to be 11 and J;_, = 0. Therefore, the above digit combinations for cis,+i_~; must produce c,+i~‘; = 00 to obtain a valid canonical MSD representation. A similar discussion leads to the fact that for the digit combinations ~;s;+~.Y, = 101, I1 1 and 111, the sequence c,+iy; has to be equal to 00. The above derived rules and the ones of Tables 1 and 2 can all be combined to generate the complete conversion rules for the CMSD number as shown in Table 3. Studying Table 3, one may recognize general rules for the carry.

the following

(a) The carry c,+ l is set to (i) 1 if.u;+is, f (11, 11) zr) i if s,+isI E {IT, ii] the carry c’;+i is set to 1 then, (i) it is absorbed if .y;+is; E (00.01, 11, 11) or (ii) it propagates if _Y~+~_v~ E (01, 10, ll,io, ii} Similarly, once the carry c;+i is set to 1 then, (i) it is absorbed if .y,+i_y, E (00,01, 11. 11) or (ii) it propagates if s,+~.Y~ E (01, 10. 11, 10, Ii)

(b) Once

(c)

Also, a simple sequential algorithm to convert an n-digit MSD number to its (n + 1)-digit CMSD representation is given as follows.

substitution:

A. K. Cherri et al.

153

Let .Y = .x,~- 1x,-2.. .x0 be an n-digit modified signed-digit number. Set x,, = 0 Fori=Oto(nl)Step 1 If xi # 0 then If (x; > 0 and .~;+i 3 0) then If (_Y,+ _yi+l 3 2) then s; = x; -2 .Yj+i = s;+i + 1 endif Elseif (.Y; < 0 and _~,+i < 0) then If (.Y, + .Y,+I < - 2) then .Y, = 9; + 2 s,+, = x;+, - 1 endif Elseif (_u; > 0 and .Yi+i < 0) then If (.u, 3 - x,+1) then s, = 9; - 2 X,+1 = X,+ 1 + 1 endif Else (s, < 0 and .~;+i > 0) then If ( -_Y, 3 xi+,) then _Y,= s; + 2 s,+, = .x;+, - 1 endif endif endif Next i Table 4 is an exhaustive enumeration for 4-digit MSD numbers shown with their corresponding CMSD representations when the conversion rules of Table 3 are Table 3. canonical Ci 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 i i i i i i i i i

Conversion MSD

algorithm

from

xi+1

Xi

c/+1

0 0 0 1 1 1 i i i 0 0 0 1 1 1 i i i 0 0 0 1 1 1 i i i

0 1 i 0 1 i 0 1 i 0 1 i 0 1 i 0 1 i 0 1 i 0 1 i 0 1 i

0 0 0 0 1 i 0 1 i 0 1 0 1 1 0 1 1 0 0 0 i i 0 i i 0 i

MSD

to

Yi 0 1 i 0 i 1 0 i 1 1 0 0 i 0 0 i 0 0 i 0 0 1 0 0 1 0 0

Optoelectronic

154

Table

4.

Exhaustive

conversion

symbolic

of 4-digit

substitution:

MSD

A. K. Cherri

numbers

to their

et al.

CMSD

representations

MSD

CMSD

MSD

CMSD

MSD

CMSD

0000 0010 ooio

00000 00010 oooio

0001 0011 000

00001 OOlOi ooooi

oooi OOli

ooooi 00001

0100

00100

0101

00101

ooii oioi

ooioi OOlOi

0110

oioio

0111

00101

00010

oiii

oiooi ooioi

011i

oil0 oioo oil0 oil0

ooioo oooio oioio

oioi oiii oiii

00001 ooioi

ooooi ooioi

oiii oioi oiii 0111

oiooi

ooioi

ooioi

1000

01000

1001

01001

1001

oiooi

1010 Ioio

01010 oioio

1011 1011

1100 1110

1011 1011 ii01

01001 00101 ioioi

iii0 ii00

I oioo 10010 01010 00100

10101 oiooi I oiol

1111 iii1 I ioi

10001 Ioioi

10101 01001

00101

iii1 iii1 I ioi

Iii0 Iii0

oioio 00010

1111

oiooi ooioi

iii1 --1111

00101 00001

loo0 ioio ioio

oiooo oioio oioio

iooi

oiooi

ioil ioii

ooioi

iooi ioii

oiooi oiooi

ii00 iii0 iii0 1100 iii0 --1110

ooioo oooio oioio lo100 oioio loo10

ilo1 iii1 iii1 ii01 1111 1111

oiooi ooiol ooooi ooioi lo101 oiooi ioioi

loll iioi iii1 iii1 iioi 1111 ---_ 1111

lo101 ooioi ooioi oiooi ioioi lo101 loo01

1101

iii1

applied. Note that in order to use Table 3, two padded zeros to the left of the most significant digit must be used. One zero is needed because the conversion algorithm uses _x,+r digits (when it reaches the most significant digit) while the other zero is required to incorporate the non-zero carry into the result (which might be generated out of the most significant digit and the first padded zero). For instance, the integer 4510 will be converted to CMSD as shown below

4510 = 110111~~~ @

where @ denotes

1 @ 1

a padded

1 0 0 0 i 0 t 1 1 0 i 1 i t OiOiOltCMSD

Carry MSD

zero.

Note that the combination digits i 1, 11, 11 and 11 for x;+rx; can never occur once the MSD numbers are CMSD converted. Consequently, a non-zero CMSD digit must be followed and preceded by at least one zero. This is essential to guarantee carry-free addition and borrow-free subtraction. Once two MSD numbers are canonically converted, the addition operation can take place in one step in parallel. The CMSD addition truth-table is shown in Table 5 where four CMSD digits qir;qi_,rj_l are investigated in order to generate the output sum z;. Digital implementation circuits for performing the canonical conversion scheme can be designed using 2-bits per MSD digit logic to denote the MSD digits 0, 1, 1. Both sequential and parallel digital implementations are possible.

Optical

ooioi

system

A 2-bit per MSD digit encoding could be used directly in an electronically addressable spatial light modulator, to encode the CMSD input operands optically. After the CMSD digits have been encoded optically, the addition result can be generated in a single step. This single step could be performed optically using a holographic or non-holographic optical shared content-addressable memory (SCAM)17 19. In Table 5, only six input pattern combinations can produce a non-zero sum. Three of these combinations generate a 1 digit while the other three produce the output 1. These two groups of input patterns have symmetrical complementary relationship, i.e. they are MSD digit-by-digit complements to each other and to their corresponding output digits. By exploiting the aforementioned symmetrical complement property, it is possible to reduce the number of the minterms required for the SCAM optical implementation. To encode the CMSD digits symmetrically for SCAM processing, it is necessary to use three spatial channels to represent the three possible input signals 0, 1 and-l. The encoding scheme for the three MSD digits 0, 1 and 1 may be expressed mathematically as 1; = PIP2P3

(24

I;, = PlP2jj3

(2b)

1;

@cl

= PIP2p3

Optoelectronic

Table 5. numbers

Addition

q;

truth-table

ri

A. K. Cherri

et al.

155

=i

0 i

0 d

d 0

i

0 0

0

i

i

i

0

I

I 0 0

0 0 0

d 0 I

0 d I

I I I

0 0

0 0

0 d I

d 0

0 0

0 I i i I

0 i I i 1

i 0 0 0 0

i 1 0 0 0 0

0 0 0 0 0 0

i

substitution:

for the CMSD

ri-i

4i-1

symbolic

i

Fig. 1 Symmetric numbers

triple-rail

spatial encoding

for the input CMSD

-

1 Fig. 2 Symmetric spatial encoding for the CMSD patterns that are stored in the SCAM

d reference

where I’ refers to the ith input and pj(l < j d 3) represents a pixel associated with each spatial pattern. A pixel pj with an overbar represents a dark pixel (transmittance = 0) while a pixel pj without an overbar represents a transparent pixel (transmittance = 1). For example, the spatial encoding expression for input 1 indicates that the lowest pixel (p3) is transparent while the remaining pixels are dark. Figure 1 shows the symmetric MSD spatially encoded patterns used in the encoding of the input MSD numbers. Next, the spatial encoding for the digits 0, 1 and 1, which are used to encode the stored reference patterns in the SCAM, is performed. This is achieved by taking the pixel-by-pixel complement of each pixel in the encoding of the input patterns expressed in (2) as shown below H; = f\ =jT,p2p3 = 1, =

H;

= f’, = p,p2&

(3b)

PlP2P3

(3c)

where HS refers to holographic storage in the SCAM. Also, the SCAM processor requires a spatial encoding for the ‘don’t care’ literal (partial and complete). This is obtained by performing an AND operation (represented by a A symbol) among the individual MSD spatial encodings of (3). For our CMSD scheme, only a complete don’t care literal is required. Therefore Hi

= Hi

A Hi

A Hy

SLM

Fig. 3 A shared the CMSD adder

B.SXlI Splitter

CAM

c/

optoelectronics

(MI)

implementation

of

(34

I

H;

-c--

- - =plp2p3

(4)

From the above equation, it is obvious that the complete don’t care literal d yields dark output whenever the digits 0, 1 and 1 appear in the input plane (see Fig. 1). Figure 2 shows the spatially symmetric encodings for the MSD digits and the complete don’t care literal that are used to represent and store the reference patterns (the minterms) in the SCAM implementation. This symmetrical complementary relationship between the spatial encoding of the input digits (see Fig. 1) on one side and the stored minterms on the other side (see Fig. 2) guarantees that whenever there is a match between an input digit pattern and a stored reference

pattern in the SCAM, no light will be transmitted to the output plane, thereby yielding a complete dark output. However, residual light will always be transmitted to the output plane in case of mismatch. Therefore, dark outputs recognize the occurrences of the sum digit being either 1 or 1 in the output plane. Recently, an opto-electronic architecture using SCAM was proposed’*. In this paper, we propose another SCAM optical implementation that reduces the size of the SCAM by 50% when compared with the technique proposed in Ref. l-8. As mentioned earlier, the minterms for output literal 1 of Table 5 are MSD digit-by-digit complements to the corresponding m&terms for output literal 1. In our triple-rail encoding, a 1 is a 180” rotated version of 1 (see Figs 1 and 2). This symmetric property of the encoding permits us to reduce the number of minterms (reference patterns) to be stored in the SCAM by 50%. Thus, only three minterms in the SCAM are needed for our CMSD addition. The optical implementation of the proposed CMSD adder is shown in Fig. 3. In this figure, the input operands are displayed in the input-plane SLM and the minterms corresponding to the MSD sum digit of 1 are stored in the SCAM. The light beam originating from the spatial light modulator

156

Optoelectronic

symbolic

substitution:

A. K. Cherri et al.

For illustration purposes,_co_nsider the addition of two CMSD_ numbers: Q = 1OlOl~so = 1110 and R = OlOOl~so = -910. These two 5-digit inputs are regrouped to produce a 6 x 4 matrix Ya q1

ro VI

113 r3

B qfj q1 q2

izr ro 71 1’2

(12

Y?

q4

r4

Y3

Q

D

@

Y4

r4

T 0 i 0 i

i

orzr

oii

0

0

0

ii0 0

oi

@alo

Using the symmetric coding rules of Fig. 1, we can generate the following 6 x 12A and A’ matrices

A

Fig. 4 The encoded SCAM a 1 on the output plane

for the CMSD

adder

which

generates

is split using a 50% beam-splitter. The beam propagating straight through and reflected by mirror MI is used to detect the occurrences of all the input patterns that produce a 1 as the sum digit. The other beam is rotated 180” using the same beam-splitter and mirror M2 to identify the presence of all the input patterns that generate a 1 sum digit. Figure 4 shows the encoded reference patterns that generate an output sum of 1 (see Table 5) using the spatially symmetric encodings of Fig. 2. Columns 1, 2 and 3 of Fig. 4 represent the spatial encodings of the minterms (OldO), (lOOrl), and (001 l), respectively. Two parallel digital registers (Q) and (R) are used to download the n-digit augend and addend CMSD input numbers into the optical processor of Fig. 3. The registers’ contents are used to control the individual pixels of an electronically addressed (n + 1) x 12-pixel spatial light modulator forming the input matrix A. Each row of the spatial light modulator contains the four quantities q;, r;. qi_, and T,- 1 in CMSD format. Also, the four-element minterms of Table 5 that produce a sum equal to 1 are stored in the SCAM, thereby forming the 12 x 3 matrix B. In this matrix. column 1 contains the representation of 0, 1. (1, 0; column 2 contains 1, 0, 0, d; column 3 has 0, 0, 1, 1. The optical processor of Fig. 3, which performs an optical analogue multiplication of matrix A (and a rotated version of matrix A denoted as A’) by matrix B, produces an (n + 1) x 3-pixel output matrix Cu(C,) on the output detector plane. Cu and CL represent the upper half and the lower half of the optical detector array. Notice that matrix Co is used to identify the presence of the sum digit 1 while matrix CL detects the presence of 1. Through adjustment of the bias of the optical detector array, the intensity of each element of matrices C’u and Cr is thresholded to only two levels: 0 and 1. After thresholding, the electronic signals are inverted by using two (12+ 1) x 3 inverter arrays (one for Ct; and the other for Cr matrices). The inverted signals are then grouped and passed through two (n + 1) x 3 OR gate arrays to generate the outputs corresponding to both 1 and 1.

100100010010 010010100100 100010010010 010100100010 001010010100 010010001010

and 001001010010 010010001001 001010010010 A’ = 010001001010 100010010001 010010100010 Similarly, using the symmetric coding of Fig. 2, the 12 x 3B matrix corresponding to the reference patterns that output digit 1 is given by 1 0 1 1 1

1 1 0 1 0

1 0 1 1 0

0 0 0 1 0 1

’ 1 0 1 0 0 0

’ 1 1 0 1 1 0

*=O

When both A and A’ are multiplied by matrix B, they generate the following 6 x 3 output matrices for Cu and CL

CL

2 2 2 3 1

2 2 1 3 0 2

4 2 3 3 3 1

1 2

1 2

4 0

;

;

1 2

2 2

AxB=l

and

A’xB=; 3 1

Optoelectronic

Electronically thresholding, the following

postprocessing Cu and CL (i.e. inverting, and ORing operations), output vectors

Ou=[O

0

0

0

1

O]T

i

i

T

0

01~

symbolic

substitution: 3

yields 4 5

and 6

oL = [o

Combining the two output of the sum, given by s=[o

i

i

i

i

vectors yields the final value

01~

7

8 9

where the first element of this vector corresponds to the least significant digit of the result, given by _-210 = OllllO~so. Notice that the optical system of Fig. 3 utilizes the same 6 x 3 pixel SCAM to generate both output vectors 0~ and 0~.

10

Conclusions

12

In this paper, an efficient one-step optoelectronic CMSD carry-free addition/subtraction is presented. The canonical conversion of MSD numbers provides the smallest number of symbolic substitution rules for carryfree arithmetic compared with all other MSD symbolic substitution based systems. Only six symbolic substitution rules are needed for the optical CAM implementation. This involves the smallest number of rules otherwise required in all other reported similar MSD schemes. Further, through the use of our proposed optical SCAM processor, the number of symbolic substitution rules is reduced further to an optimal value of three rules and, consequently, a 50% reduction of the system memory is achieved.

11

13

14 15

16 17

18

19

Acknowledgement 20

One of the authors, Abdallah K. Cherri would like to acknowledge the support of Kuwait University research administration grant No. EE069.

21

22

References 1 2

Johnson, E.L., Karim, M.A. Digital Design: A Pragmatic Approach, PWS-KENT Publishing Co, Boston (1987) Szabo, N.S., Tanaka, R.T. Residue Arithmetic andits Applications to Computer Technology, McGraw-Hill, New York (1967)

23 24

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