- Email: [email protected]
Capacitively- and resistively-coupled single-electron transistor
lqlICROILI~I'Illt~I¢
ELSEVIER
Microelectronic Engineering 53 (2000) 195-198
ii i ||
www.elsevier.nl/locate/ mee
Capacitively- and resistively-coupled single-electron transistor F. Wakaya (1,3) , S. Mandai (1), S. Nakamichi (1) , S. Iwabuchi (2) and K. Game (1,3)
(1) Department of Physical Science, Graduate School of Engineering Science, Osaka University, 1-3 Machikaneyama-cho, Toyonaka, Osaka 560-8531, Japan (2) Department of Physics, Faculty of Science, Nara Women's University, Kitauoya-Nishimaehi, Nara 630-8506, Japan (3) Research Center for Materials Science at Extreme Conditions, Osaka University, 1-3 Machikaneyama-cho, Toyonaka, Osaka 560-8531, Japan Single-electron transistor (SET) which operates as capacitively-coupled SET (C-SET) and resistively-coupled SET (R-SET) was fabricated using two-dimensional electron gas and metal Schottky gates. The Coulomb di: amends of both C-SET and R-SET were observed at -~ 30 inK. The observed Coulomb diamond of R-SET is shifted along the gate-voltage axis, although it should not be shifted in the theoretical prediction.
1. I N T R O D U C T I O N A single-electron transistor (SET) is one of the promising devices for future electronics due to the possibility of low energy consumption and highdensity integration. And the physics and applications of SET have been intensively studied[l]. The field of single-electron transport was originated by K. K. Likharev[2,3]. He proposed two types of SET in his pioneering work[3]; the capacitively-coupled SET (C-SET) and the resistively-coupled SET (R-SET). Since then, CSETs and C-SET-based devices have been intensively studied[l], while a few reports on the RSET have been found[4-6]. The schematic diagrams of the C-SET and the R-SET are shown in Fig. 1 with their Coulomb-blockade regions, i.e., Coulomb diamonds. The Coulomb diamonds of the C-SET are periodically repeated along the gate voltage (Vg) axis, while the R-SET has only one Coulomb diamond. The position of the Coulomb diamond should be shifted due to the background charge (offset charge) at the island in the C-SET case. This causes a severe problem in the operation point of the transistor. The R-SET diamond, on the other hand, is always located at the center of Vs-V plane as shown in Fig. 1. This provide a stable operation point. Moreover, the two horizontal lines which surround the Coulomb diamond of R-SET means a quite high voltage
gain of the transistor, while we cannot expect high voltage gain using the C-SET. Although RSETs have such advantages of voltage gain and offset charge, few works on R-SET can be found in a literature. The purpose of the present work is fabrication and characterization of the R-SET. 2. E X P E R I M E N T A L We fabricated an SET using two-dimensional electron gas (2DEG) in GaAs/A1GaAs heterostructure and metal Schottky gates on the surface. A Hall-bar structure was formed by wet chemical etching using H3PO4 : HzO2 : H20 = 1 : 1 : 30 solution, and, successively, Au/Ni/AuGe contacts were evaporated and annealed at 460 °C for alloying. The pattern for small Schottky gates was defined by 50 keV electron beam using PMMA as a resist and developed using a mixture of MIBK and IPA (1:3). Then AuPd was evaporated and lifted off. The secondary-electronmicroscope (SEM) micrograph of the fabricated device is shown in Fig. 2. The dark area is the wafer surface, while the light areas are the AuPd Schottky gates. The measurement setup is also depicted in Fig. 2. The left ohmic contact was used as a drain and was dc biased at a drain voltage V. The right ohmic contact was used as a source and was grounded through a current amplifier. The gate voltages V1-V4, and Vgl were
0167-9317/00/$ - see front matter © 2000 Elsevier Science B.V. All rights reserved. PII: S0167-9317(00)00295- 1
196
F. Wakaya et al. I Microelectronic Engineering 53 (2000) 195-198
(a) C-SET C1,R1 C2,R2
(b) R-SET
I/
_
C1,R1 C2,R2
500nm
I C2
V
Coulomb blockaderegion (Coulomb diamond) Figure 1. Schematic diagram of (a) C-SET and (b) R-SET with the Coulomb-blockade regions. The Coulomb-blockade regions (Coulomb diamond) are also depicted.
used to form a Coulomb island and tunnel barriers at the source and drain tunnel junctions, i.e., point contacts. The upper two fingers have the wings whose width d is _ 200 nm. The 2DEG region between these two wings was intended to be a gate resistor. The current-voltage (I-V) characteristics were measured for various gate voltages Vgl and Vg2 at a temperature of ~_ 30 mK using a dilution refrigerator. 3. R E S U L T S A N D D I S C U S S I O N Figure 3(a) shows the observed I - V characteristics for various Vgl, where V1, V2, V3, V4 and Vg2 were fixed to -0.7288 V, -0.7275 V, -0.79 V, -0.79 V and 0 V, respectively. The grey and contour plot of III of the same data is shown in Fig. 3(b). The Schottky gate whose bias is Vgl is capacitively coupled to the island, therefore, Fig. 3 shows just C-SET characteristics. This shows that the single-electron event actually took
vl
vgl v2
Figure 2. SEM micrograph of the fabricated device. The dark region is the surface of the modulation-doped wafer, while the bright fingers are the AuPd Schottky gates on the surface. The measurement setup is also shown. The negative biases V1 - V4 and Vgl are applied on the corresponding fingers to define the Coulomb island with the source and drain tunnel junctions and the gate resistor.
place in the sample at the temperature and that the island capacitance and gate capacitance were approximately 200 aF and 10 aF, respectively. The gate electrode whose voltage was Vg2 was coupled to the Coulomb island through the gate resistor Rg formed by the negative biases of V3 and V4. This means that Rg can be tuned by varying V3 and V4 from several 10 k~ to c~. Rg = c~ means that this device is just C-SET using Vg2 as a gate. We observed C-SET diamonds in such a situation. We observed the transition of the Coulomb diamond from the C-SET one to the R-SET one varying V3 and V4, i.e., varying Rg. Figure 4 shows the grey and contour plot of III in Vg2V plane with V3 = V4 = -0.415 V, where V1, V2, and Vgl were -1.228 V, -1.333 V, and -0.52 V, respectively. In this case we observed only one Coulomb diamond. This is in agreement with the theoretically prediction on R-SET (Fig. l(b)).
F. Wakaya et al. / Microelectronic Engineering 53 (2000) 195-198
197
Vg2(mV) /
(
p
A
~ 3
:o .2°o
• 40
"20 ! -0 -20
-40
-40 -
0
.
5
~
~
i
-0.5
2
Vgl(V) - 0 . 5 ~ 1
0 v(mv)
vg(v) -0.50-
......i,,i,,
2 1
01
~,ii -0,4
0.0
0.4
V(mV) Figure 4. Observed Coulomb diamond. V1 = -1.228 V, V2 = -1.333 V, V3 = -0.415 V, V4 = -0.415 V, and Vgt = -0.52 V. Only one Coulomb diamond was observed. However, the details are different from the theoretical prediction (Fig. 1).
-0.51 -0.52-0.53-0.54
1
-1.0
,0.04 I
I
0.0
I
I
1.0
v(mv)
Figure 3. (a) I - V characteristics for various Vgl. V1, V;, V3, V4 and Vg2 were fixed to -0.7288 V, 0.7275 V, -0.79 V, -0.79 V and 0 V, respectively. (b) Grey and contour plot of III, which is made from the same data as (a).
However, the center of the diamond is not located at V = Vg2 = 0. Moreover, the shape and size of the observed Coulomb diamond does not completely agree with the predicted ones. The fact that the center of the observed Coulomb diamond was shifted along the Vg axis suggests that the gate resistor was realized as a tunnel resis-
tor and the offset charge affect the position of the diamond. If the gate resistor is tunnel resistor, the vertical size of the diamond might be determined by the factor e/Cg, where the Cg is the capacitance of the gate tunnel junction. We fabricated another sample whose gate width d, which is defined in Fig. 2, is approximately 100 nm, which is thinner than the previous one. The other structural parameters are similar to those of the previous one. We can expect that the thinner gate width d leads to larger gate capacitance Cg and smaller horizontal size of Coulomb diamond. Figure 5 shows the contour and grey plot of I[ I of the device with thin gate width in Vg2-V plane. Comparing Figs: 4 and 5, the ratio of the vertical and horizontal sizes of the Coulomb diamond in Fig. 5 is closer to unity than that in Fig. 4. This is consistent with the previous speculation that the capacitance Cg at the gate tunnel junction affects the vertical size of the diamond by the factor e/Cg.
198
F. Wakaya et al.
Microelectronic Engineering 53 (2000) 195-198 ACKNOWLEDGEMENT
Vg2(mV)
This work is supported, in part, by Grant-inAid for Scientific Research, and the IndustryUniversity Joint Research Program, "Quantum Nanoelectronics" from the Ministry of Education, Science, Sport and Culture of Japan. One of the authors (FW) would like to thank the Murata Science Foundation for the financial support.
1
-1-
' o--.'.'.'.'.'.'.'~o, o. o3~ o.o I
I
-1
0
V(mV) Figure 5. Observed Coulomb diamond of the device with thin gate width. V1 = -0.6063 V, V2 = -0.525 V, V3 = -0.5135 V, V4 = -0.5135 V, and Vgl = -0.47 V. The ratio of the horizontal and vertical sizes of the Coulomb diamond becomes closer to unity than Fig. 4.
4. SUMMARY We fabricated the SET which operates as C-SET and R-SET as well using 2DEG in GaAs/AiGaAs heterostructure and metal Schottky gates. The fabricated gate resistor of R-SET seemed to consist of a tunnel resistor, while it is conventional ohmic resistance in the Likharev's proposal. The disagreements between the observed and predicted Coulomb diamonds may be due to the tunnel gate resistance and the finite temperature. The R-SET with tunnel gate resistor seemed to be affected by the the offset charge. However, we believe that another advantage of the R-SET about the voltage gain could be still remain even if the gate resistor is a tunnel resistor. We need more theoretical and numerical works to understand the characteristics of the RSET with tunnel gate resistor.
REFERENCES 1. See, for example, H. Grabert and M. H. Devoret (eds), Single Charge Tunneling, New York: Plenum Press, 1992. 2. K. K. Likharev: IEEE Trans. Magn. 23 (1987) 1142. 3. K. K. Likharev: IBM J. Res. Develop. 32 (1988) 144. 4. P. Delsing, T. Claeson, G. S. Kazacha, L. S. Kuzmin and K. K. Likharev: IEEE Trans. Magn. 27 (1991) 2581. 5. N. Yoshikawa, Y. Jinguu, H. Ishibashi and M. Sugahara: Jpn. J. Appl. Phys. 35 (1996) 1140. 6. F. Wakaya, K. Kitamura, S. Iwabuchi and K. Gamo: Jpn. J. Appl. Phys. 38 (1999) 2470.
ELSEVIER
Microelectronic Engineering 53 (2000) 195-198
ii i ||
www.elsevier.nl/locate/ mee
Capacitively- and resistively-coupled single-electron transistor F. Wakaya (1,3) , S. Mandai (1), S. Nakamichi (1) , S. Iwabuchi (2) and K. Game (1,3)
(1) Department of Physical Science, Graduate School of Engineering Science, Osaka University, 1-3 Machikaneyama-cho, Toyonaka, Osaka 560-8531, Japan (2) Department of Physics, Faculty of Science, Nara Women's University, Kitauoya-Nishimaehi, Nara 630-8506, Japan (3) Research Center for Materials Science at Extreme Conditions, Osaka University, 1-3 Machikaneyama-cho, Toyonaka, Osaka 560-8531, Japan Single-electron transistor (SET) which operates as capacitively-coupled SET (C-SET) and resistively-coupled SET (R-SET) was fabricated using two-dimensional electron gas and metal Schottky gates. The Coulomb di: amends of both C-SET and R-SET were observed at -~ 30 inK. The observed Coulomb diamond of R-SET is shifted along the gate-voltage axis, although it should not be shifted in the theoretical prediction.
1. I N T R O D U C T I O N A single-electron transistor (SET) is one of the promising devices for future electronics due to the possibility of low energy consumption and highdensity integration. And the physics and applications of SET have been intensively studied[l]. The field of single-electron transport was originated by K. K. Likharev[2,3]. He proposed two types of SET in his pioneering work[3]; the capacitively-coupled SET (C-SET) and the resistively-coupled SET (R-SET). Since then, CSETs and C-SET-based devices have been intensively studied[l], while a few reports on the RSET have been found[4-6]. The schematic diagrams of the C-SET and the R-SET are shown in Fig. 1 with their Coulomb-blockade regions, i.e., Coulomb diamonds. The Coulomb diamonds of the C-SET are periodically repeated along the gate voltage (Vg) axis, while the R-SET has only one Coulomb diamond. The position of the Coulomb diamond should be shifted due to the background charge (offset charge) at the island in the C-SET case. This causes a severe problem in the operation point of the transistor. The R-SET diamond, on the other hand, is always located at the center of Vs-V plane as shown in Fig. 1. This provide a stable operation point. Moreover, the two horizontal lines which surround the Coulomb diamond of R-SET means a quite high voltage
gain of the transistor, while we cannot expect high voltage gain using the C-SET. Although RSETs have such advantages of voltage gain and offset charge, few works on R-SET can be found in a literature. The purpose of the present work is fabrication and characterization of the R-SET. 2. E X P E R I M E N T A L We fabricated an SET using two-dimensional electron gas (2DEG) in GaAs/A1GaAs heterostructure and metal Schottky gates on the surface. A Hall-bar structure was formed by wet chemical etching using H3PO4 : HzO2 : H20 = 1 : 1 : 30 solution, and, successively, Au/Ni/AuGe contacts were evaporated and annealed at 460 °C for alloying. The pattern for small Schottky gates was defined by 50 keV electron beam using PMMA as a resist and developed using a mixture of MIBK and IPA (1:3). Then AuPd was evaporated and lifted off. The secondary-electronmicroscope (SEM) micrograph of the fabricated device is shown in Fig. 2. The dark area is the wafer surface, while the light areas are the AuPd Schottky gates. The measurement setup is also depicted in Fig. 2. The left ohmic contact was used as a drain and was dc biased at a drain voltage V. The right ohmic contact was used as a source and was grounded through a current amplifier. The gate voltages V1-V4, and Vgl were
0167-9317/00/$ - see front matter © 2000 Elsevier Science B.V. All rights reserved. PII: S0167-9317(00)00295- 1
196
F. Wakaya et al. I Microelectronic Engineering 53 (2000) 195-198
(a) C-SET C1,R1 C2,R2
(b) R-SET
I/
_
C1,R1 C2,R2
500nm
I C2
V
Coulomb blockaderegion (Coulomb diamond) Figure 1. Schematic diagram of (a) C-SET and (b) R-SET with the Coulomb-blockade regions. The Coulomb-blockade regions (Coulomb diamond) are also depicted.
used to form a Coulomb island and tunnel barriers at the source and drain tunnel junctions, i.e., point contacts. The upper two fingers have the wings whose width d is _ 200 nm. The 2DEG region between these two wings was intended to be a gate resistor. The current-voltage (I-V) characteristics were measured for various gate voltages Vgl and Vg2 at a temperature of ~_ 30 mK using a dilution refrigerator. 3. R E S U L T S A N D D I S C U S S I O N Figure 3(a) shows the observed I - V characteristics for various Vgl, where V1, V2, V3, V4 and Vg2 were fixed to -0.7288 V, -0.7275 V, -0.79 V, -0.79 V and 0 V, respectively. The grey and contour plot of III of the same data is shown in Fig. 3(b). The Schottky gate whose bias is Vgl is capacitively coupled to the island, therefore, Fig. 3 shows just C-SET characteristics. This shows that the single-electron event actually took
vl
vgl v2
Figure 2. SEM micrograph of the fabricated device. The dark region is the surface of the modulation-doped wafer, while the bright fingers are the AuPd Schottky gates on the surface. The measurement setup is also shown. The negative biases V1 - V4 and Vgl are applied on the corresponding fingers to define the Coulomb island with the source and drain tunnel junctions and the gate resistor.
place in the sample at the temperature and that the island capacitance and gate capacitance were approximately 200 aF and 10 aF, respectively. The gate electrode whose voltage was Vg2 was coupled to the Coulomb island through the gate resistor Rg formed by the negative biases of V3 and V4. This means that Rg can be tuned by varying V3 and V4 from several 10 k~ to c~. Rg = c~ means that this device is just C-SET using Vg2 as a gate. We observed C-SET diamonds in such a situation. We observed the transition of the Coulomb diamond from the C-SET one to the R-SET one varying V3 and V4, i.e., varying Rg. Figure 4 shows the grey and contour plot of III in Vg2V plane with V3 = V4 = -0.415 V, where V1, V2, and Vgl were -1.228 V, -1.333 V, and -0.52 V, respectively. In this case we observed only one Coulomb diamond. This is in agreement with the theoretically prediction on R-SET (Fig. l(b)).
F. Wakaya et al. / Microelectronic Engineering 53 (2000) 195-198
197
Vg2(mV) /
(
p
A
~ 3
:o .2°o
• 40
"20 ! -0 -20
-40
-40 -
0
.
5
~
~
i
-0.5
2
Vgl(V) - 0 . 5 ~ 1
0 v(mv)
vg(v) -0.50-
......i,,i,,
2 1
01
~,ii -0,4
0.0
0.4
V(mV) Figure 4. Observed Coulomb diamond. V1 = -1.228 V, V2 = -1.333 V, V3 = -0.415 V, V4 = -0.415 V, and Vgt = -0.52 V. Only one Coulomb diamond was observed. However, the details are different from the theoretical prediction (Fig. 1).
-0.51 -0.52-0.53-0.54
1
-1.0
,0.04 I
I
0.0
I
I
1.0
v(mv)
Figure 3. (a) I - V characteristics for various Vgl. V1, V;, V3, V4 and Vg2 were fixed to -0.7288 V, 0.7275 V, -0.79 V, -0.79 V and 0 V, respectively. (b) Grey and contour plot of III, which is made from the same data as (a).
However, the center of the diamond is not located at V = Vg2 = 0. Moreover, the shape and size of the observed Coulomb diamond does not completely agree with the predicted ones. The fact that the center of the observed Coulomb diamond was shifted along the Vg axis suggests that the gate resistor was realized as a tunnel resis-
tor and the offset charge affect the position of the diamond. If the gate resistor is tunnel resistor, the vertical size of the diamond might be determined by the factor e/Cg, where the Cg is the capacitance of the gate tunnel junction. We fabricated another sample whose gate width d, which is defined in Fig. 2, is approximately 100 nm, which is thinner than the previous one. The other structural parameters are similar to those of the previous one. We can expect that the thinner gate width d leads to larger gate capacitance Cg and smaller horizontal size of Coulomb diamond. Figure 5 shows the contour and grey plot of I[ I of the device with thin gate width in Vg2-V plane. Comparing Figs: 4 and 5, the ratio of the vertical and horizontal sizes of the Coulomb diamond in Fig. 5 is closer to unity than that in Fig. 4. This is consistent with the previous speculation that the capacitance Cg at the gate tunnel junction affects the vertical size of the diamond by the factor e/Cg.
198
F. Wakaya et al.
Microelectronic Engineering 53 (2000) 195-198 ACKNOWLEDGEMENT
Vg2(mV)
This work is supported, in part, by Grant-inAid for Scientific Research, and the IndustryUniversity Joint Research Program, "Quantum Nanoelectronics" from the Ministry of Education, Science, Sport and Culture of Japan. One of the authors (FW) would like to thank the Murata Science Foundation for the financial support.
1
-1-
' o--.'.'.'.'.'.'.'~o, o. o3~ o.o I
I
-1
0
V(mV) Figure 5. Observed Coulomb diamond of the device with thin gate width. V1 = -0.6063 V, V2 = -0.525 V, V3 = -0.5135 V, V4 = -0.5135 V, and Vgl = -0.47 V. The ratio of the horizontal and vertical sizes of the Coulomb diamond becomes closer to unity than Fig. 4.
4. SUMMARY We fabricated the SET which operates as C-SET and R-SET as well using 2DEG in GaAs/AiGaAs heterostructure and metal Schottky gates. The fabricated gate resistor of R-SET seemed to consist of a tunnel resistor, while it is conventional ohmic resistance in the Likharev's proposal. The disagreements between the observed and predicted Coulomb diamonds may be due to the tunnel gate resistance and the finite temperature. The R-SET with tunnel gate resistor seemed to be affected by the the offset charge. However, we believe that another advantage of the R-SET about the voltage gain could be still remain even if the gate resistor is a tunnel resistor. We need more theoretical and numerical works to understand the characteristics of the RSET with tunnel gate resistor.
REFERENCES 1. See, for example, H. Grabert and M. H. Devoret (eds), Single Charge Tunneling, New York: Plenum Press, 1992. 2. K. K. Likharev: IEEE Trans. Magn. 23 (1987) 1142. 3. K. K. Likharev: IBM J. Res. Develop. 32 (1988) 144. 4. P. Delsing, T. Claeson, G. S. Kazacha, L. S. Kuzmin and K. K. Likharev: IEEE Trans. Magn. 27 (1991) 2581. 5. N. Yoshikawa, Y. Jinguu, H. Ishibashi and M. Sugahara: Jpn. J. Appl. Phys. 35 (1996) 1140. 6. F. Wakaya, K. Kitamura, S. Iwabuchi and K. Gamo: Jpn. J. Appl. Phys. 38 (1999) 2470.