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Co-MOCVD processed seed layer for through silicon via copper metallization
Microelectronic Engineering 211 (2019) 55–59
Contents lists available at ScienceDirect
Microelectronic Engineering journal homepage: www.elsevier.com/locate/mee
Research paper
Co-MOCVD processed seed layer for through silicon via copper metallization Sajjad Esmaeili , Katharina Lilienthal, Nicole Nagy, Lukas Gerlich, Robert Krause, Benjamin Uhlig ⁎
T
Fraunhofer Institute of Photonic Microsystems (IPMS), Center of Nanoelectronic Technology (CNT), Dresden, Germany
ARTICLE INFO
ABSTRACT
Keywords: Cobalt corrosion Cobalt MOCVD Direct Cu-ECD ToF-SIMS TSV metallization technology
A novel metallization for vertical integration in microsystems technology using through-silicon-via (TSV) was investigated. Cobalt metal-organic chemical vapor deposition (Co-MOCVD) process is capable of forming an excellent conformal ultra-thin film with good adhesion to the copper conductive and diffusion barrier layers. Co layer as a seed layer provides a direct copper electrochemical deposition (Cu-ECD). The main challenge of this metallization module is to reduce Co corrosion under the influence of Cu electrolyte. Based on the experimental results, the optimized deposition recipes have been obtained and discussed by varying the ECD parameters, and characterizing the deposited films. Thereby, the Co corrosion was minimized even for the ultra-thin film of 5 nm. Metallization processes were performed on blank and structured samples (on both coupons and 300 mm wafers). Barrier films stack deposition and in-vacuo annealing were carried out without breaking the vacuum in the 300 mm cluster tool. Afterwards, ECD processes were accomplished on coupon level in a lab-scale plating cell. Moreover, different metrology, ex-situ characterizations and measurements were performed by time-offlight secondary ion mass spectroscopy (ToF-SIMS), transmission electron microscopy (TEM), cross sectional scanning electron microscopy (XSEM) and x-ray reflectometry (XRR), for revealing thickness loss, corrosion percentage and elemental depth profile.
1. Introduction The through-silicon-via (TSV) interconnection provides the ideal three-dimensional (3D) integration in semiconductor devices with the shortest electric pathway. This vertical integration has significant function for an excellent performance and high efficiency compares to the lateral integration [1]. The most common TSV metallization is fabricated and composed of titanium nitride (TiN) or tantalum (Ta) diffusion barrier and Cu seed layers, both by the physical vapor deposition (PVD) process. Subsequently, the bottom-up copper electrochemical deposition (Cu-ECD) is used to fill structures. The poor conformality of sputtered layers means that thicker than necessary layers are needed near the top of holes in order to provide sufficient thickness in the bottom of structures. These lead to undesired overhangs on top of features, which in turn causes to voids formation during Cu-ECD [2]. Nevertheless, modified PVD techniques (e.g. DC Magnetron iPVD) are still useful as a complementary method if combined with other conformal deposition techniques such as chemical vapor deposition (CVD) [3]. Various studies have been conducted to examine different (transition) metals such as ruthenium (Ru) [4], palladium (Pd) [5], or Co [6]
as possible alternative candidates for a conformal copper-free seed layer. Among them, Ru and Co have received much attention and have been widely studied [7]. It has been shown that the introduction of a thin Co interlayer between Cu and a diffusion barrier layer such as TiN, WN or TaN, increases the interface adhesion, presumably thereby increasing the lifetime of the copper wires [6]. The face centered cubic (FCC) structure of Co nanocrystalline layer deposited by CVD allows epitaxial growth of copper ECD on top of it with less structure mismatch [8]. Furthermore, a spontaneous ECD reaction takes place between them [9], since Co is less noble than Cu. Therefore, an additional Cu seed layer can be avoided. However, the introduction of Co material is only possible when the potential integration issues such as Co corrosion (in contact with Cu electrolyte) are controlled. Apart from the acidic corrosive factor of Cu electrolyte on Co, the redox reaction of Cu solidification is the faster corrosive factor. Below, eq. 1 and 2 show respectively the replacement of Cu ions with Co atoms and hydrogen (H) evolution while Co corrosion in an acidic electrolyte [10]:
Co + Cu2 + Co + 2H+
Co2 + + Cu Co2 + + H2
; E = +0.617 VSHE ; E = + 0.277 VSHE
(1) (2)
⁎ Corresponding author at: Fraunhofer Institute of Photonic Microsystems (IPMS), Center of Nanoelectronic Technology (CNT), Königsbrücker Straße 178, 01099 Dresden, Germany. E-mail address: [email protected] (S. Esmaeili).
https://doi.org/10.1016/j.mee.2019.03.021 Received 10 April 2018; Received in revised form 28 February 2019; Accepted 24 March 2019 Available online 25 March 2019 0167-9317/ © 2019 Elsevier B.V. All rights reserved.
Microelectronic Engineering 211 (2019) 55–59
S. Esmaeili, et al.
Table 1 Process plan of the representative wafers for TSV plating optimization. Wafer#
Type
Stack
Co Thickness
Aim
1 2
Blank Blank
TEOS/Ta(N)/Co (Thin) TEOS/TaN/Co (Thick)
5 nm 35 nm
Bottom of TSV Top of TSV
Thereby, a process window of parameters on blank samples was developed in order to generalize and transfer the process to TSV geometries eventually. It should be noted that the ECD processes were performed without using any electrolyte additives (accelerator, suppressor and/or leveler). The elimination of additives is more economical for industrial mass production.
Fig. 2. Six test electrolytes and the component concentration variations.
concentrations, which are the main corrosive factors. Fig. 2 shows the component concentrations of each electrolyte referring to Cu2+ and sulfuric acid. Second, two plating times (20 s and 60 s) and four current densities (1, 2, 3 and 5 mA/cm2) were chosen. Here the goal was to find an electrolyte which works well qualitatively on both wafers with regards to the effective current density. In this case, the qualitative CuECD is the one with the superior plating homogeneity, less surface roughness, and without a non-plated area and oxidized edges. Various plating experiments have been performed as a total permutation of all the parameters. Eventually, for elemental depth profile measurement, samples out of the selected coupons were picked for the time-of-flight secondary ion mass spectroscopy (ToF-SIMS) characterization method. In order to determine the elemental and compositional depth profile with respect to the Co layer, ToF-SIMS tool (300R IonTOF 5) used cesium ions (Cs+) that yielded negative polarity measurement curves. These curves were analyzed for relative Co− content in order to determine which combination of parameters yielded the highest and most stable amount of Co. The amount of Co− ions result from ion gun sputtering through the depth of deposited films. The experimental plan for ToF-SIMS measurements of the six selected coupons is summarized beside an example coupon in Table 2. This analysis can be performed only by having the reference material samples along with those under the investigation. Therefore, two samples were selected from each coupon. One is from Cu-plated area and another one is from ref. Co area. At the beginning, the calibration profiles from the Co (non-plated) regions were obtained. This method and approach is appropriate for estimating the approximate remaining Co thickness with certain accuracy, but does not provide the absolute values. For demonstration and determination of this characterization method reliability, transmission electron microscopy (TEM- Tecnai, F20 FEI) came into the field.
2. Materials and methods In this research work, the impact of direct Cu-ECD process on different Co layer thicknesses was investigated with a focus on the corrosion factors. Results of this process on four parameters – current density (j), plating time, electrolyte compositions and different Co thicknesses – were achieved and discussed on both blank and structured coupons. Two blank wafers were employed for plating parameters engineering. Table 1 shows the process plan of layers stack fabrications. These wafers were processed to be the representations of thin and thick Co thickness films through a TSV as illustrated in Fig. 1. These thicknesses were assumed for the unfavorable conformality on the bottom and top of a TSV, respectively. The Co deposited thicknesses for wafer 1 and 2 have been revealed ~5 nm and 35 nm by x-ray reflectometry (XRR- Bruker D8, AXS) measurement, and cross sectional scanning electron microscopy (XSEM- Hitachi S5000), respectively. A thin iPVD Ta(N) layer (7 nm) was deposited to serve as a Cu diffusion barrier layer. Subsequently, the cobalt metal-organic chemical vapor deposition (Co-MOCVD) process was performed in an alternating mode consisting of a deposition part and a H2 plasma step to reduce precursor-induced impurities where dicobalt hexacarbonyl tert-butylacetylene (CCTBA) was used as the Co precursor. Regarding the stack of wafer 1, Ta layer beneath of Co was deposited for the conductivity reason. Due to the bath chemistry especially Cu electrolyte component, Co thin film is prone to be corroded during Cu-ECD, and there might be non-plated areas after the deposition process. Therefore, a better conductive layer underneath Co thin film supplies more charge to counteract the corrosive reactions. Subsequently, it leads to find the best electrolyte composition for Cu-ECD process on thin Co layer. After the thin film depositions, the annealing process was performed at 300 °C for the surface improvement on both wafers. The ECD processes were performed in a lab-scale plating cell with four ECD parameters including electrolyte compositions, current density, plating time, and different stack thicknesses. First, six test electrolytes were prepared with various Cu ion and sulfuric acid
3. Results and discussion At the beginning, the preliminary observations on Cu-plated surface
Fig. 1. Film stacks representation for a non-conformal TSV, which shows the applications of wafer 1 and 2 for the bottom and top parts of it, respectively. 56
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Table 2 ToF-SIMS experimental plan beside an example of sample area selection in two regions; Ref. Co (nonplated) and Cu-plated. Plating conditions: E5 (10 g/l H2SO4, 2 g/l Cu2+), j: 2 mA/cm2.
Coupon
Sample#
Plating Time
Wafer 1
Wafer 2
1
20 s
Ref.
2
20 s
Plated
3
60 s
Ref.
4
60 s
5
300 s
Ref.
6
300 s
Plated
7
20 s
Ref.
8
20 s
Plated
9
60 s
Ref.
10
60 s
Plated
11
300 s
Ref.
12
300 s
Plated
A
B
Plated
C
D
E
F
next ECD processes were performed in longer times to check the plating stability; for 60 s and 300 s. Visually inspected samples showed that Cu with j: 2 mA/cm2 was plated more homogenous and smoother rather than the other current densities. Lower plating quality was achieved with j: 5, 3 and 1 mA/cm2, where surface/edge burning, oxidation and non-plated regions have been obtained. Consequently, this eclectic approach tabulates the results in the Table 4. This table illustrates the six coupons which were selected over various plating parameters. Relative comparison of sputtering intensity over sputter-occurrence time should be interpreted in ToF-SIMS curve to find out if Co still left underneath of Cu layer due to the corrosive reactions. Samples “1, 3, 5” and “7, 9, 11” are the Co calibration samples for the reference measurement of thin and thick cobalt stack (wafer 1 and 2), respectively. The reference ToF-SIMS curves for each individual wafer were almost the same. As a representation, the curve for sample 9, wafer 2, is selected and shown in Fig. 3. According to Fig. 3, the intensity of cobalt decreases where the introduction of sub-layer (TaN) starts. However, the Co− curve after the
Table 3 Cu-ECD performances in E5 and E6 regarding different plating times and current densities.
Table 4 Selected coupons over variety of ECD experiments and examining various parameters on blank coupons- E5; j: 2 mA/cm2.
quality were performed regarding the different electrolytes. Thus, the plated coupons were visually inspected directly after a short time ECD process; for 20 s. Among all the plating experiments, Table 3 shows some plating examples of E5 and E6 on wafer 1. The Cu-ECD experiments in the electrolyte 5 (E5: 2 g/l Cu2+, 10 g/l H2SO4) were satisfactory in comparison with the other electrolytes even on the critical thin Co film (wafer 1). The low concentration of Cu ions in E5 allows the first Cu atoms to cover the top surface of Co layer before the effective corrosion. Afterwards, it is safe for thicker deposition, and the corrosive influence of Cu electrolyte becomes negligible. After finding the optimized electrolyte compositions for the thin and thick Co stack representing the bottom and top layers of a TSV (Fig. 1), 57
Microelectronic Engineering 211 (2019) 55–59
S. Esmaeili, et al.
Fig. 3. ToF-SIMS measurement for thick Co ref. - Sample 9 (Coupon E).
TaN interface is probably from the combination of Co− ions escaping from the buried and penetrated Co (sputter effect) and TaN layer, respectively. The first signal of TaN approximately marks the interfaces. Continuous measurement can severely intermix the composition of different thin layers and reduce the resolution of depth profile in a dynamic measurement. Therefore, it is rather challenging to differentiate the interface borders. With respect to this compositional intermixing, a statistical approach has been considered for estimating and calculating the sputter time of layers. The undertaken approach in this study is the width difference of the half of maximum intensity. By several measurements and comparisons with the reference Co, this reasonable approach helps to discuss and estimate the Co dissolution after ECD process. In Fig. 3, the Co maximum intensity is 650 counts. Half of this maximum intensity is 325 counts. The width difference of detection time at this point and the beginning of the curve gives us the approximate Co sputter time, which is 365 s. Among other coupons, selected sample 10 represents the ToF-SIMS measurements of a plated area. Fig. 4 depicts its elemental depth measurement where the Co sputter time has been calculated as 265 s. Table 5 shows the summary of sputtering times for plated samples compare to the reference samples. The estimated remaining Co
thicknesses have been determined with the correlation of the Co deposited thicknesses and the sputter times. Regarding this table, the thickness loss resulted from corrosion are 15%, 10% and 5% which have been achieved on wafer 1 for sample 2, 4 and 6, respectively. While in wafer 2, the thickness loss of 22%, 27% and 44% have been achieved for sample 8, 10 and 12, respectively. There is a difference between the corrosion percentage after Cu-ECD on samples of wafer 1 and 2. It may obtain from the grain boundaries and large grain formations (sites of corrosion) in thicker Co samples, which have been formed during the deposition and/or due to annealing. In addition, more effective corrosive areas result from the higher roughness of thicker Co samples in comparison with the nano-crystalline thinner Co samples [11]. Fig. 5 illustrates the TEM measurements of the coupon E and B layers stack (wafer 2 & 1, 60 s Cu-ECD), respectively. The Co thicknesses (26.8 nm and 4.1 nm) of TEM measurements are close and comparable enough to the determined Co thicknesses (25.7 nm and 4.3 nm) in the previous table. These values validate ToF-SIMS capability even on ultra-thin films as a reliable method for thickness loss calculation which results from corrosion. Hence, it is sufficient to demonstrate the successful direct CuECD on Co (ultra-)thin films with regards to Table 5.
Fig. 4. ToF-SIMS measurement for Cu-plated on thick Co in 60 s - Sample 10 (Coupon E). 58
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Table 5 Co sputter times for the Cu-plated samples compare to the reference samples, along with the determined remaining Co thicknesses after ECD. Wafer #
Coupon
Plating Time (s)
Reference Co Sputter Time (s)
Deposited Co Thickness (nm)
Plated Sample Co Sputter Time (s)
Determined Remaining Co Thickness (nm)
1
(Thin Co)
A B C
20 60 300
57 58 57
4.8
49 52 54
4.1 4.3 4.5
(Thick Co)
D E F
20 60 300
360 365 363
35
280 265 200
27.2 25.4 19.3
2
direct Cu electroplating through TSVs. Cu-ECD has been examined with several bath parameters and Co thicknesses. The best copper plated coupons were obtained by electrolyte components concentration of 2 g/ l Cu2+ and 10 g/l H2SO4 (E5) along with the applied 2 mA/cm2 current density. The impact of this low copper electrolyte on Co corrosion was studied by ToF-SIMS measurements on three plating times. Co presence after ECD in E5 has been demonstrated for all of the measured samples including thick and thin Co stacks. Co corrosion was minimized (< 15%) even on the critical 5 nm thin film, although, Co is prone to corrosion in Cu electrolyte. Therefore, direct Cu-ECD could be feasible even on ultra-thin Co film under certain conditions especially with considering the main corrosive factor i.e. Cu ions electrolyte concentration. Finally, the optimized plating parameters on blank coupons have been generalized, transferred and applied on the structured coupons. Cu filling and plating through the small size TSV has been achieved. In summary, Co-MOCVD can be processed to minimize the occupied cross sectional area of structures while keeping its direct plateability. For larger TSV plating, however, parameters still need to be optimized.
Fig. 5. TEM measurements of coupon E (left) and B (right); 60 s Cu-ECD.
Acknowledgements The work is funded by the German federal ministry of education and research (BMBF) under the project name VEProSi. The author would like to thank Dr. N. Haufe, Dr. M. Drescher, K. Zimmermann, Alireza M. Kia and A. Dhavamani for their assistance in TEM, SEM and ToF-SIMS measurements. Appendix A. Supplementary data Supplementary data to this article can be found online at https:// doi.org/10.1016/j.mee.2019.03.021.
Fig. 6. XSEM image of a Cu-filled small size TSV.
References
After thickness loss, corrosion percentage and composition determinations, the optimized plating parameters for blank coupons were generalized and transferred to the structured coupons. For this purpose, ECD was applied for 1 h in the favorite electrolyte (E5). In order to move the electrolyte ions faster and penetrate effectively inside TSVs, a magnet stirrer was used (300 rpm). Fig. 6 illustrates the XSEM image of the Cu-plated test-chip which is cleaved after ECD. The small size TSV with the 26.5 μm deep structure and the critical dimension of 5.5 μm (i.e. aspect ratio of 1:5) was filled without additives application. The voids or non-plated areas at the right bottom TSVs may create during cleaving (mechanical damage) or ECD process (due to less Cu ions penetration), which states the need for further parameters optimization.
[1] T.-H. Tsai, J.-H. Huang, Microelectronic Engineering 88 (2) (2011) 195–199. [2] R.G. Gordon, H. Kim, H.B. Bhandari, CoN layers for Cu interconnects and methods for forming them, (2013) (Boston). [3] K. Hoon, H.B. Bhandari, S. Xu, R.G. Gordon, Journal of The Electrochemical Society 155 (7) (2008) 496. [4] O.-K. Kwon, S.-H. Kwon, H.-S. Park, S.-W. Kang, Journal of The Electrochemical Society 151 (12) (2004) C753. [5] S.-E. Nam, K.H. Lee, Journal of The Membrane, Science 192 (1–2) (2001) 177–185. [6] Z. Li, R.G. Gordon, D.B. Farmer, Y. Lin, J. Vlassak, Electrochemical Solid-State Letters 8 (7) (2005) G182. [7] M. Damayanti, T. Sritharan, Z.H. Gan, S.G. Mhaisalkar, N. Jiang, L. Chan, Journal of The Electrochemical Society 153 (6) (2006) J41. [8] H. Bhandari, J. Yang, H. Kim, Y. Lin, R.G. Gordon, Q.M. Wang, J.S.M. Lehn, H. Li, D. Shenai, ECS Journal of Solid State, Science and Technology 5 (1) (2012) 79–84. [9] M. Wislicenus, R. Liske, L. Gerlich, B. Vasilev, A. Preusse, Microelectronic Engineering 137 (2015) 11–15. [10] A. Holleman, N. Wiberg, Lehrbuch der Anorganischen Chemie, Walter de Gruyter & Co, Berlin, 2007. [11] A. Aledresse, A. Alfantazi, Journal of Materials Science 39 (2004) 1523–1526.
4. Summary and conclusion In this work, the applicability of cobalt thin film as an alternative seed layer for TSV copper metallization has been evaluated. MOCVD process capable of depositing excellent conformal Co layer allows a 59
Contents lists available at ScienceDirect
Microelectronic Engineering journal homepage: www.elsevier.com/locate/mee
Research paper
Co-MOCVD processed seed layer for through silicon via copper metallization Sajjad Esmaeili , Katharina Lilienthal, Nicole Nagy, Lukas Gerlich, Robert Krause, Benjamin Uhlig ⁎
T
Fraunhofer Institute of Photonic Microsystems (IPMS), Center of Nanoelectronic Technology (CNT), Dresden, Germany
ARTICLE INFO
ABSTRACT
Keywords: Cobalt corrosion Cobalt MOCVD Direct Cu-ECD ToF-SIMS TSV metallization technology
A novel metallization for vertical integration in microsystems technology using through-silicon-via (TSV) was investigated. Cobalt metal-organic chemical vapor deposition (Co-MOCVD) process is capable of forming an excellent conformal ultra-thin film with good adhesion to the copper conductive and diffusion barrier layers. Co layer as a seed layer provides a direct copper electrochemical deposition (Cu-ECD). The main challenge of this metallization module is to reduce Co corrosion under the influence of Cu electrolyte. Based on the experimental results, the optimized deposition recipes have been obtained and discussed by varying the ECD parameters, and characterizing the deposited films. Thereby, the Co corrosion was minimized even for the ultra-thin film of 5 nm. Metallization processes were performed on blank and structured samples (on both coupons and 300 mm wafers). Barrier films stack deposition and in-vacuo annealing were carried out without breaking the vacuum in the 300 mm cluster tool. Afterwards, ECD processes were accomplished on coupon level in a lab-scale plating cell. Moreover, different metrology, ex-situ characterizations and measurements were performed by time-offlight secondary ion mass spectroscopy (ToF-SIMS), transmission electron microscopy (TEM), cross sectional scanning electron microscopy (XSEM) and x-ray reflectometry (XRR), for revealing thickness loss, corrosion percentage and elemental depth profile.
1. Introduction The through-silicon-via (TSV) interconnection provides the ideal three-dimensional (3D) integration in semiconductor devices with the shortest electric pathway. This vertical integration has significant function for an excellent performance and high efficiency compares to the lateral integration [1]. The most common TSV metallization is fabricated and composed of titanium nitride (TiN) or tantalum (Ta) diffusion barrier and Cu seed layers, both by the physical vapor deposition (PVD) process. Subsequently, the bottom-up copper electrochemical deposition (Cu-ECD) is used to fill structures. The poor conformality of sputtered layers means that thicker than necessary layers are needed near the top of holes in order to provide sufficient thickness in the bottom of structures. These lead to undesired overhangs on top of features, which in turn causes to voids formation during Cu-ECD [2]. Nevertheless, modified PVD techniques (e.g. DC Magnetron iPVD) are still useful as a complementary method if combined with other conformal deposition techniques such as chemical vapor deposition (CVD) [3]. Various studies have been conducted to examine different (transition) metals such as ruthenium (Ru) [4], palladium (Pd) [5], or Co [6]
as possible alternative candidates for a conformal copper-free seed layer. Among them, Ru and Co have received much attention and have been widely studied [7]. It has been shown that the introduction of a thin Co interlayer between Cu and a diffusion barrier layer such as TiN, WN or TaN, increases the interface adhesion, presumably thereby increasing the lifetime of the copper wires [6]. The face centered cubic (FCC) structure of Co nanocrystalline layer deposited by CVD allows epitaxial growth of copper ECD on top of it with less structure mismatch [8]. Furthermore, a spontaneous ECD reaction takes place between them [9], since Co is less noble than Cu. Therefore, an additional Cu seed layer can be avoided. However, the introduction of Co material is only possible when the potential integration issues such as Co corrosion (in contact with Cu electrolyte) are controlled. Apart from the acidic corrosive factor of Cu electrolyte on Co, the redox reaction of Cu solidification is the faster corrosive factor. Below, eq. 1 and 2 show respectively the replacement of Cu ions with Co atoms and hydrogen (H) evolution while Co corrosion in an acidic electrolyte [10]:
Co + Cu2 + Co + 2H+
Co2 + + Cu Co2 + + H2
; E = +0.617 VSHE ; E = + 0.277 VSHE
(1) (2)
⁎ Corresponding author at: Fraunhofer Institute of Photonic Microsystems (IPMS), Center of Nanoelectronic Technology (CNT), Königsbrücker Straße 178, 01099 Dresden, Germany. E-mail address: [email protected] (S. Esmaeili).
https://doi.org/10.1016/j.mee.2019.03.021 Received 10 April 2018; Received in revised form 28 February 2019; Accepted 24 March 2019 Available online 25 March 2019 0167-9317/ © 2019 Elsevier B.V. All rights reserved.
Microelectronic Engineering 211 (2019) 55–59
S. Esmaeili, et al.
Table 1 Process plan of the representative wafers for TSV plating optimization. Wafer#
Type
Stack
Co Thickness
Aim
1 2
Blank Blank
TEOS/Ta(N)/Co (Thin) TEOS/TaN/Co (Thick)
5 nm 35 nm
Bottom of TSV Top of TSV
Thereby, a process window of parameters on blank samples was developed in order to generalize and transfer the process to TSV geometries eventually. It should be noted that the ECD processes were performed without using any electrolyte additives (accelerator, suppressor and/or leveler). The elimination of additives is more economical for industrial mass production.
Fig. 2. Six test electrolytes and the component concentration variations.
concentrations, which are the main corrosive factors. Fig. 2 shows the component concentrations of each electrolyte referring to Cu2+ and sulfuric acid. Second, two plating times (20 s and 60 s) and four current densities (1, 2, 3 and 5 mA/cm2) were chosen. Here the goal was to find an electrolyte which works well qualitatively on both wafers with regards to the effective current density. In this case, the qualitative CuECD is the one with the superior plating homogeneity, less surface roughness, and without a non-plated area and oxidized edges. Various plating experiments have been performed as a total permutation of all the parameters. Eventually, for elemental depth profile measurement, samples out of the selected coupons were picked for the time-of-flight secondary ion mass spectroscopy (ToF-SIMS) characterization method. In order to determine the elemental and compositional depth profile with respect to the Co layer, ToF-SIMS tool (300R IonTOF 5) used cesium ions (Cs+) that yielded negative polarity measurement curves. These curves were analyzed for relative Co− content in order to determine which combination of parameters yielded the highest and most stable amount of Co. The amount of Co− ions result from ion gun sputtering through the depth of deposited films. The experimental plan for ToF-SIMS measurements of the six selected coupons is summarized beside an example coupon in Table 2. This analysis can be performed only by having the reference material samples along with those under the investigation. Therefore, two samples were selected from each coupon. One is from Cu-plated area and another one is from ref. Co area. At the beginning, the calibration profiles from the Co (non-plated) regions were obtained. This method and approach is appropriate for estimating the approximate remaining Co thickness with certain accuracy, but does not provide the absolute values. For demonstration and determination of this characterization method reliability, transmission electron microscopy (TEM- Tecnai, F20 FEI) came into the field.
2. Materials and methods In this research work, the impact of direct Cu-ECD process on different Co layer thicknesses was investigated with a focus on the corrosion factors. Results of this process on four parameters – current density (j), plating time, electrolyte compositions and different Co thicknesses – were achieved and discussed on both blank and structured coupons. Two blank wafers were employed for plating parameters engineering. Table 1 shows the process plan of layers stack fabrications. These wafers were processed to be the representations of thin and thick Co thickness films through a TSV as illustrated in Fig. 1. These thicknesses were assumed for the unfavorable conformality on the bottom and top of a TSV, respectively. The Co deposited thicknesses for wafer 1 and 2 have been revealed ~5 nm and 35 nm by x-ray reflectometry (XRR- Bruker D8, AXS) measurement, and cross sectional scanning electron microscopy (XSEM- Hitachi S5000), respectively. A thin iPVD Ta(N) layer (7 nm) was deposited to serve as a Cu diffusion barrier layer. Subsequently, the cobalt metal-organic chemical vapor deposition (Co-MOCVD) process was performed in an alternating mode consisting of a deposition part and a H2 plasma step to reduce precursor-induced impurities where dicobalt hexacarbonyl tert-butylacetylene (CCTBA) was used as the Co precursor. Regarding the stack of wafer 1, Ta layer beneath of Co was deposited for the conductivity reason. Due to the bath chemistry especially Cu electrolyte component, Co thin film is prone to be corroded during Cu-ECD, and there might be non-plated areas after the deposition process. Therefore, a better conductive layer underneath Co thin film supplies more charge to counteract the corrosive reactions. Subsequently, it leads to find the best electrolyte composition for Cu-ECD process on thin Co layer. After the thin film depositions, the annealing process was performed at 300 °C for the surface improvement on both wafers. The ECD processes were performed in a lab-scale plating cell with four ECD parameters including electrolyte compositions, current density, plating time, and different stack thicknesses. First, six test electrolytes were prepared with various Cu ion and sulfuric acid
3. Results and discussion At the beginning, the preliminary observations on Cu-plated surface
Fig. 1. Film stacks representation for a non-conformal TSV, which shows the applications of wafer 1 and 2 for the bottom and top parts of it, respectively. 56
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Table 2 ToF-SIMS experimental plan beside an example of sample area selection in two regions; Ref. Co (nonplated) and Cu-plated. Plating conditions: E5 (10 g/l H2SO4, 2 g/l Cu2+), j: 2 mA/cm2.
Coupon
Sample#
Plating Time
Wafer 1
Wafer 2
1
20 s
Ref.
2
20 s
Plated
3
60 s
Ref.
4
60 s
5
300 s
Ref.
6
300 s
Plated
7
20 s
Ref.
8
20 s
Plated
9
60 s
Ref.
10
60 s
Plated
11
300 s
Ref.
12
300 s
Plated
A
B
Plated
C
D
E
F
next ECD processes were performed in longer times to check the plating stability; for 60 s and 300 s. Visually inspected samples showed that Cu with j: 2 mA/cm2 was plated more homogenous and smoother rather than the other current densities. Lower plating quality was achieved with j: 5, 3 and 1 mA/cm2, where surface/edge burning, oxidation and non-plated regions have been obtained. Consequently, this eclectic approach tabulates the results in the Table 4. This table illustrates the six coupons which were selected over various plating parameters. Relative comparison of sputtering intensity over sputter-occurrence time should be interpreted in ToF-SIMS curve to find out if Co still left underneath of Cu layer due to the corrosive reactions. Samples “1, 3, 5” and “7, 9, 11” are the Co calibration samples for the reference measurement of thin and thick cobalt stack (wafer 1 and 2), respectively. The reference ToF-SIMS curves for each individual wafer were almost the same. As a representation, the curve for sample 9, wafer 2, is selected and shown in Fig. 3. According to Fig. 3, the intensity of cobalt decreases where the introduction of sub-layer (TaN) starts. However, the Co− curve after the
Table 3 Cu-ECD performances in E5 and E6 regarding different plating times and current densities.
Table 4 Selected coupons over variety of ECD experiments and examining various parameters on blank coupons- E5; j: 2 mA/cm2.
quality were performed regarding the different electrolytes. Thus, the plated coupons were visually inspected directly after a short time ECD process; for 20 s. Among all the plating experiments, Table 3 shows some plating examples of E5 and E6 on wafer 1. The Cu-ECD experiments in the electrolyte 5 (E5: 2 g/l Cu2+, 10 g/l H2SO4) were satisfactory in comparison with the other electrolytes even on the critical thin Co film (wafer 1). The low concentration of Cu ions in E5 allows the first Cu atoms to cover the top surface of Co layer before the effective corrosion. Afterwards, it is safe for thicker deposition, and the corrosive influence of Cu electrolyte becomes negligible. After finding the optimized electrolyte compositions for the thin and thick Co stack representing the bottom and top layers of a TSV (Fig. 1), 57
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Fig. 3. ToF-SIMS measurement for thick Co ref. - Sample 9 (Coupon E).
TaN interface is probably from the combination of Co− ions escaping from the buried and penetrated Co (sputter effect) and TaN layer, respectively. The first signal of TaN approximately marks the interfaces. Continuous measurement can severely intermix the composition of different thin layers and reduce the resolution of depth profile in a dynamic measurement. Therefore, it is rather challenging to differentiate the interface borders. With respect to this compositional intermixing, a statistical approach has been considered for estimating and calculating the sputter time of layers. The undertaken approach in this study is the width difference of the half of maximum intensity. By several measurements and comparisons with the reference Co, this reasonable approach helps to discuss and estimate the Co dissolution after ECD process. In Fig. 3, the Co maximum intensity is 650 counts. Half of this maximum intensity is 325 counts. The width difference of detection time at this point and the beginning of the curve gives us the approximate Co sputter time, which is 365 s. Among other coupons, selected sample 10 represents the ToF-SIMS measurements of a plated area. Fig. 4 depicts its elemental depth measurement where the Co sputter time has been calculated as 265 s. Table 5 shows the summary of sputtering times for plated samples compare to the reference samples. The estimated remaining Co
thicknesses have been determined with the correlation of the Co deposited thicknesses and the sputter times. Regarding this table, the thickness loss resulted from corrosion are 15%, 10% and 5% which have been achieved on wafer 1 for sample 2, 4 and 6, respectively. While in wafer 2, the thickness loss of 22%, 27% and 44% have been achieved for sample 8, 10 and 12, respectively. There is a difference between the corrosion percentage after Cu-ECD on samples of wafer 1 and 2. It may obtain from the grain boundaries and large grain formations (sites of corrosion) in thicker Co samples, which have been formed during the deposition and/or due to annealing. In addition, more effective corrosive areas result from the higher roughness of thicker Co samples in comparison with the nano-crystalline thinner Co samples [11]. Fig. 5 illustrates the TEM measurements of the coupon E and B layers stack (wafer 2 & 1, 60 s Cu-ECD), respectively. The Co thicknesses (26.8 nm and 4.1 nm) of TEM measurements are close and comparable enough to the determined Co thicknesses (25.7 nm and 4.3 nm) in the previous table. These values validate ToF-SIMS capability even on ultra-thin films as a reliable method for thickness loss calculation which results from corrosion. Hence, it is sufficient to demonstrate the successful direct CuECD on Co (ultra-)thin films with regards to Table 5.
Fig. 4. ToF-SIMS measurement for Cu-plated on thick Co in 60 s - Sample 10 (Coupon E). 58
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Table 5 Co sputter times for the Cu-plated samples compare to the reference samples, along with the determined remaining Co thicknesses after ECD. Wafer #
Coupon
Plating Time (s)
Reference Co Sputter Time (s)
Deposited Co Thickness (nm)
Plated Sample Co Sputter Time (s)
Determined Remaining Co Thickness (nm)
1
(Thin Co)
A B C
20 60 300
57 58 57
4.8
49 52 54
4.1 4.3 4.5
(Thick Co)
D E F
20 60 300
360 365 363
35
280 265 200
27.2 25.4 19.3
2
direct Cu electroplating through TSVs. Cu-ECD has been examined with several bath parameters and Co thicknesses. The best copper plated coupons were obtained by electrolyte components concentration of 2 g/ l Cu2+ and 10 g/l H2SO4 (E5) along with the applied 2 mA/cm2 current density. The impact of this low copper electrolyte on Co corrosion was studied by ToF-SIMS measurements on three plating times. Co presence after ECD in E5 has been demonstrated for all of the measured samples including thick and thin Co stacks. Co corrosion was minimized (< 15%) even on the critical 5 nm thin film, although, Co is prone to corrosion in Cu electrolyte. Therefore, direct Cu-ECD could be feasible even on ultra-thin Co film under certain conditions especially with considering the main corrosive factor i.e. Cu ions electrolyte concentration. Finally, the optimized plating parameters on blank coupons have been generalized, transferred and applied on the structured coupons. Cu filling and plating through the small size TSV has been achieved. In summary, Co-MOCVD can be processed to minimize the occupied cross sectional area of structures while keeping its direct plateability. For larger TSV plating, however, parameters still need to be optimized.
Fig. 5. TEM measurements of coupon E (left) and B (right); 60 s Cu-ECD.
Acknowledgements The work is funded by the German federal ministry of education and research (BMBF) under the project name VEProSi. The author would like to thank Dr. N. Haufe, Dr. M. Drescher, K. Zimmermann, Alireza M. Kia and A. Dhavamani for their assistance in TEM, SEM and ToF-SIMS measurements. Appendix A. Supplementary data Supplementary data to this article can be found online at https:// doi.org/10.1016/j.mee.2019.03.021.
Fig. 6. XSEM image of a Cu-filled small size TSV.
References
After thickness loss, corrosion percentage and composition determinations, the optimized plating parameters for blank coupons were generalized and transferred to the structured coupons. For this purpose, ECD was applied for 1 h in the favorite electrolyte (E5). In order to move the electrolyte ions faster and penetrate effectively inside TSVs, a magnet stirrer was used (300 rpm). Fig. 6 illustrates the XSEM image of the Cu-plated test-chip which is cleaved after ECD. The small size TSV with the 26.5 μm deep structure and the critical dimension of 5.5 μm (i.e. aspect ratio of 1:5) was filled without additives application. The voids or non-plated areas at the right bottom TSVs may create during cleaving (mechanical damage) or ECD process (due to less Cu ions penetration), which states the need for further parameters optimization.
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4. Summary and conclusion In this work, the applicability of cobalt thin film as an alternative seed layer for TSV copper metallization has been evaluated. MOCVD process capable of depositing excellent conformal Co layer allows a 59