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Electrical properties of Al2O3–HfTiO laminate gate dielectric stacks with an equivalent oxide thickness below 0.8 nm
Thin Solid Films 515 (2007) 3704 – 3708 www.elsevier.com/locate/tsf
Electrical properties of Al2O3–HfTiO laminate gate dielectric stacks with an equivalent oxide thickness below 0.8 nm V. Mikhelashvili ⁎, G. Eisenstein Department of Electrical Engineering, Technion-Israel Institute of Technology, Haifa 3200, Israel Received 10 October 2005; received in revised form 18 April 2006; accepted 7 September 2006 Available online 31 October 2006
Abstract We report high quality nanolaminate films consisting of five Al2O3–HfTiO layers with a dielectric constant of about 29. The dielectric stack was deposited on unheated p-Si substrate from Al2O3 and 1HfO2/1TiO2 targets using an electron beam gun evaporation system without addition of oxygen. A dielectric constant for a thick HfTiO film of about 83 was also demonstrated. The electrical characteristics of as deposited structures and ones which were annealed for 5–10 min in an O2 atmosphere at up to 950 °C were investigated. Two types of gate electrodes: Pt and Ti were compared. The dielectric stack which was annealed up to 500 °C exhibits a leakage current density as small as ∼ 1 × 10− 4 A/cm2 at an electric of field 1.5 MV/cm for a quantum mechanical corrected equivalent oxide thickness of ∼ 0.76 nm. These values change to ∼ 1 × 10− 8 A/cm2 and 1.82 nm respectively, after annealing at 950 °C for 5 min. © 2006 Elsevier B.V. All rights reserved. Keywords: Thin dielectric films; Electron beam gun deposition; Electrical characterization; Leakage current
1. Introduction Single metal oxide films such as Ta2O5 [1–3], TiO2 [4–7], HfO2, ZrO2 [8], Y2O3 [9,10], Gd2O3 [11,12] and Er2O3 [13,14], all with large dielectric constants (high-k dielectrics), have been intensively studied in the past few years as potential substitute for SiO 2 in complimentary metal-oxide-semiconductor (CMOS) devices. Two major factors limit the use of single metal oxides in MOS structures: large leakage currents and thermal instability. All metal oxides have low band gaps and conduction band offsets with Si [8,15] (the exception being Al2O3 having a band gap 8.8 eV and a conduction band offset of ∼ 2.8 eV). This introduces a particular class of electron leakages into the band states of the films. Slight deviations in stoichiometry, and in particular oxygen vacancies, increase the leakage currents. Post deposition, high temperature annealing in an O2 atmosphere is therefore vital. However, the metal oxides tend to crystallize at relatively low temperatures and hence form grain
⁎ Corresponding author. E-mail address: [email protected] (V. Mikhelashvili). 0040-6090/$ - see front matter © 2006 Elsevier B.V. All rights reserved. doi:10.1016/j.tsf.2006.09.008
boundaries and interfacial silicids. These cause in turn significant increases of the leakage current density. Nanolaminates based on HfO2–Al2O3 or their alloys have been shown to reduce leakages [16–19] without a measurable change in the effective dielectric constant (keff). The incorporation of Al2O3, whose dielectric constant is low (k ∼7–9), results in a low overall keff value for the multilayer dielectric stacks, down to 9–14 which is less then that of pure HfO2 (∼ 20–25) [8]. This reduction hinders the main objective of using high-k gate dielectrics since it prevents scaling of the Equivalent Oxide Thickness (EOT) to the sub-nanometer regime, where large leakage currents are a major problem, mainly for low-power applications. Binary and ternary metal oxides such as HfTiO and Hf TiTaO, with keff values of 40–60 have also been studied recently [20,21] as alternatives to HfO2. However, these have rather large leakage current densities (higher than 2–3 × 10− 2 A/ cm2) which limit the achievable EOT to 1.47 and 1.14 nm respectively, for HfTiO and HfTiTaO [21]. In this work we propose an alternative multilayer nanolaminate stack which is based on Al2O3–Hf TiO layers. This structure combines the best properties of its components: a high band gap
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and conduction band offsets with Si, contributed by the Al2O3 together with the high dielectric constant of HfTiO. We show that the incorporation of an Al2O3 sub-layer does not reduce the value of keff significantly. Structures which were annealed at up to 450– 500 °C yield an EOT of less than 0.8 nm with a leakage current density of ∼1 × 10− 4 A/cm2 at an applied field of 1.5 MV/cm. We used Electron Beam Gun system to deposit the films at room temperature without incorporation of any additional oxygen. The low temperature process reduces the background oxygen reaction at the Si surface and the growth of SiO2 interfacial layers (IL). Such IL is a major cause for the lowering of the relative dielectric constant of ultra thin high-k insulators. 2. Experimental procedure A p-type (100) Silicon wafer (ρ = 10–20 Ω cm) was used as the substrate. It was cleaned by the standard RCA cleaning process [22] and dipped in dilute HF to eliminate the native oxide on its surface. It was subsequently inserted into a vacuum chamber which was evacuated before deposition to 4– 6 × 10− 6 Pa. The structure we studied comprised a five layer Al2O3–HfTiO–Al2O3–HfTiO–Al2O3 nanolaminate stack with total thickness of about 6 nm. The physical thickness of the Al2O3 and HfTiO sub layers were respectively, 0.4 and 2.4 nm. The films were deposited at a pressure of 4 × 10− 4 Pa at a growth rate of 0.01 nm/s. We also prepared single HfTiO films which were deposited from an alloy target with a composition ∼ 1HfO2/1TiO2. A shadow mask was used to form the top Pt or Ti electrodes and Al was used as a back contact. Typical capacitor areas were 2–5 × 10− 5 cm2. The size of the electrodes was measured using an optical microscope. All electrodes were evaporated by an electron beam gun with no substrate heating. Thermal Annealing was carried out in an oxygen environment at up to 950 °C for 5–10 min. The thickness and refractive index (to be 2.2–2.35) of the HfTiO film were determined by ellipsometry. Capacitance–voltage (C–V) and current–electric field (J–E) measurements were performed using standard techniques and instruments. All the electrical measurements were carried out at temperatures ranging from 295 to 478 K.
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an IL with a low dielectric constant (kIL = 3.9). The keff value was determined from a series double layer capacitance model as keff = kILtHigh-k/(tCET − tIL). Assuming an IL with tIL = 0.7 nm and kIL = 3.9 and using the data of Fig. 1a, the actual value of dielectric constant of HfTiO of 100–110 is estimated. The same dielectric constant was obtained from capacitance measurements of a Metal–Insulator–Metal, Pt–HfTiO–Pt capacitor where the IL is naturally absent. The calculated value of keff for the thick films is larger than the one measured in [20,21] for a low ratio of Hf to Ti. An anomalous rise of the dielectric constant and a lowering of the leakage current in comparison to its subcomponents is a known phenomenon, observed for NbTaO, TaTiO, and Ta2O5– Nb2O5 nanolaminates [23–27]. One possible explanation is the high molar polarizability of Ti and Hf where intermixing can enlarge the dielectric constant of the deposited films [21,23,27]. We do not discuss this effect for HfTiO here as it would require a detailed chemical and structural study of the films which is beyond the scope of the present paper. Capacitance density versus voltage characteristics are plotted in Fig. 1b for the five layers Al2O3–HfTiO nanolaminates with Pt and Ti as gate electrodes. The structures were annealed in an O2 atmosphere at 450 °C for 10 min before the electrodes were
3. Results and discussion 3.1. C–V characteristics The effective dielectric constant is the actual dielectric constant of the film (kHigh-k) for a zero thickness IL. It is determined from the ratio of the physical thickness (neglecting quantum correction) tHigh-k and tCET — the capacitance effective thickness (determined from the accumulation capacitance of C– V characteristics), multiplied by the dielectric constant of SiO2 [8]. Fig. 1a shows keff for different physical thicknesses of as deposited HfTiO structures with Pt gate electrodes. The accumulation capacitance exhibited some dispersion at frequencies below 10 kHz and hence the C–V measurement was performed at a fixed frequency of 1 MHz. For a relatively thick, 65 nm film, keff was approximately 83. This value was reduced to 25.2 for a thinner, 6 nm film due to
Fig. 1. (a) As-deposited HfTiO relative dielectric constant dependence on the film thickness and (b) C–V characteristics of an Al2O3–HfTiO laminated stacks annealed at 450 °C in O2 for 10 min. Curve 1—Pt gate electrode; curve 2—Ti gate electrode.
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deposited. The flat band voltage (VFB) varied with annealing temperature in the ranges of 0.55 to 0.65 Vand − 0.405 to − 0.3 V respectively, for Pt and Ti gate electrodes. A clear offset of the C–V curve towards the negative voltage side is observed for the Ti top electrode relative to the Pt electrode. This stems from the difference in work functions which is about 1 eV [8,15,28] and is consistent with the flat band voltage shift (∼ 0.95 V). An initial hysteresis of about 30 mV for as-deposited films disappeared after low temperature annealing. The dependence of keff and the quantum mechanical corrected EOT (calculated from accumulation capacitances) on the annealing temperature are shown in Fig. 2a. The measured keff values for as deposited and low temperature annealed nanolaminate stacks are 22.5 and 21.7, respectively. keff is lower than that of HfTiO due to the ∼ 0.35–0.4 nm thick IL and the low dielectric constant of the Al2O3 sub layers. Using the simple series capacitance model and assuming tIL = 0 and dielectric constants of 8 and 110 for Al2O3 and HfTiO respectively, the estimated dielectric constant for the as deposited multilayer stack is 29, which is twice as large as previously demonstrated Al2O3–HfO2 nanolaminates [16–19].
Fig. 3. (a) J–E characteristics for different annealing temperature. Solid lines are for a Pt/Al2O3–HfTiO stack. Dash line is for Ti/Al2O3–HfTiO structure which is annealed at 450 °C in O2 for 10 min. (b) Experimental and calculated (dash line) J–E1/2 curves for a Pt/Al2O3–HfTiO structure annealed at 450 °C in O2 for 10 min.
The smallest EOT for both types of gate electrodes is of the order of 0.76 nm. It was obtained for as deposited films and for annealing at 450 °C for 10 min in an O2 atmosphere. The EOT increased to 1.82 nm after annealing at 950 °C for 5 min (see curve 2 in Fig. 2a). This increase is smaller however than that for single TiO2 and HfO2 films [7,8,29]. During 5 min anneal at 950 °C, the IL thickened to ∼2.0 nm and consequently, keff reduced to ∼ 10.7. The energy change of interfacial states density, determined using the Terman method, for structure with Pt and Ti electrodes, is shown in Fig. 2b. The results in Fig. 2b are a qualitative demonstration of how work function difference influences the energy distribution of the interfacial trap density. The difference in work functions of the used gate electrodes evidently leads to induction of surface charges at the semiconductor–insulator boundary with different densities and sings (reflecting in flat band voltage shift, which is proportional to net charge (sum of dielectric and interface charge densities)). Fig. 2. (a) EOT (curve 1) and keff (curve 2) of an Al2O3–HfTiO laminated stack versus annealing temperature and (b) interfacial state density characteristic determined by the Terman method of a Pt/Al2O3–HfTiO stacks annealed at 450 °C in O2 for 10 min. The values of the interfacial states density were calculated with error less than 15%.
3.2. J–E characteristics J–E curves of as deposited and annealed structures with Pt as gate electrodes are shown in Fig. 3a. The dash line describes the
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J–E characteristic for a structure with a Ti top contact which was annealed at 450 °C. Using a formalism described in [7,9], we show in Fig. 3b measured and calculated JSch versus E1/2 curves for Pt/Al2O3– HfTiO structures annealed at 450 °C. The calculated curve follows the linear dependence dictated by the Schottky law through most of the electric field range. The Schottky barrier heights (qΦSch) extracted from the experimental data is in the range of ∼ 0.865 to 0.91 eV. The value of the fitted dynamic dielectric constant is approximately 4.45 which is close to the square of the refractive index measured by ellipsometry. The dependences of the leakage current density (JL), measured at an electric field of − 1 MV/cm, on the annealing temperature is described in Fig. 4 (see also Fig. 3a). The annealing process causes a dramatic reduction of JL, from 3 × 10− 2 to 6.9 × 10− 9 and from 3.3 × 10− 1 to 1.6 × 10− 8 A/cm2, respectively for Pt and Ti top electrodes. The differences in JL due to the type of top electrode are larger in the as deposited and low temperature annealed cases where the larger barrier height of Pt plays a major role. High temperatures annealing process causes a filling of the oxygen vacancies [1], and the formation of an IL with a large band gap and conduction band offset on Si [30]. The IL adds a barrier between the Si substrate and the highk film. This barrier determines the, now reduced, leakages so that the difference between electrodes is somewhat diminished. The influence of the interfacial layer on the leakage current resembles its role in structures based on ultra thin Er2O3 and HfAlO films reported in [14,19]. Fig. 5 shows the leakage current density at a gate voltage Vg = (VFB − 1) as a function of EOT for structures with Pt and Ti gate electrodes. Compared to structures with Poly/SiO2 and HfN/HfO2 [31], the Pt/Al2O3–HfTiO stack offers, for the same EOT, a leakage current reduction by more than an order of five compared to Poly/SiO2 and by an order of magnitude compared to HfN/HfO2. The use of a Ti electrode in an Al2O3–HfTiO structure results, on the other hand, in poorer properties compared to a HfN/HfO2 stack. JL at different applied voltages: from Vg = −0.5 to −1.5 V, corresponding to the Schottky approximation and beyond, as a
Fig. 4. Leakage current density (at E = − 1 MV/cm) versus annealing temperature for an Al2O3–HfTiO laminated stack. Curve 1—Pt gate electrode; curve 2—Ti gate electrode.
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Fig. 5. Leakage current density at Vg = (VFB − 1)V versus EOT for Poly/SiO2, HfN/HfO2, Pt/Al2O3–HfTiO and Ti/Al2O3–HfTiO structures. For Al2O3– HfTiO stack the extracted values of EOT before and post-annealing are shown.
function of the reciprocal temperature is presented in Fig. 6 in a semi-logarithmic plot for Pt/Al2O3–HfTiO stack annealed at 450 °C in O2 for 10 min. The activation energy determined from the slope of curve 1 in Fig. 6 is 0.75 eV. The value of qΦSch = 0.916 eV coincides with the one extracted from the J–E characteristic (Fig. 3b). The small values of the activation energy at Vg = −1 and −1.5 V, respectively 0.46 and 0.24 eV (curves 2 and 3 in Fig. 6) can be explained by a trap assisted tunneling model [32] where electrons tunnel through the metal-dielectric surface states or through dielectric bulk traps. The effect of surface traps assisted current, together with tunneling through the bulk traps is found to be larger for the Ti electrode (which has a lower work function than Pt) with activation energies for JL of about 0.2 eV and 0.08 eV, at the low and high voltage ranges, respectively. Increasing the temperature to 413 K does not change the current transport mechanisms significantly and at 478 K an irreversible disruption of the structure is observed.
Fig. 6. Leakage current density as a function of inverse temperature for a Pt/ Al2O3–HfTiO stack annealed at 450 °C in O2 for 10 min. Curve 1—Vg = − 0.5 V; curve 2—Vg = − 1 V; curve 3—Vg = − 1.5 V.
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4. Conclusion In conclusion, we have demonstrated that Al2O3–HfTiO2 nanolaminates evaporated on unheated p-Si substrate exhibit: a low hysteresis, a dielectric constant which is more than twice as large as in HfAlO and also larger than for single HfO2 films. A leakage current density of the order of 1 × 10− 4 A/cm2 at 1.5 MV/cm for quantum mechanical corrected EOT of ∼ 0.76 nm was demonstrated for structures annealed up to 500 °C. The EOT increases by only ∼2.5 times after annealing at 950 °C for 5 min with a resulting leakage current density of about 1 × 10− 8 A/cm2 and an overall keff of 10.7. This keff value is almost twice as large as of a single TiO2 insulator of similar thickness [29] which was annealed under the same conditions. Avoiding the low dielectric constant IL formation during the annealing process, for example by the nitriditation of the Si substrate, may yield effective oxide thicknesses below 1 nm for structures annealed at temperatures above 500 °C. All these make the proposed multilayer stack a promising candidate as the insulator in future ultra large-scale integrated circuits, especially for low-power applications. References [1] C. Chaneliere, J.L. Autran, R.A.B. Devine, B. Balland, Mater. Sci. Eng. R22 (1998) 269. [2] P.C. Joshi, M.W. Cole, J. Appl. Phys. 86 (1999) 871. [3] V. Mikhelashvili, G. Eisenstein, Appl. Phys. Lett. 75 (1999) 2836. [4] H. Tang, K. Prasad, R. Sanjines, J.Appl. Phys. 75 (1994) 2042. [5] J. Yan, D.C. Gilmer, S.A. Campbel, W.L. Gladfelter, P.G. Schmid, J. Vac. Sci. Technol., B 14 (1996) 1706. [6] H.S. Kim, S.A. Campbel, D.S. Gilmer, V. Kaushik, J. Conner, L. Prabhu, A. Anderson, J Appl. Phys. 85 (1999) 3278. [7] V. Mikhelashvili, G. Eisenstein, J. Appl. Phys. 89 (2001) 3256. [8] G.D. Wilk, R.M. Wallace, J.M. Anthony, J. Appl. Phys. 89 (2001) 5243. [9] V. Mikhelashvili, Y. Betzer, I. Prudnikov, M. Orenshtein, D. Ritter, G. Eisenstein, J. Appl. Phys. 84 (1998) 6747. [10] A.C. Rastogi, R.N. Sharma, J. Appl. Phys. 71 (1992) 5041.
[11] J. Kwo, M. Hong, A.R. Kortan, K.L. Queeney, Y.J. Chabal, P. Mannaerts, T. Boone, J.J. Krajewski, A.M. Sergent, J.M. Rosamilia, Appl. Phys. Lett. 77 (2000) 130. [12] J. Kwo, M. Hong, A.R. Kortan, K.L. Queeney, Y.J. Chabal, R.L. Opila Jr., D.A. Muller, S.N.G. Chu, B.J. Sapjeta, T.S. Lay, J.P. Mannaerts, T. Boone, H.W. Krautter, J.J. Krajewski, A.M. Sergent, J.M. Rosamilia, J. Appl. Phys. 89 (2001) 3920. [13] V. Mikhelashvili, G. Eisenstein, F. Edelman, J. Appl. Phys. 90 (2001) 5447. [14] V. Mikhelashvili, G. Eisenstein, F. Edelman, R. Brener, N. Zakharov, P. Werner, J. Appl. Phys. 95 (2004) 613. [15] J. Robertson, J. Vac. Sci. Technol., B 18 (2000) 1785. [16] H.Y. Yu, M.F. Li, B.J. Cho, C.C. Yeo, M.S. Joo, D.L. Kwong, J.S. Oan, C.H. Ang, J.Z. Zheng, S. Ramanathan, Appl. Phys. Lett. 81 (2002) 376. [17] M.-H. Cho, Y.S. Roh, C.N. Whang, K. Jeong, H.J. Choi, S.W. Nam, D.-H. Ko, J.H. Lee, N.I. Lee, K. Fujihara, Appl. Phys. Lett. 81 (2002) 1071. [18] M.S. Joo, B.J. Cho, C.C. Yeo, D.S.H. Chan, S.J. Whoang, S. Mathew, L.K. Bera, N. Balasubramanian, D. Kwong, IEEE Trans. Electron Devices 50 (2003) 2088. [19] V. Mikhelashvili, R. Brener, O. Kreinin, B. Meyler, J. Shneider, G. Eisenstein, Appl. Phys. Lett. 85 (2004) 5950. [20] V.V. Afanas'ev, A. Stesmans, F. Chen, M. Li, S.A. Campbell, J. Appl. Phys. 95 (2004) 7936. [21] N. Lu, H.-J. Li, M. Gardner, S. Wiskramanyaka, D.-L. Kwong, IEEE Electron Device Lett. 26 (2005) 298. [22] W. Kern, J. Electrochem. Soc. 137 (1990) 1887. [23] R.J. Cava, W.F. Peck Jr, J.J. Krajewski, Nature 377 (1995) 215 (London). [24] J.-Y. Gan, Y.C. Chang, Appl. Phys. Lett. 72 (1998) 332. [25] A. Cappellani, J.L. Keddie, N.P. Barradaa, S.M. Jackson, Solid State Electron 43 (1999) 1095. [26] R.J. Cava, W.F. Peck Jr, J.J. Krajewski, G.L. Roberts, Mater. Res. Bull. 31 (1996) 295. [27] K. Kukli, M. Ritala, M. Leskela, J. Appl. Phys. 86 (1999) 5656. [28] S.M. Sze, Physics of Semiconductor Devices, 2nd ed., Wiley, New York, 1981. [29] V. Mikhelashvili, G. Eisenstein, Thin Solid Films 515 (2006) 346. [30] E.M. Vogel, K.Z. Ahmed, B. Hornung, W.K. Henson, P.K. McLarty, G. Lucovsky, J.R. Hauser, IEEE Trans. Electron Devices 45 (1998) 1350. [31] H.Y. Yu, M.-F. Li, D.-L. Kwong, IEEE Trans. Electron Devices 51 (2004) 609. [32] C. Svensson, I. Lundstrom, J. Appl. Phys. 44 (1973) 4657.
Electrical properties of Al2O3–HfTiO laminate gate dielectric stacks with an equivalent oxide thickness below 0.8 nm V. Mikhelashvili ⁎, G. Eisenstein Department of Electrical Engineering, Technion-Israel Institute of Technology, Haifa 3200, Israel Received 10 October 2005; received in revised form 18 April 2006; accepted 7 September 2006 Available online 31 October 2006
Abstract We report high quality nanolaminate films consisting of five Al2O3–HfTiO layers with a dielectric constant of about 29. The dielectric stack was deposited on unheated p-Si substrate from Al2O3 and 1HfO2/1TiO2 targets using an electron beam gun evaporation system without addition of oxygen. A dielectric constant for a thick HfTiO film of about 83 was also demonstrated. The electrical characteristics of as deposited structures and ones which were annealed for 5–10 min in an O2 atmosphere at up to 950 °C were investigated. Two types of gate electrodes: Pt and Ti were compared. The dielectric stack which was annealed up to 500 °C exhibits a leakage current density as small as ∼ 1 × 10− 4 A/cm2 at an electric of field 1.5 MV/cm for a quantum mechanical corrected equivalent oxide thickness of ∼ 0.76 nm. These values change to ∼ 1 × 10− 8 A/cm2 and 1.82 nm respectively, after annealing at 950 °C for 5 min. © 2006 Elsevier B.V. All rights reserved. Keywords: Thin dielectric films; Electron beam gun deposition; Electrical characterization; Leakage current
1. Introduction Single metal oxide films such as Ta2O5 [1–3], TiO2 [4–7], HfO2, ZrO2 [8], Y2O3 [9,10], Gd2O3 [11,12] and Er2O3 [13,14], all with large dielectric constants (high-k dielectrics), have been intensively studied in the past few years as potential substitute for SiO 2 in complimentary metal-oxide-semiconductor (CMOS) devices. Two major factors limit the use of single metal oxides in MOS structures: large leakage currents and thermal instability. All metal oxides have low band gaps and conduction band offsets with Si [8,15] (the exception being Al2O3 having a band gap 8.8 eV and a conduction band offset of ∼ 2.8 eV). This introduces a particular class of electron leakages into the band states of the films. Slight deviations in stoichiometry, and in particular oxygen vacancies, increase the leakage currents. Post deposition, high temperature annealing in an O2 atmosphere is therefore vital. However, the metal oxides tend to crystallize at relatively low temperatures and hence form grain
⁎ Corresponding author. E-mail address: [email protected] (V. Mikhelashvili). 0040-6090/$ - see front matter © 2006 Elsevier B.V. All rights reserved. doi:10.1016/j.tsf.2006.09.008
boundaries and interfacial silicids. These cause in turn significant increases of the leakage current density. Nanolaminates based on HfO2–Al2O3 or their alloys have been shown to reduce leakages [16–19] without a measurable change in the effective dielectric constant (keff). The incorporation of Al2O3, whose dielectric constant is low (k ∼7–9), results in a low overall keff value for the multilayer dielectric stacks, down to 9–14 which is less then that of pure HfO2 (∼ 20–25) [8]. This reduction hinders the main objective of using high-k gate dielectrics since it prevents scaling of the Equivalent Oxide Thickness (EOT) to the sub-nanometer regime, where large leakage currents are a major problem, mainly for low-power applications. Binary and ternary metal oxides such as HfTiO and Hf TiTaO, with keff values of 40–60 have also been studied recently [20,21] as alternatives to HfO2. However, these have rather large leakage current densities (higher than 2–3 × 10− 2 A/ cm2) which limit the achievable EOT to 1.47 and 1.14 nm respectively, for HfTiO and HfTiTaO [21]. In this work we propose an alternative multilayer nanolaminate stack which is based on Al2O3–Hf TiO layers. This structure combines the best properties of its components: a high band gap
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and conduction band offsets with Si, contributed by the Al2O3 together with the high dielectric constant of HfTiO. We show that the incorporation of an Al2O3 sub-layer does not reduce the value of keff significantly. Structures which were annealed at up to 450– 500 °C yield an EOT of less than 0.8 nm with a leakage current density of ∼1 × 10− 4 A/cm2 at an applied field of 1.5 MV/cm. We used Electron Beam Gun system to deposit the films at room temperature without incorporation of any additional oxygen. The low temperature process reduces the background oxygen reaction at the Si surface and the growth of SiO2 interfacial layers (IL). Such IL is a major cause for the lowering of the relative dielectric constant of ultra thin high-k insulators. 2. Experimental procedure A p-type (100) Silicon wafer (ρ = 10–20 Ω cm) was used as the substrate. It was cleaned by the standard RCA cleaning process [22] and dipped in dilute HF to eliminate the native oxide on its surface. It was subsequently inserted into a vacuum chamber which was evacuated before deposition to 4– 6 × 10− 6 Pa. The structure we studied comprised a five layer Al2O3–HfTiO–Al2O3–HfTiO–Al2O3 nanolaminate stack with total thickness of about 6 nm. The physical thickness of the Al2O3 and HfTiO sub layers were respectively, 0.4 and 2.4 nm. The films were deposited at a pressure of 4 × 10− 4 Pa at a growth rate of 0.01 nm/s. We also prepared single HfTiO films which were deposited from an alloy target with a composition ∼ 1HfO2/1TiO2. A shadow mask was used to form the top Pt or Ti electrodes and Al was used as a back contact. Typical capacitor areas were 2–5 × 10− 5 cm2. The size of the electrodes was measured using an optical microscope. All electrodes were evaporated by an electron beam gun with no substrate heating. Thermal Annealing was carried out in an oxygen environment at up to 950 °C for 5–10 min. The thickness and refractive index (to be 2.2–2.35) of the HfTiO film were determined by ellipsometry. Capacitance–voltage (C–V) and current–electric field (J–E) measurements were performed using standard techniques and instruments. All the electrical measurements were carried out at temperatures ranging from 295 to 478 K.
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an IL with a low dielectric constant (kIL = 3.9). The keff value was determined from a series double layer capacitance model as keff = kILtHigh-k/(tCET − tIL). Assuming an IL with tIL = 0.7 nm and kIL = 3.9 and using the data of Fig. 1a, the actual value of dielectric constant of HfTiO of 100–110 is estimated. The same dielectric constant was obtained from capacitance measurements of a Metal–Insulator–Metal, Pt–HfTiO–Pt capacitor where the IL is naturally absent. The calculated value of keff for the thick films is larger than the one measured in [20,21] for a low ratio of Hf to Ti. An anomalous rise of the dielectric constant and a lowering of the leakage current in comparison to its subcomponents is a known phenomenon, observed for NbTaO, TaTiO, and Ta2O5– Nb2O5 nanolaminates [23–27]. One possible explanation is the high molar polarizability of Ti and Hf where intermixing can enlarge the dielectric constant of the deposited films [21,23,27]. We do not discuss this effect for HfTiO here as it would require a detailed chemical and structural study of the films which is beyond the scope of the present paper. Capacitance density versus voltage characteristics are plotted in Fig. 1b for the five layers Al2O3–HfTiO nanolaminates with Pt and Ti as gate electrodes. The structures were annealed in an O2 atmosphere at 450 °C for 10 min before the electrodes were
3. Results and discussion 3.1. C–V characteristics The effective dielectric constant is the actual dielectric constant of the film (kHigh-k) for a zero thickness IL. It is determined from the ratio of the physical thickness (neglecting quantum correction) tHigh-k and tCET — the capacitance effective thickness (determined from the accumulation capacitance of C– V characteristics), multiplied by the dielectric constant of SiO2 [8]. Fig. 1a shows keff for different physical thicknesses of as deposited HfTiO structures with Pt gate electrodes. The accumulation capacitance exhibited some dispersion at frequencies below 10 kHz and hence the C–V measurement was performed at a fixed frequency of 1 MHz. For a relatively thick, 65 nm film, keff was approximately 83. This value was reduced to 25.2 for a thinner, 6 nm film due to
Fig. 1. (a) As-deposited HfTiO relative dielectric constant dependence on the film thickness and (b) C–V characteristics of an Al2O3–HfTiO laminated stacks annealed at 450 °C in O2 for 10 min. Curve 1—Pt gate electrode; curve 2—Ti gate electrode.
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deposited. The flat band voltage (VFB) varied with annealing temperature in the ranges of 0.55 to 0.65 Vand − 0.405 to − 0.3 V respectively, for Pt and Ti gate electrodes. A clear offset of the C–V curve towards the negative voltage side is observed for the Ti top electrode relative to the Pt electrode. This stems from the difference in work functions which is about 1 eV [8,15,28] and is consistent with the flat band voltage shift (∼ 0.95 V). An initial hysteresis of about 30 mV for as-deposited films disappeared after low temperature annealing. The dependence of keff and the quantum mechanical corrected EOT (calculated from accumulation capacitances) on the annealing temperature are shown in Fig. 2a. The measured keff values for as deposited and low temperature annealed nanolaminate stacks are 22.5 and 21.7, respectively. keff is lower than that of HfTiO due to the ∼ 0.35–0.4 nm thick IL and the low dielectric constant of the Al2O3 sub layers. Using the simple series capacitance model and assuming tIL = 0 and dielectric constants of 8 and 110 for Al2O3 and HfTiO respectively, the estimated dielectric constant for the as deposited multilayer stack is 29, which is twice as large as previously demonstrated Al2O3–HfO2 nanolaminates [16–19].
Fig. 3. (a) J–E characteristics for different annealing temperature. Solid lines are for a Pt/Al2O3–HfTiO stack. Dash line is for Ti/Al2O3–HfTiO structure which is annealed at 450 °C in O2 for 10 min. (b) Experimental and calculated (dash line) J–E1/2 curves for a Pt/Al2O3–HfTiO structure annealed at 450 °C in O2 for 10 min.
The smallest EOT for both types of gate electrodes is of the order of 0.76 nm. It was obtained for as deposited films and for annealing at 450 °C for 10 min in an O2 atmosphere. The EOT increased to 1.82 nm after annealing at 950 °C for 5 min (see curve 2 in Fig. 2a). This increase is smaller however than that for single TiO2 and HfO2 films [7,8,29]. During 5 min anneal at 950 °C, the IL thickened to ∼2.0 nm and consequently, keff reduced to ∼ 10.7. The energy change of interfacial states density, determined using the Terman method, for structure with Pt and Ti electrodes, is shown in Fig. 2b. The results in Fig. 2b are a qualitative demonstration of how work function difference influences the energy distribution of the interfacial trap density. The difference in work functions of the used gate electrodes evidently leads to induction of surface charges at the semiconductor–insulator boundary with different densities and sings (reflecting in flat band voltage shift, which is proportional to net charge (sum of dielectric and interface charge densities)). Fig. 2. (a) EOT (curve 1) and keff (curve 2) of an Al2O3–HfTiO laminated stack versus annealing temperature and (b) interfacial state density characteristic determined by the Terman method of a Pt/Al2O3–HfTiO stacks annealed at 450 °C in O2 for 10 min. The values of the interfacial states density were calculated with error less than 15%.
3.2. J–E characteristics J–E curves of as deposited and annealed structures with Pt as gate electrodes are shown in Fig. 3a. The dash line describes the
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J–E characteristic for a structure with a Ti top contact which was annealed at 450 °C. Using a formalism described in [7,9], we show in Fig. 3b measured and calculated JSch versus E1/2 curves for Pt/Al2O3– HfTiO structures annealed at 450 °C. The calculated curve follows the linear dependence dictated by the Schottky law through most of the electric field range. The Schottky barrier heights (qΦSch) extracted from the experimental data is in the range of ∼ 0.865 to 0.91 eV. The value of the fitted dynamic dielectric constant is approximately 4.45 which is close to the square of the refractive index measured by ellipsometry. The dependences of the leakage current density (JL), measured at an electric field of − 1 MV/cm, on the annealing temperature is described in Fig. 4 (see also Fig. 3a). The annealing process causes a dramatic reduction of JL, from 3 × 10− 2 to 6.9 × 10− 9 and from 3.3 × 10− 1 to 1.6 × 10− 8 A/cm2, respectively for Pt and Ti top electrodes. The differences in JL due to the type of top electrode are larger in the as deposited and low temperature annealed cases where the larger barrier height of Pt plays a major role. High temperatures annealing process causes a filling of the oxygen vacancies [1], and the formation of an IL with a large band gap and conduction band offset on Si [30]. The IL adds a barrier between the Si substrate and the highk film. This barrier determines the, now reduced, leakages so that the difference between electrodes is somewhat diminished. The influence of the interfacial layer on the leakage current resembles its role in structures based on ultra thin Er2O3 and HfAlO films reported in [14,19]. Fig. 5 shows the leakage current density at a gate voltage Vg = (VFB − 1) as a function of EOT for structures with Pt and Ti gate electrodes. Compared to structures with Poly/SiO2 and HfN/HfO2 [31], the Pt/Al2O3–HfTiO stack offers, for the same EOT, a leakage current reduction by more than an order of five compared to Poly/SiO2 and by an order of magnitude compared to HfN/HfO2. The use of a Ti electrode in an Al2O3–HfTiO structure results, on the other hand, in poorer properties compared to a HfN/HfO2 stack. JL at different applied voltages: from Vg = −0.5 to −1.5 V, corresponding to the Schottky approximation and beyond, as a
Fig. 4. Leakage current density (at E = − 1 MV/cm) versus annealing temperature for an Al2O3–HfTiO laminated stack. Curve 1—Pt gate electrode; curve 2—Ti gate electrode.
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Fig. 5. Leakage current density at Vg = (VFB − 1)V versus EOT for Poly/SiO2, HfN/HfO2, Pt/Al2O3–HfTiO and Ti/Al2O3–HfTiO structures. For Al2O3– HfTiO stack the extracted values of EOT before and post-annealing are shown.
function of the reciprocal temperature is presented in Fig. 6 in a semi-logarithmic plot for Pt/Al2O3–HfTiO stack annealed at 450 °C in O2 for 10 min. The activation energy determined from the slope of curve 1 in Fig. 6 is 0.75 eV. The value of qΦSch = 0.916 eV coincides with the one extracted from the J–E characteristic (Fig. 3b). The small values of the activation energy at Vg = −1 and −1.5 V, respectively 0.46 and 0.24 eV (curves 2 and 3 in Fig. 6) can be explained by a trap assisted tunneling model [32] where electrons tunnel through the metal-dielectric surface states or through dielectric bulk traps. The effect of surface traps assisted current, together with tunneling through the bulk traps is found to be larger for the Ti electrode (which has a lower work function than Pt) with activation energies for JL of about 0.2 eV and 0.08 eV, at the low and high voltage ranges, respectively. Increasing the temperature to 413 K does not change the current transport mechanisms significantly and at 478 K an irreversible disruption of the structure is observed.
Fig. 6. Leakage current density as a function of inverse temperature for a Pt/ Al2O3–HfTiO stack annealed at 450 °C in O2 for 10 min. Curve 1—Vg = − 0.5 V; curve 2—Vg = − 1 V; curve 3—Vg = − 1.5 V.
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4. Conclusion In conclusion, we have demonstrated that Al2O3–HfTiO2 nanolaminates evaporated on unheated p-Si substrate exhibit: a low hysteresis, a dielectric constant which is more than twice as large as in HfAlO and also larger than for single HfO2 films. A leakage current density of the order of 1 × 10− 4 A/cm2 at 1.5 MV/cm for quantum mechanical corrected EOT of ∼ 0.76 nm was demonstrated for structures annealed up to 500 °C. The EOT increases by only ∼2.5 times after annealing at 950 °C for 5 min with a resulting leakage current density of about 1 × 10− 8 A/cm2 and an overall keff of 10.7. This keff value is almost twice as large as of a single TiO2 insulator of similar thickness [29] which was annealed under the same conditions. Avoiding the low dielectric constant IL formation during the annealing process, for example by the nitriditation of the Si substrate, may yield effective oxide thicknesses below 1 nm for structures annealed at temperatures above 500 °C. All these make the proposed multilayer stack a promising candidate as the insulator in future ultra large-scale integrated circuits, especially for low-power applications. References [1] C. Chaneliere, J.L. Autran, R.A.B. Devine, B. Balland, Mater. Sci. Eng. R22 (1998) 269. [2] P.C. Joshi, M.W. Cole, J. Appl. Phys. 86 (1999) 871. [3] V. Mikhelashvili, G. Eisenstein, Appl. Phys. Lett. 75 (1999) 2836. [4] H. Tang, K. Prasad, R. Sanjines, J.Appl. Phys. 75 (1994) 2042. [5] J. Yan, D.C. Gilmer, S.A. Campbel, W.L. Gladfelter, P.G. Schmid, J. Vac. Sci. Technol., B 14 (1996) 1706. [6] H.S. Kim, S.A. Campbel, D.S. Gilmer, V. Kaushik, J. Conner, L. Prabhu, A. Anderson, J Appl. Phys. 85 (1999) 3278. [7] V. Mikhelashvili, G. Eisenstein, J. Appl. Phys. 89 (2001) 3256. [8] G.D. Wilk, R.M. Wallace, J.M. Anthony, J. Appl. Phys. 89 (2001) 5243. [9] V. Mikhelashvili, Y. Betzer, I. Prudnikov, M. Orenshtein, D. Ritter, G. Eisenstein, J. Appl. Phys. 84 (1998) 6747. [10] A.C. Rastogi, R.N. Sharma, J. Appl. Phys. 71 (1992) 5041.
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