Evaluation of Y2O3 gate insulators for a-IGZO thin film transistors

Evaluation of Y2O3 gate insulators for a-IGZO thin film transistors

Thin Solid Films 517 (2009) 4115–4118 Contents lists available at ScienceDirect Thin Solid Films j o u r n a l h o m e p a g e : w w w. e l s ev i e...

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Thin Solid Films 517 (2009) 4115–4118

Contents lists available at ScienceDirect

Thin Solid Films j o u r n a l h o m e p a g e : w w w. e l s ev i e r. c o m / l o c a t e / t s f

Evaluation of Y2O3 gate insulators for a-IGZO thin film transistors Young-Je Cho a, Ji-Hoon Shin b, S.M. Bobade a, Young-Bae Kim c, Duck-Kyun Choi a,⁎ a b c

Department of Materials Science and Engineering, Hanyang University, Seoul 133-791, Republic of Korea Department of Information Display Engineering, Hanyang University, Seoul 133-791, Republic of Korea Information Display Research Institute, Hanyang University, Seoul 133-791, Republic of Korea

a r t i c l e

i n f o

Available online 11 February 2009 Keywords: Gate oxide TTFT (transparent thin film transistor) Leakage current Y2O3 a-IGZO

a b s t r a c t In this work, Y2O3 was evaluated as a gate insulator for thin film transistors fabricated using an amorphous InGaZnO4 (a-IGZO) active layer. The properties of Y2O3 were examined as a function of various processing parameters including plasma power, chamber gas conditions, and working pressure. The leakage current density for the Y2O3 film prepared under the optimum conditions was observed to be ~ 3.5 × 10− 9 A/cm2 at an electric field of 1 MV/cm. The RMS roughness of the Y2O3 film was improved from 1.6 nm to 0.8 nm by employing an ALD (Atomic Layer Deposition) HfO2 underlayer. Using the optimized Y2O3 deposition conditions, thin film transistors (TFTs) were fabricated on a glass substrate. The important TFT device parameters of the on/off current ratio, sub-threshold swing, threshold voltage, and electric field mobility were measured to be 7.0 × 107, 0.18 V/dec, 1.1 V, and 3.3 cm2/Vs, respectively. The stacked insulator consisting of Y2O3/HfO2 was highly effective in enhancing the device properties. © 2009 Elsevier B.V. All rights reserved.

1. Introduction Recently, the display market has experienced accelerated growth among harsh competition. Oxide TFTs are emerging devices that exhibit higher mobility compared to amorphous silicon transistors or organic transistors, as well as being optically transparent [1–3]. Furthermore, high quality film deposition is possible at room temperature. Therefore, oxide TFTs are appropriate for OLEDs [4] and flexible displays [5] which demand a low deposition temperature and relatively high mobility. Among oxide TFTs, ZnO-based TFTs have attracted much attention for flexible display applications because highly uniform, large-area displays can be fabricated on plastic substrates at low temperature, resulting in low production cost. However, ZnO-based TFTs suffer from solvent attack and low electric field mobility in spite of their polycrystalline phase. Hosono reported fabrication of high performance TFTs with Ga and In-doped amorphous ZnO (a-IGZO) channel layers deposited by PVD (physical vapor deposition) to overcome the above drawbacks [6–7]. The TFTs in Hosono's studies showed a higher mobility of 10 cm2/Vs and an excellent subthreshold gate swing (S) of 0.20 V/decade as compared to those with a polycrystalline ZnO channel. In addition, a-IGZO is not susceptible to solvent attack. Apart from the active layer material, the insulating material is of great importance for high performance TFTs. A good insulator provides low leakage current, high breakdown voltage, and has a high dielectric constant. A low leakage current and a high breakdown

⁎ Corresponding author. Tel.: +82 2 2220 0506; fax: +82 2 2299 7148. E-mail address: [email protected] (D.-K. Choi). 0040-6090/$ – see front matter © 2009 Elsevier B.V. All rights reserved. doi:10.1016/j.tsf.2009.02.020

voltage contribute to the stability of the TFTs, while a high dielectric constant provides a fast sub-threshold swing (SS) and low threshold voltage (Vth). Furthermore, from a cost perspective, it is advantageous for the device to operate at a low voltage. The development of a proper gate insulator enables us to satisfy the aforementioned specifications. In this study, we focused on Y2O3 which is a promising candidate for use as a gate insulator since it is a low leakage current material [8] with good thermal and chemical stability capable of exhibiting a high breakdown voltage [9]. Therefore, the electrical properties of the Y2O3 film itself were evaluated under various process conditions, and the performance of a Y2O3/a-IGZO TFT was examined to confirm the expected performance of Y2O3. 2. Experimental 2.1. MIM (Metal-Insulator-Metal) Y2O3 was deposited under various processing parameters by changing the plasma power, the chamber gas conditions, and the working pressure of the sputtering system used for deposition at room temperature. The electrical properties of the Y2O3 thin film were evaluated using a MIM (Metal-Insulator-Metal) structure. For this structure, Pt (150 nm)/Ti (10 nm)/SiO2 (300 nm)/Si (111) was used as the bottom electrode and substrate, while aluminum (100 nm) was selected as the upper electrode. The Y2O3 thickness was 150 nm in the Al/Y2O3/Pt wafer and 140 nm in the Al/HfO2/Y2O3/Pt wafer in order to maintain the same physical thickness of the gate insulator. In the Al/HfO2/Y2O3/Pt stacked structure, HfO2 (10 nm) was deposited by ALD at 350 °C. The reference insulator SiO2 (150 nm) was deposited by PECVD (Plasma Enhanced Chemical Vapor Deposition) at 250 °C.

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2.2. Oxide TFTs (Thin Film Transistor) The bottom gate structure of an oxide TFT was fabricated on a glass substrate using sputtered Mo as the metal gate. An insulating layer of Y2O3 was deposited by RF sputtering under the following optimized deposition conditions: a plasma power of 120 W, an Ar:O2 gas ratio of 1:1, and a processing chamber working pressure of about 5 mtorr. To produce a stacked gate insulating structure, 10 nm thick HfO2 was deposited by ALD before the deposition of the Y2O3. The amorphous IGZO active layer was deposited by RF sputtering using a plasma power of 40 W, an Ar to O2 gas ratio of 9:1, and a working pressure of 4 mtorr. This was followed by the source and drain Mo electrode deposition. All the patterning processes, except defining the source and drain, were done using a shadow mask. The source and drain (W/L = 50/43 um) were patterned by the lift-off method. Finally, the fabricated oxide TFTs were subjected to an annealing process at 400 °C for 1 h. Fig. 1 shows the schematic cross sectional view of the a-IGZO TFT. 3. Results and discussion 3.1. Gate insulator The electrical properties and surface morphologies of Y2O3 for various processing conditions are listed in Table 1. The various setting of experiments exhibits a variation in RMS roughness of Y2O3 deposited on the Molybdenum bottom electrode. The surface roughness of bottom electrode during deposition could be also reflected in the deposited film surface morphology. In our deposition condition, the overall roughness is most likely decided by the roughness of the molybdenum because the Y2O3 is more plasma-resistant than Molybdenum. In addition, the surface roughness generally increases with the deposition rate. In our experiment, the RMS roughness values for the samples processed under various conditions follow such a general behavior as presented in Table 1. However, relatively fast passivation of the Mo surface as a result of high deposition rate or the high oxygen concentration in the plasma atmosphere seems to reduce the overall surface roughness [10,11]. The optimum setting of 120 W RF power, Ar:O2 gas ratio of 1:1 and 5 mtorr working pressure are obtained. Further, the optimum conditions are derived from the minimum RMS roughness, highest breakdown voltage, and leakage current density for MIM capacitor. The optimum condition was selected as that having the lowest leakage current density and the highest breakdown voltage. Y2O3 exhibited good stability due to its high bonding energy. The standard free energy of formation of Y2O3 is relatively large

Fig. 1. Schematic cross section of an a-IGZO TFT.

Table 1 The effect of the process parameter on leakage current density, breakdown voltage, and surface roughness of the Y2O3 thin film.

Power (W)

Gas (Ar:O2)

Pressure (mtorr)

120 90 60 3:1 1:1 2:3 7 5 3

Leakage current density (A/cm2) at 1 MV/cm

Break down voltage (MV/cm)

RMS (nm)

1.2 × 10− 8 6.4 × 10− 8 1.2 × 10− 8 5.0 × 10− 8 6.7 × 10− 9 1.2 × 10− 8 5.0 × 10− 8 7.3 × 10− 9 6.4 × 10− 8

4N 2.3 2.5 2.3 2.6 2.2 2.5 2.6 3.0

3.9 6.0 3.9 6.0 2.3 4.2 6.0 2.5 2.8

(− 1,075.0 kJ/mol) and therefore, high plasma power or a long deposition time is required. However, such extreme deposition conditions can damage the specimen, particularly the surface of the Y2O3 film, causing increased leakage current. In fact, the leakage current values shown in Table 1 can be well correlated to the RMS roughness values of the films. The leakage current densities of Y2O3 (150 nm) deposited under the optimum conditions and that of SiO2 (150 nm) deposited by PECVD at 250 °C are compared in Fig. 2. The leakage current density of Y2O3 (~3.5 × 10− 9 A/cm2) turned out to be significantly lower than that of SiO2 (1.0 × 10− 7 A/cm2) at 1 MV/cm. In addition, the capacitance–voltage (CV) measurements revealed that the relative dielectric constant of Y2O3 is 16, which is four times higher than that of SiO2. As such, the Y2O3 insulator deposited at room temperature has superior electrical properties compared to PECVD SiO2 deposited at 250 °C. 3.2. Surface roughness The surface roughness of an insulator can directly affect the interface between the insulator and semiconductor in bottom gate structure transistors. Moreover, the interface affects the field effect mobility and the leakage current of the devices. Hence, it is essential to reduce the roughness of the Y2O3 film. Direct deposition of Y2O3 on the Mo bottom gate electrode causes damage to the surface of the Mo electrode due to the deposition conditions which, in turn, negatively impacts the surface morphology of the Y2O3. This issue can be avoided by depositing an HfO2 layer before the Y2O3 deposition. The reduction in the RMS roughness shown in Fig. 3

Fig. 2. Leakage current density of optimized Y2O3 and 250 °C PECVD SiO2 (inset shows the dielectric constant).

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Fig. 3. Comparison of the RMS values of the Y2O3 single layer and HfO2/Y2O3 double layer surfaces.

justifies this approach, where the RMS roughness value of the Y2O3 film deposited on HfO2 decreased from 1.6 nm to 0.8 nm. The leakage current densities of the HfO2 (10 nm)/Y2O3 (140 nm), Y2O3 (150 nm), and SiO2 (150 nm) films are presented in Fig. 4. As seen in Fig. 4, the deposition of HfO2 prior to Y2O3 deposition clearly improves the leakage current density.

3.3. Oxide TFTs Fig. 5 shows the transfer curves of the TFTs consisting of a HfO2/ Y2O3 stacked insulator and a Y2O3 single layer insulator. The width and length of the channel are 50 and 43 μm, respectively, and the drain voltage (Vds) is 1.1 V since the TFT does not operate at 0 V, as it is an enhancement mode device. A comparison of the TFT parameters is provided in Table 2. The HfO2/Y2O3 oxide TFT demonstrates a better on/off ratio and a smaller SS (subthreshold swing) than the Y2O3 oxide TFT. The device parameters obtained from the HfO2/Y2O3 oxide TFT include a subthreshold swing (SS) of 0.18 V/dec, a threshold voltage (Vth) of 1.1 V, and an electric field mobility (μFE) of 3.3 cm2/Vs. The on current and off current are 1.57 × 10− 6 A and 2.25 × 10− 14 A, respectively, giving an on/off current ratio of approximately 7 × 107. The improvement of the off-current level in the stacked structure comes from the reduction of HfO2/Y2O3 insulator surface roughness while the improvement in the subthreshold swing (SS) seems to be due to the slightly higher dielectric constant of HfO2/Y2O3 (18) compared to Y2O3 (16). In the Y2O3 oxide TFT, the higher off-current implies insufficient depletion of carriers in the channel. Because the Y2O3 oxide TFT also induced a higher on-current, a slightly higher electric field mobility compared to the HfO2/Y2O3 oxide TFT was obtained. 4. Conclusions

Fig. 4. Leakage current densities of SiO2 (150 nm), Y2O3 (150 nm), and HfO2 (10 nm)/ Y2O3 (140 nm).

Y2O3 was evaluated as a gate insulator for thin film transistors. Y2O3 films deposited at room temperature showed a breakdown strength of over 3 MV/cm, a better leakage current density than SiO2, and a dielectric constant four times higher than SiO2. However, plasma damage sustained on the bottom electrode during Y2O3 deposition affected the properties of the Y2O3 film itself. By employing an HfO2 smoothing layer before the deposition of Y2O3, not only was the insulator RMS roughness reduced from 1.6 nm to 0.8 nm, but the electrical properties of the Y2O3 film were also improved. The oxide TFTs having a HfO2/Y2O3 stacked insulator showed considerably enhanced device properties. As a consequence, we demonstrated the feasibility of applying a high-k Y2O3 insulating material to fast switching and low voltage operating TFTs.

Table 2 Important transistor parameters for the Y2O3/a-IGZO and HfO2/Y2O3/a-IGZO MOSFET. Insulator

Fig. 5. Transfer curves of the Y2O3/a-IGZO and HfO2/Y2O3/a-IGZO MOSFET.

Y2O3 HfO2/Y2O3

On/off ratio 6

1.1 × 10 7 × 107

SS (V/dec)

Vth (V)

μFE (cm2/Vs)

0.3 0.18

0.7 1.1

~ 6.9 ~ 3.3

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Acknowledgements This work was supported by a Korea Science and Engineering Foundation grant funded by the Ministry of Education, Science, and Technology (No. R11-2005-048-00000-0, SRC/ERC Program, CMPS) and the Information Display R&D Center grant funded by the Ministry of Knowledge Economy (No. F0004111, the 21st Century Frontier R&D Program) of the Korean Government. References [1] S. Masuda, et al., J. Appl. Phys. 93 (2003) 1624. [2] R.L. Hoffman, et al., Appl. Phys. Lett. 82 (2003) 733.

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