Flexible low-temperature polycrystalline silicon thin-film transistors

Flexible low-temperature polycrystalline silicon thin-film transistors

Materials Today Advances 5 (2020) 100040 Contents lists available at ScienceDirect Materials Today Advances journal homepage: www.journals.elsevier...

4MB Sizes 0 Downloads 98 Views

Materials Today Advances 5 (2020) 100040

Contents lists available at ScienceDirect

Materials Today Advances journal homepage: www.journals.elsevier.com/materials-today-advances/

Flexible low-temperature polycrystalline silicon thin-film transistors T.-C. Chang a, *, Y.-C. Tsao a, P.-H. Chen b, e, M.-C. Tai c, S.-P. Huang c, W.-C. Su d, G.-F. Chen a a

Department of Physics, National Sun Yat-Sen University, 70 Lien-hai Road, Kaohsiung, 804, Taiwan Department of Applied Science, R.O.C. Naval Academy, Kaohsiung, 813, Taiwan c Department of Photonics, National Sun Yat-Sen University, Kaohsiung, Taiwan d Department of Materials and Optoelectronic Science, National Sun Yat-Sen University, Kaohsiung, Taiwan e Center for Nanoscience and Nanotechnology, National Sun Yat-Sen University, Kaohsiung 804, Taiwan b

a r t i c l e i n f o

a b s t r a c t

Article history: Received 30 August 2019 Received in revised form 21 November 2019 Accepted 22 November 2019 Available online xxx

In today's society, displays are indispensable for digital interaction and personal contact. Therefore, the development of displays is an urgent need for the next generation. Leading the commercialization trends is the development of industrial, high-resolution, portable, and multifunctional displays. Moreover, for small-size portable displays, the most critical factor affecting future applications is their flexibility. Among the various materials that can act as the channel layer, low-temperature polycrystalline silicon (LTPS) is a potential candidate for next-generation portable displays, which require high resolution and stable reliability, and which can achieve virtual reality applications. This article is a review of the development of the LTPS thin-film transistors (TFTs) on soft and flexible electronics, especially the effect of mechanical strain. This article starts by providing an overview of the difficulties in fabricating LTPS TFTs on flexible substrates. The physical mechanism corresponding to each degradation caused by mechanical stress is presented next. Finally, to support the development of the flexible technologies and realize their commercialization, methods to overcome these mechanical strain-induced degradations are reported in three different aspects by understanding the physical degradation model. © 2019 The Author(s). Published by Elsevier Ltd. This is an open access article under the CC BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/).

Keywords: Flexible LTPS TFT Mechanical stress Active layer design and mechanical absorption layer Gate insulator quality improvement

1. Introduction Displays act as the bridge between humans and their electronic products, with each major technical innovation in displays accompanied by a significant change in human life [1]. With thinfilm transistors (TFTs) replacing cathode-ray tubes, electronic products became much more portable and convenient, leading to increased mobility in our lives. However, this is not the end of innovation. Nowadays, flexible technologies are central to the display industry, with several research institutes and companies releasing state-of-the-art flexible technologies such as foldable smartphones, smartwatches with curved screens, and wearable devices [2e7]. Furthermore, the Internet of Things (IoT) [8e14] has led to portable electronic product integrating systems, including sensors, memory, 5G networks, and artificial intelligence (AI), attracting worldwide attention for use in the next generation of industry [15e21]. Therefore, to support the development of the IoT, the continued development of flexible display technology is

* Corresponding author. E-mail address: [email protected] (T.-C. Chang).

necessary and urgent. Recently, metal-oxide semiconductor (mainly InGaZnO) is considered to be a promising candidate, as it can be manufactured at a low-processing temperature, which is beneficial for the device fabrication on a plastic substrate [22,23]. The metal-oxide semiconductor, however, faces several fatal reliability issues, such as light-induced instability/reliability [24e28], and self-induced thermal degradation due to its low thermal conductivity (1.4 W/m/K) as compared to low-temperature polycrystalline silicon (LTPS) (32 W/m/K) [29,30]. The low thermal conductivity of the metal-oxide semiconductor will cause thermalcorrelation reliability issues when metal-oxide semiconductor TFTs are operated under high current [31e35]. In the next generation, high resolution (8K ultra-high definition, 8K UHD) and high flame rate (240 Hz for three-dimensional (3D) displays) will be mainstream display technologies [36e38]. Considering this background, LTPS TFTs are currently the most promising material when compared to a-Si, metal-oxide semiconductors and organic TFTs. The high resolution and high frame rate result in insufficient writing time for pixel charging for the device using low-mobility TFTs. In addition, as the organic lightemitting diode (OLED) and micro LED (m-LED) are current-driven

https://doi.org/10.1016/j.mtadv.2019.100040 2590-0498/© 2019 The Author(s). Published by Elsevier Ltd. This is an open access article under the CC BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/).

2

T.-C. Chang et al. / Materials Today Advances 5 (2020) 100040

devices, the higher the current that is supplied to an OLED/m-LED, the higher the brightness. LTPS TFTs exhibit a high carrier mobility of 50e100 cm2/V s, which is superior to the 1 cm2/V s [39,40] of a-Si and 10 cm2/V,s of a metal-oxide semiconductor [41,42]. Accordingly, LTPS TFTs can provide higher current at the same device dimensions with faster response time. In other words, to provide the same current supply, a-Si and metal-oxide TFTs require a larger device width. As we know, a pixel contains both the TFT and the space for the OLED/m-LED. Therefore, the larger the TFT, the smaller the OLED/m-LED must be. Accordingly, a larger device size causes a lower aperture ratio, which results in less light emission. As the resolution becomes higher, the pixel size gets smaller. If the TFTs remain the same size, the space for the OLED/m-LED will become smaller, causing a decrease in brightness. To maintain the brightness, a larger current supply is required, but this will lead to a decrease in the lifetime of OLED/m-LED. Lin et al. have reported the relationship between lifetime of OLEDs and the aperture ratio [43,44], with the result demonstrating that the lifetime decreases significantly as the aperture ratio decreases. As a result, the most effective method to maintain brightness without decreasing the lifetime of OLED/m-LED in high-resolution displays is to reduce the size of TFTs. Tsai et al. have reported the aperture ratio of LTPS could be larger than 28% for a-Si and 5% for oxide TFTs [45]. Given this, LTPS is currently the most promising material for displays requiring high-speed operation and high resolution because of its high mobility, thermal conductivity, and good bias/light stability. In addition, LTPS TFTs have the possibility to exploit complementary metal-oxide semiconductor (CMOS) architectures because of the complementary p-type and n-type LTPS TFTs [46e50], which can realize the integration of the pixel array and drivers on a display panel (i.e. gate driver on array, or GOA) [51e54]. Nowadays, GOA is a key technology for portable electronic products with narrow border design, such as notebooks and smart watches [36,55,56]. Although metal-oxide semiconductor TFTs exhibit a good carrier mobility, the low thermal conductivity limits its application as was mentioned above. Moreover, metal-oxide semiconductor TFTs are often innate n-type TFTs, and a p-type metal-oxide TFT that matches the performance of n-type metal-oxide semiconductor TFTs has not yet been discovered. Beyond displays, continued investigation of LTPS TFTs is beneficial for other applications, such as building thin-film integrated circuits (ICs) on flexible chips, allowing for a TFT-based microprocessor [57,58], sensors [59,60], static random access memory (SRAM) [61], radio frequency identification (RFID) tags [62], and a thin-film near-field communication (NFC) tag [46,63]. These thinfilm-based ICs, when integrated on flexible chips, may be a gamechanger in the next generation of the electronic industry. These advantages in material properties and applications help LTPS TFTs to remain competitive among portable device applications, as well as promoting their potential for application in state-of-the-art flexible technologies. To support the development of the flexible technologies and realize their commercialization, this review compiles several issues and solutions, especially focusing on the mechanical strain-induced degradation.

2. Issues in developing flexible LTPS displays 2.1. Difficulties during fabrication Fig. 1 introduces the major manufacturing/operation issues affecting LTPS flexible displays. For flexible displays, the characteristics of their flexibility depends on the substrate. To enable a flexible display, a desirable substrate should be bendable, twistable, and

malleable over arbitrary curved surfaces. Three substrates are considered to be flexible: thin glass, metal foil, and plastic, each of which has advantages and difficulties. Thin-glass films are bendable and can endure a high process temperature [64,65]. However, they are fragile, which limits their application as a flexible substrate. Metal foils can sustain high process temperature and provide a good barrier to moisture and oxygen, without the problem of fragility [66]. Cheon et al. [67] and Lee et al. [68] have reported on the mechanical stability of poly-Si TFTs on metal foil. Despite the fact that metal foils show good mechanical stability, metal foil cannot handle multidirectional bending or stretchable display. Moreover, it is expensive to apply to large displays. So far, plastic substrate is thought to be the most promising candidate for substrates in the flexible display industry. It exhibits outstanding mechanical, optical, and chemical performance. In addition, it is an inexpensive material and can achieve multidirectional bending [69]. Several studies have illustrated the different materials that can be used for the plastic substrate and also proved the mechanical stability of poly-Si TFTs on plastic substrates [70e75]. Nonetheless, plastic substrates still face critical issues. The mismatch of thermal expansion between the substrate and the deposited thin films is one critical problem. Kwon et al. [76] examine the damage to the plastic substrate and/or buffer layers due to the thermal stress caused by excimer laser annealing (ELA) during film deposition (generally, conventional LTPS process temperature is above 450  C) [67e80]. This heat causes serious thermal expansion in the substrate; the mismatch of the thermal expansion between the plastic substrate and deposited film layers can result in stress and cracking. This issue can be solved by depositing a SiO2 layer as a thermal buffer layer between the substrate and the a-Si film to suppress the conduction of the heat to the substrate. Nevertheless, although the inserted SiO2 can effectively block the heat, this causes a serious heat accumulation above the SiO2 and changes the optimal ELA crystallization conditions. Fig. 1(d) [81] demonstrates the relationship of SiO2 buffer thickness to the poly-Si grain size. Although under the same ELA energy, the poly-Si grain boundary protrusion becomes smaller as the buffer thickness exceeds 1.2 mm. The grain size and the grain boundary protrusion can influence the electric behavior [82] as well as endurance [83]. Also, Gao et al. [84] have pointed out some technical difficulties in the polymer substrate, barrier layers, and thermal shock in the LTPS TFT process [85]. Another important issue is the film transfer and peeling-off process [6]. Mitsutoshi [86] demonstrated a comprehensive review of 'surface free technology by laser annealing' (SUFTLA), a technology that enables poly-Si TFTs to be transferred between substrates [87,88]. Bian et al. [89] also provided a detailed overview of laser transfer [90], printing [91], and assembly technologies [92] for flexible electronics.

2.2. Effect of the mechanical strain Among these numerous issues, endurance during long-term mechanical stress is a major problem as well [93e95]. The mechanical strain from the compressive/tensile or long-term dynamic bending can seriously affect the electric characteristic and the reliability of LTPS TFTs (Fig. 1(e) and (f)), and a review of the mechanical strain is presented in this section. Fig. 2(a) illustrates the schematic degradation model of the inter-grain in polycrystalline silicon film according to the quantity statistics of the interface state density (Nit) and grain boundary state density (Ntrap), which both increase after compressive/tensile bending, as shown in Fig. 2(b) [96]. The inter-grain in the polycrystalline silicon film includes peripheral dangling bonds, strain bonds, and a crystalline-like region. The mechanical strain distorts the peripheral SieSi and breaks

T.-C. Chang et al. / Materials Today Advances 5 (2020) 100040

3

Fig. 1. Introduction of manufacturing/operation issues affecting LTPS flexible displays. Flexible displays with (a) thin glass [65], (b) metal foil [66], and (c) plastic substrates [84]. (d) Cross-section transmission electron microscopy (TEM) images of devices fabricated with different SiO2 buffer thicknesses [81]. (e) The fabrication steps for the laser multiscanning (LMS) lift-off process [90]. Photos of the bending tester for flexible LTPS TFTs under (f) compressive/tensile strains [7] and (g) dynamic mechanical stress [95].

the passivated hydrogen bonds; thus, deep states and tail states are produced during the mechanical process. These mechanically induced traps can further cause more serious negative bias temperature instability (NBTI) after bending, as illustrated in Fig. 2(c). Moreover, the degradation due to tensile stress is more pronounced than that due to compressive stress. Besides the increase in strain-induced traps, mechanical strain can also affect the field-effect carrier mobility [95,97]. Electrical characteristics of strained transistors have been thoroughly investigated in single-crystal Si MOSFETs. According to a study of pchannel metal-oxide semiconductor (PMOS) devices, the carrier mobility increases by the decrease of scattering rate and effective mass of carriers when strain is applied [98e103]. A similar

phenomenon occurs in the LTPS TFTs while under mechanical strain. Peng et al. [104] demonstrated that in p-type poly-TFT devices, the uniaxial compressive strain can split the energy band of both light and heavy holes, which then reduces the scattering effect, indicating an increase in mean free time [105e107]. In addition, the mechanical strain causes band warping, which reduces the hole effective mass [7,104]. It is well known that mobility is proportional to mean free time and inversely proportional to electron/ hole effective mass, with the result that uniaxial compressive stress increases mobility [108]. In terms of long-term dynamic bending stress, Chen et al. provided a study of the degradation mechanism of the LTPS TFTs after suffering long-term dynamic compressive bending [109]. In their work, the

4

T.-C. Chang et al. / Materials Today Advances 5 (2020) 100040

Fig. 2. (a) Schematic inter-grain in the polycrystalline silicon film, (b) quantity statistics of Ntrap and Nit, and (c) DVth with stress time for different repeated conditions: devices with no bending and with compression and tension stress [96]. (d) The field-effect hole mobility variation and DVth as a function of bending radius [104]. (e) Electrical characteristics of standard and organic trench structures after mechanical stress [114]. (f) Comparison of simulated GI stress on standard devices in width and length direction compressive bending [114].

device shows serious degradation, including a significant Vth shift and a hump generation at the subthreshold region after long-term repetitive bending. The hump can be attributed to the non-uniform electron trapping in the gate insulator (GI) traps, because the GI at the edge of the poly-Si suffers from a more serious mechanical strain. They

suggested that the hump generation is a result of inhomogeneous carrier trapping into the GI traps, according to previous work [110e113]. This physical mechanism can accurately interpret the hump generation and also corresponds to the simulation result (both electric and mechanical simulation) they propose.

Fig. 3. Comparison of (a) subthreshold swing (SS), (b) mobility, (c) interface traps, (d) PBTS, and (e) NBTS for STD and proposed new GI devices. (e) Electrical characteristics of the (f) standard, and (g) new GI devices after mechanical stress.

T.-C. Chang et al. / Materials Today Advances 5 (2020) 100040

Moreover, Huang et al. [114] also demonstrated a comparison of the degradation of the LTPS TFTs after channel-length and channelwidth direction bending. Fig. 2(e) shows the electrical characteristics for the poly-Si TFTs before and after the channel-length repeated bending process. They found that the degree of degradation of the devices under channel-width is more severe than that of channel-length bending. A mechanical stress simulation for both bending directions is utilized to inspect the mechanical force distribution on GI and is shown in Fig. 2(f). The mechanical stress of the overlapping region between the GI and channel is more serious in channel-width bending when compared to channel-length bending devices. Therefore, the device shows a more severe degradation after repeated channel-width bending. To summarize, the mechanical strain can cause negative effects on the electrical characteristics of the LTPS TFTs such as threshold voltage shift (DVth), hump generation, mobility variation, and grain boundary/ interface trap generation. To support the development of flexible technologies, in the following section, this article assembles attainable solutions through processing, structural alteration, and a mechanical absorption layer, which all enhance endurance when suffering mechanical strain.

5

mechanical stress; therefore, we suggest a direct and practical solution by modifying the GI fabrication process. These devices were fabricated on the polyimide substrate, and the material of the GI layer is 100-nm-thick SiO2, which was fabricated from SiH4 þ N2O with He plasma. The difference in the GI formation processes is the flux of the He plasma, which is adjusting from 1,300 sccm (standard GI) to 1,500 sccm (new GI). To confirm the new GI quality, several parameters were extracted, and various reliability tests were performed. Fig. 3(a) and (b) shows the comparison of the subthreshold swing value and mobility of the devices with standard GI and new GI. Clearly, the devices with new GI indeed exhibit better initial electrical characteristics because of fewer interface traps (Fig. 3(c)) [115e118]. Furthermore, Fig. 3(d) and (e) reveals that the new GI devices show more stable characteristics under positive/negative bias temperature stress. A comparison with the initial electrical characteristics and reliability tests results reveals that the proposed new devices have a superior GI quality. Fig. 3(f) and (g) shows that after carrying out repetitive mechanical stress, the new GI device shows a milder degradation than that in a standard GI device. Hence, for the foldable devices, GI quality is a major factor to consider in flexible TFT fabrication.

3. Design rules to the flexible LTPS TFTs 3.2. Structure alteration: active layer design 3.1. Processing: innate GI quality enhancement First, according to the degradation model previously discussed, GI quality becomes one of the critical issues during

Besides the enhancement of GI quality, we also propose a new structure, which is first verified by simulation. Young's modulus in a sampling of studies has been determined as: 160 (GPa) for poly-Si

Fig. 4. Optical top-view microscope image of (a) standard and (b) wing structures. (c) Simulation results of edge stress, with corresponding structure profile. (d) Enlargement of the central main channel stress (noted by red circle in Fig. 4(c)), showing standard and various wing width structures. Electrical characteristics of (e) standard and (f) wing structure with wing width of 1 mm after mechanical stress.

6

T.-C. Chang et al. / Materials Today Advances 5 (2020) 100040

[119e122], 312 (GPa) for molybdenum [123,124] and 70 (GPa) for SiO2 [125,126]. Fig. 4(a) and (b) demonstrates a comparison between a standard structure and the new, modified structure, namely, a wing structure. In the new design, two wings are situated at the side of the main channel, as shown in the enlarged profile in Fig. 4(b). Simulation is utilized to examine the wing structure, and the effect of different wing widths is also studied. Fig. 4(c) shows the stress distribution across the channel along the width direction. As can be seen, the edge stress is distributed peripherally, away from the main channel, by applying the wing structure. It is important to note that as the wing extends, the edge stress intensity does not exhibit further decline, but shows a minimal change. The center main channel stress, however, increases with wider wings, as shown in Fig. 4(d). Accordingly, although the wings can reduce degradation, it is not necessary that the wings extend far. The structural change presented in this review is this addition of the wing width of 1 mm, extending along the width direction from the main channel. The repetitive mechanical bending is performed on the practical device afterward. Clearly, after mechanical stress, the wing structure device shows less degradation when compared to the standard device, as shown in Fig. 4(e) and (f). Both simulation and experimental results confirm that the wing structure indeed alleviates degradation after repetitive mechanical bending.

In addition to the increase in strain-induced traps, the mechanical strain can affect the carrier mobility as well. In 2018, Lee et al. reported a distinguished work where, through optimum arrangement of the strain orientation and with proper design of the channel structure depending on the stress directions, fluctuations of LTPS TFTs could be effectively minimized under bending conditions [7]. Three different devices were demonstrated in their work, those of line-type, grid-type, and curve-type TFTs, as shown in Fig. 5. The impacts of strain in both transverse and longitudinal directions on the scattering rate and effective mass for each device was systematically discussed. With an ideal case of balancing the co-existence and effect-offset of the transverse and longitudinal directions, the mobility variation could be eliminated. After discussing three different channel shapes, the curve-type transistor with longitudinal strain is suggested as an ideal structure for applications, and this understanding was applied in the 5.8 flexible AMOLED panel with multi-edge curvature of the Galaxy S8 smartphone. 3.3. Mechanical absorption layer: organic trench More recently, Huang et al. proposed a design introducing additional organic trenches, which can reduce mechanical strain [114]. Fig. 6(a) shows a top view of the foldable LTPS TFT with

Fig. 5. The normalized field effect mobility and driving voltage range variation under compressive and tensile strains for different strain orientations: (a) line-type (b) grid-type, and (c) curve-type p-channel LTPS TFTs [7].

T.-C. Chang et al. / Materials Today Advances 5 (2020) 100040

7

Fig. 6. (a) Top view of organic trench TFT and the simulation result, which demonstrates the stress distribution of cross-section A to B [114]. (b) Cross-section profile of the TFT with organic trench. The enlargement of GI stress (in (a)) for (c) standard (d) organic trench devices [114]. Electrical characteristics of (e) standard and (f) organic trench device after mechanical stress [114]. (g) Comparison of DVth differences by the bending axis for standard and organic trench devices [114].

Fig. 7. Top view of (a) central and (b) peripheral trench devices. Mechanical simulation of (c) central and (d) peripheral trench devices [127]. (e) Calculation demonstrating the relationship between edge GI stress and the distance from poly-Si to organic trench, showing an optimal distance [127].

organic trench used in this experiment, and Fig. 6(b) shows a crosssection profile of the detailed structure. The organic trenches are situated at the two sides of the TFT. A uniaxial mechanical stress simulation is shown in Fig. 6(b), which demonstrates the crosssection force distribution while going uniaxial mechanical bending. According to this stress simulation result, the organic trench only slightly absorbs the mechanical strain under bending due to its low Young's modulus, while high Young's modulus materials, such as Mo and Si3N4, tend to absorb stress. As a result, stress can be directed into the bottom buffer layer, thus alleviating the effect of mechanical strain on the GI. A comparison of the GI

stress between devices with and without the organic trench is shown in Fig. 6(c) and (d), respectively. As can be seen, the mechanical strain around the poly-Si/SiO2 edge can be dramatically reduced after introducing the organic trench structure, as it is nearly half the intensity in the standard condition. After verifying the effect of this organic trench by the simulation, the organic trench devices were tested practically with repetitive uniaxial mechanical bending. Fig. 6(e) and (f) shows the experimental result of the device with and without the organic trench before and after mechanical stress. Clearly, endurance of the device increases after utilizing the proposed organic trenches. Furthermore, the

8

T.-C. Chang et al. / Materials Today Advances 5 (2020) 100040

degradation in channel-length/width directions can both be reduced, as shown in the statistical analysis data for DVth in Fig. 6(g). This indicates that the display layout can be designed without regard to the bending axis, providing significant improvements and better flexibility in the layout design. Although the organic trench can alleviate the mechanical strain effectively, it is important to note that the distance between the organic trench and TFT is also an important issue affecting the device endurance [127]. Fig. 7(a) and (b) shows a top view of the central trench and the peripheral organic trench. After the mechanical stress, the central trench shows a more severe degradation. A simulation is utilized to analyze the mechanical stress distribution in these two distinct structures and is provided in Fig. 7(c) and (d). The central trench device exhibits higher stress intensity near the edge of the poly-Si/GI and leads to a more substantial degradation, while the central trench causes the horizontal force to damage the gate oxide layer due to its proximity to the channel. Fig. 7(e) shows the GI stress intensity versus the distance from channel to organic trench. As can be seen, an optimal distance is apparent. As a result, this simulation result indicates that the distance between the organic trench and the device should also be considered carefully for the device layout design.

4. Conclusion In conclusion, this review article first provides a comprehensive survey of studies on the issues of flexible LTPS TFTs, especially mechanical strain-induced reliability issues. Reliability issues, including electrical and mechanical strain, are reviewed. Understanding the detailed degradation mechanism is crucial to enhancing the endurance of the transistor after severe stress conditions. Furthermore, according to these physical mechanisms, we have compiled some guidelines to minimize the degradation induced by mechanical strain, such as modifying the fabrication process or the channel structural design, and introducing a mechanical strain absorption layer. By adopting these three design rules, flexible electronic devices with high reliability are more likely to be realized.

Declaration of competing interest The authors declare that they have no known competing financial interests or personal relationships that could have appeared to influence the work reported in this paper.

References [1] G.P. Crawford, Flexible Flat Panel Displays, John Wiley & Sons Ltd., West Sussex, UK, 2005. [2] J.-H. Hong, et al., 9.1-inch stretchable AMOLED display based on LTPS technology, J. Soc. Inf. Disp. 25 (3) (2017) 194e199. [3] J. Jang, Displays develop a new flexibility, Mater. Today 9 (4) (2006) 46e52. [4] H. Fukagawa, et al., Long-lived flexible displays employing efficient and stable inverted organic light-emitting diodes, Adv. Mater. 30 (28) (2018), e1706768. [5] R. Komatsu, et al., Repeatedly foldable AMOLED display, J. Soc. Inf. Disp. 23 (2) (2015) 41e49. [6] C.I. Park, et al., World's first large size 77-inch transparent flexible OLED display, J. Soc. Inf. Disp. 26 (5) (2018) 287e295. [7] J. Lee, et al., 5.8-inch QHD flexible AMOLED display with enhanced bendability of LTPS TFTs, J. Soc. Inf. Disp. 26 (4) (2018) 200e207. [8] J. Calabuig, et al., 5th Generation mobile networks: a new opportunity for the convergence of mobile, Broadband Broadcast Serv. 53 (2) (2015) 198e205. [9] M. Agiwal, et al., Next generation 5G wireless networks: a comprehensive survey, IEEE Commun. Surv. Tutor. 18 (3) (2016) 1617e1655. [10] G.A. Akpakwu, et al., A survey on 5G networks for the internet of things: communication technologies and challenges, IEEE Access 6 (2018) 3619e3647.

[11] H. Lv, et al., Energy-efficient multi-cell resource allocation in cognitive radioenabled 5G systems, in: EURASIP Journal on Advances in Signal Processing 2019, vol. 1, 2019. [12] F. Qamar, et al., Interference management issues for the future 5G network: a review, Telecommun. Syst. 71 (4) (2019) 627e643. [13] M.F. Hossain, et al., Recent research in cloud radio access network (C-RAN) for 5G cellular systems e a survey, J. Netw. Comput. Appl. 139 (2019) 31e48. [14] S. Singh, P. Singh, Key concepts and network architecture for 5G mobile technology, Int. J. Sci. Res. Eng. Technol. 1 (5) (2012) 165e170. [15] X. Wang, et al., Optimizing content dissemination for real-time traffic management in large-scale internet of vehicle systems, IEEE Trans. Veh. Technol. 68 (2) (2019) 1093e1105. [16] L. Atzori, et al., The internet of things: a survey, Comput. Network. 54 (15) (2010) 2787e2805. [17] P.H. Chen, et al., A dual-gate InGaZnO4ebased thin-film transistor for highsensitivity UV detection, Adv. Mat. Technol. 4 (8) (2019) 1900106. [18] Y.-L. Tsai, et al., Improving reliability of high-performance ultraviolet sensor in a-InGaZnO thin-film transistors, IEEE Electron. Device Lett. 40 (9) (2019) 1455e1458. [19] T.-C. Chang, et al., Developments in nanocrystal memory, Mater. Today 14 (12) (2011) 608e615. [20] T.-C. Chang, et al., Resistance random access memory, Mater. Today 19 (5) (2016) 254e264. [21] J.H. Koo, et al., Flexible and stretchable smart display: materials, fabrication, device design, and system integration, Adv. Funct. Mater. 28 (35) (2018) 1801834. [22] T. Kamiya, H. Hosono, Material characteristics and applications of transparent amorphous oxide semiconductors, NPG Asia Mater. 2 (1) (2010) 15. [23] K. Nomura, et al., Room-temperature fabrication of transparent flexible thinfilm transistors using amorphous oxide semiconductors, Nature (London) 432 (488) (2004) 488e492. [24] Y.-C. Tsao, et al., Abnormal hump in capacitanceevoltage measurements induced by ultraviolet light in a-IGZO thin-film transistors, Appl. Phys. Lett. 110 (2) (2017), 023501. [25] T.-C. Chen, et al., Analyzing the effects of ambient dependence for InGaZnO TFTs under illuminated bias stress, Surf. Coat. Technol. 231 (2013) 465e470. [26] C.-I. Yang, et al., Combined effects of light illumination and various bottom gate length on the instability of via-contact-type amorphous InGaZnO thinfilm transistors, IEEE Trans. Electron Dev. 65 (2) (2018) 533e536. [27] M.-C. Tai, et al., Floating top gate-induced output enhancement of a-InGaZnO thin film transistors under single gate operations, Appl. Phys. Lett. 113 (17) (2018) 173501. [28] Y.-C. Tsao, et al., Effects of ultraviolet light on the dual-sweep IeV curve of aInGaZnO 4 thin-film transistor, IEEE Trans. Electron Dev. 66 (4) (2019) 1772e1777. [29] T. Yoshikawa, et al., Thermal conductivity of amorphous indiumegalliumezinc oxide thin films, Appl. Phys. Express 6 (2) (2013), 021101. [30] Y.C. Tai, et al., Thermal conductivity of heavily doped low-pressure chemical vapor deposited polycrystalline silicon films, J. Appl. Phys. 63 (5) (1988) 1442e1447. [31] K.-H. Liu, et al., Investigation of channel width-dependent threshold voltage variation in a-InGaZnO thin-film transistors, Appl. Phys. Lett. 104 (13) (2014) 133503. [32] T.-Y. Hsieh, et al., Origin of self-heating effect induced asymmetrical degradation behavior in InGaZnO thin-film transistors, Appl. Phys. Lett. 100 (23) (2012) 232101. [33] T.-C. Chen, et al., Self-heating enhanced charge trapping effect for InGaZnO thin film transistor, Appl. Phys. Lett. 101 (4) (2012), 042101. [34] T.-Y. Hsieh, et al., Self-heating-effect-induced degradation behaviors in aInGaZnO thin-film transistors, IEEE Electron. Device Lett. 34 (1) (2013) 63e65. [35] T.-Y. Hsieh, et al., Systematic investigations on self-heating-effect-induced degradation behavior in a-InGaZnO thin-film transistors, IEEE Trans. Electron Dev. 59 (12) (2012) 3389. [36] K. Mochizuki, et al., A 510-ppi 8K x 4K LTPS TFT-LCD with 120-Hz frame-rate driving, SID Symp. Dig. Tech. 47 (1) (2016) 919e922. [37] E. Song, et al., Programmable pulse width LTPS TFT shift register for high resolution and high frame rate active matrix flat panel displays, SID Symp. Dig. Tech. Pap. 44 (1) (2013) 473e477. [38] C.-L. Fan, et al., Novel LTPS-TFT pixel circuit with OLED luminance compensation for 3D AMOLED displays, J. Disp. Technol. 12 (5) (2016) 425e428. [39] C.-W. Chen, et al., High-performance hydrogenated amorphous-Si TFT for AMLCD and AMOLED applications, IEEE Electron. Device Lett. 26 (10) (2005) 731e733. [40] G.-F. Chen, et al., An energy-band model for dual-gate-voltage sweeping in hydrogenated amorphous silicon thin-film transistors, IEEE Trans. Electron Devices 66 (6) (2019) 2614e2619. [41] E. Fortunato, et al., Oxide semiconductor thin-film transistors: a review of recent advances, Adv. Mater. 24 (22) (2012) 2945e2986. [42] T.-Y. Hsieh, et al., Review of present reliability challenges in amorphous InGa-Zn-O thin film transistors, ECS J. Solid-State Sci. Technol. 3 (9) (2014) Q3058eQ3070.

T.-C. Chang et al. / Materials Today Advances 5 (2020) 100040 [43] J.-J. Lin, et al., Comparison of a-Si and poly-Si for AMOLED displays, J. SID 12 (4) (2004) 367e371. [44] J.-J. Lin, et al., Comparison of a-Si and poly-Si for AMOLEDs, SID Symp. Dig. Tech. Pap. 35 (1) (2004) 1504e1507. [45] W.-C. Tsai, et al., Low-power-and-narrow-border-UHD-LTPS-notebookdisplay, SID Symp. Dig. Tech. Pap. 49 (1) (2018) 36e39. [46] K. Myny, The development of flexible integrated circuits based on thin-film transistors, Nat. Electron. 1 (1) (2018) 30e39. [47] C.-L. Lin, et al., LTPS-TFT pixel circuit to compensate for OLED luminance degradation in three-dimensional AMOLED display, IEEE Electron. Device Lett. 33 (5) (2012) 700e702. [48] C.-L. Lin, et al., Compensation pixel circuit to improve image quality for mobile AMOLED displays, IEEE J. Solid State Circuits 54 (2) (2019) 489e500. [49] K.M. Lim, et al., A 3.5 in. QVGA poly-Si TFT-LCD with integrated driver including new 6-bit DAC, Solid State Electron. 49 (7) (2005) 1107. [50] H.-J. In, et al., An advanced external compensation system for active matrix organic light-emitting diode displays with poly-Si thin-film transistor backplane, IEEE Trans. Electron Devices 57 (11) (2010) 3012e3019. [51] C.-L. Lin, et al., New gate driver circuit for high-resolution and high-framerate AMOLED displays with simultaneous emission driving method, SID Symp. Dig. Tech. Pap. 50 (1) (2019) 1448e1451. [52] A. Nathan, et al., Driving schemes for a-Si and LTPS AMOLED displays, J. Disp. Technol. 1 (2) (2005) 267. [53] T. Nishibe, H. Nakamura, Value-added circuit and function integration for SOG (system-on glass) based on LTPS technology, Proc. SID (2006) 1091e1094. [54] Y.C. Wu, et al., Effects of channel width on electrical characteristics of polysilicon TFTs with multiple nanowire channels, IEEE Trans. Electron Devices 52 (10) (2005) 2343e2346. [55] Y.-S. Tsai, et al., A slim border design for wearable display using novel P-type shift register and optimal layout arrangement, SID Symp. Dig. Tech. Pap. 46 (1) (2015) 64e66. [56] H. Watakabe, et al., Development of advanced LTPS TFT technology for low power consumption and narrow border LCDs, SID Symp. Dig. Tech. Pap. 50 (1) (2019) 541e544. [57] N. Karaki, et al., A flexible 8b asynchronous microprocessor based on lowtemperature poly-silicon TFT technology, Proc. Int. Solid-State Circuits Conf. (2005) 272e598. [58] N. Karaki, et al., A flexible 8-bit asynchronous microprocessor based on LOWTemperature Poly-Silicon (LTPS) TFT Technology, SID Symp. Dig. Tech. Pap. 36 (1) (2005) 1430e1433. [59] D.M. Keren, et al., Low temperature poly-silicon thin film transistor flexible sensing circuit, in: 2016 IEEE International Conference on the Science of Electrical Engineering, 2016, pp. 1e3. [60] L. Maiolo, et al., Flexible sensing systems based on polysilicon thin film transistors technology, Sens. Actuators, B 179 (2013) 114e124. [61] H. Ebihara, et al., A flexible 16 kb SRAM based on Low-Temperature PolySilicon (LTPS) TFT Technology, SID 6 (2006) 339e342. [62] Y.-H. Yu, et al., An LTPS TFT demodulator for RFID tags embeddable on panel displays, IEEE Trans. Microw. Theory Tech. 57 (5) (2009) 1356e1361. [63] K. Myny, et al., Flexible thin-film NFC tags, IEEE Commun. Mag. 53 (10) (2015) 182e189. [64] A. Weber, et al., Thin Glass-Polymer Systems as Flexible Substrates for Displays in SID Conf, 2002, pp. 53e56. [65] S. Hoehla, et al., Active matrix color-LCD on 75 mm thick flexible glass substrates, J. Disp. Technol. 8 (6) (2012) 309e316. [66] H.S. Shin, et al., 4.1 inch top-emission AMOLED on flexible metal foil, SID Int. e Symp. Dig. Tech. Pap. 36 (2005) 1642e1645. [67] J.H. Cheon, et al., Mechanical stability of poly-Si TFT on metal foil, Solid State Electron. 52 (3) (2008) 473e477. [68] W.G. Lee, et al., Flexibility of low temperature polycrystalline silicon thinfilm transistor on tungsten foil, Jpn. J. Appl. Phys. 50 (3) (2011), 03CB03. [69] S.R. Forrest, The path to ubiquitous and low-cost organic electronic appliances on plastic, Nature (London) 428 (2004) 911e918. [70] P. Heremans, et al., Mechanical and electronic properties of thin-film transistors on plastic, and their integration in flexible electronic applications, Adv. Mater. 28 (22) (2016) 4266e4282. [71] M.-C. Choi, et al., Polymers for flexible displays: from material selection to device applications, Prog. Polym. Sci. 33 (6) (2008) 581e630. [72] W.J. Bae, et al., Towards colorless polyimide/silica hybrids for flexible substrates, Polymer 105 (2016) 124e132. [73] F. Templier, et al., Fabrication of high performance low temperature polysilicon backplanes on metal foil for flexible active-matrix organic light emission diode displays, Thin Solid Films 515 (19) (2007) 7428e7432. [74] A. Pecora, et al., Low-temperature polysilicon thin film transistors on polyimide substrates for electronics on plastic, Solid State Electron. 52 (3) (2008) 348e352. [75] G. Fortunato, et al., Polysilicon thin-film transistors on polymer substrates, Mater. Sci. Semicond. Process. 15 (6) (2012) 627e641. [76] J.Y. Kwon, Low temperature poly-Si thin film transistor on plastic substrates, IEICE Trans. Electron. E88-C (4) (2005) 667e671. [77] T. Goto, et al., LTPS thin-film transistors fabricated using new selective laser annealing system, IEEE Trans. Electron Devices 65 (8) (2018) 3250. [78] S. Zhang, et al., A novel ultrathin elevated channel low-temperature poly-Si TFT, IEEE Electron. Device Lett. 20 (11) (1999) 569e571.

9

[79] C.-C. Tsai, et al., High-performance self-aligned bottom-gate lowtemperature poly-silicon thin-film transistors with excimer laser crystallization, IEEE Electron. Device Lett. 28 (7) (2007) 599e602. [80] G.K. Giust, et al., Low-temperature polysilicon thin-film transistors fabricated from laser-processed sputtered-silicon films, IEEE Electron. Device Lett. 19 (9) (1998) 343e344. [81] B.-W. Chen, et al., Effect of SiO2 buffer layer thickness on performance and reliability of flexible polycrystalline silicon TFTs fabricated on polyimide, IEEE Electron. Device Lett. 37 (12) (2016) 1578e1581. [82] H.-Y. Tu, et al., Analysis of negative bias temperature instability degradation in p-type low-temperature polycrystalline silicon thin-film transistors of different grain sizes, IEEE Electron. Device Lett. 40 (11) (2019) 1768e1771. [83] B.W. Chen, et al., Surface engineering of polycrystalline silicon for long-term mechanical stress endurance enhancement in flexible low-temperature poly-Si thin-film transistors, ACS Appl. Mater. Interfaces 9 (13) (2017) 11942e11949. [84] X. Gao, et al., LTPS TFT process on polyimide substrate for flexible AMOLED, J. Disp. Technol. 11 (8) (2015) 666e669. [85] M. Miyasaka, et al., Technical obstacles to thin film transistor circuits on plastic, Jpn. J. Appl. Phys. 47 (6) (2008) 4430e4435. [86] M. Miyasaka, Suftla flexible microelectronics on their way to business, SID Symp. Dig. Tech. 38 (1) (2007) 1673e1676. [87] T. Shimoda, S. Inoue, Surface-free technology by laser annealing (SUFTLA), IEDM Tech. Dig. (1999) 289e292. [88] S. Inoue, et al., Surface-free technology by laser annealing (SUFTLA) and its application to poly-Si TFT-LCDs on plastic film with integrated drivers, IEEE Trans. Electron Devices 49 (8) (2002) 1353e1360. [89] J. Bian, et al., Laser transfer, printing, and assembly techniques for flexible electronics, Adv. Electron. Mater. 5 (7) (2019) 1800900. [90] S.J. Kim, et al., High-performance flexible thermoelectric power generator using laser multiscanning lift-off process, ACS Nano 10 (12) (2016) 10851e10857. [91] W. Shou, et al., Low-cost manufacturing of bioresorbable conductors by evaporation-condensation-mediated laser printing and sintering of Zn nanoparticles, Adv. Mater. 29 (26) (2017). [92] V.R. Marinov, Laser-enabled extremely-high rate technology for mLED assembly, SID Int. e Symp. Dig. Tech. Pap. 49 (2018) 692e695. [93] S. Janfaoui, et al., Behavior of the parameters of microcrystalline silicon TFTs under mechanical strain, Solid State Electron. 93 (2014) 1e7. [94] B.-W. Chen, et al., Systematic analysis of high-current effects in flexible polycrystalline-silicon transistors fabricated on polyimide, IEEE Trans. Electron Devices 64 (8) (2017) 3167e3173. [95] P.-C. Kuo, et al., Effect of mechanical strain on mobility of polycrystalline silicon thin-film transistors fabricated on stainless steel foil, Appl. Phys. Lett. 91 (24) (2007) 243507. [96] B.-W. Chen, et al., Impact of repeated uniaxial mechanical strain on p-type flexible polycrystalline thin film transistors, Appl. Phys. Lett. 106 (18) (2015) 183503. [97] C.F. Huang, et al., Mechanical strain effect of n-channel polycrystalline silicon thin-film transistors, Appl. Phys. Lett. 89 (10) (2006) 103502. [98] S.E. Thompson, et al., Uniaxial-process-induced strained-Si extending, IEEE Trans. Electron Devices 53 (5) (2006) 1010e1020. [99] S.E. Thompson, et al., Key differences for process-induced uniaxial vs. substrate-induced biaxial stressed Si and Ge channel MOSFETs, IEDM technical digest, IEEE Int. Electron Devices Meet (2004) 221e224. [100] S.E. Thompson, et al., A logic nanotechnology featuring strained-silicon, IEEE Electron. Device Lett. 25 (4) (2004) 191e193. [101] A. Chaudhry, et al., Modeling of some electrical parameters of a MOSFET under applied uniaxial stress, J. Comput. Electron. 10 (4) (2011) 437e442. [102] Y. Sun, et al., Physics of strain effects in semiconductors and metal-oxidesemiconductor field-effect transistors, J. Appl. Phys. 101 (10) (2007) 104503. [103] M.L. Minjoo, et al., Strained Si, SiGe, and Ge channels for high-mobility metal-oxide-semiconductor field-effect transistors, J. Appl. Phys. 97 (1) (2005), 011101. [104] I.H. Peng, et al., Effect of bias stress on mechanically strained low temperature polycrystalline silicon thin film transistor on stainless steel substrate, Appl. Phys. Lett. 95 (4) (2009), 041909. [105] M.V. Fischetti, et al., Six-band k,p calculation of the hole mobility in silicon inversion layers: dependence on surface orientation, strain, and silicon thickness, J. Appl. Phys. 94 (2) (2003) 1079e1095. [106] H. Irie, et al., In-plane mobility anisotropy and universality under uni-axial strains in n- and p-MOS inversion layers on (100), (110), and (111) Si, IEDM Tech. Dig. (2004) 225e228. [107] C.-S. Lin, et al., NBTI degradation in LTPS TFTs under mechanical tensile strain, IEEE Electron. Device Lett. 32 (7) (2011) 907e909. [108] E. Ungersboeck, et al., The effect of general strain on the band structure and electron mobility of silicon, IEEE Trans. Electron Devices 54 (9) (2007) 2183e2190. [109] B.-W. Chen, et al., Effects of repetitive mechanical bending strain on various dimensions of foldable low temperature polysilicon TFTs fabricated on polyimide, IEEE Electron. Device Lett. 37 (8) (2016) 1010e1013. [110] G.-F. Chen, et al., Abnormal dual channel formation induced by hydrogen diffusion from SiNx interlayer dielectric in top gate a-InGaZnO transistors, IEEE Electron. Device Lett. 38 (3) (2017) 334e337.

10

T.-C. Chang et al. / Materials Today Advances 5 (2020) 100040

[111] C.-F. Huang, et al., Stress-induced hump effects of p-channel polycrystalline silicon thin-film transistors, IEEE Electron. Device Lett. 29 (12) (2008) 1332e1335. [112] A. Valletta, et al., “Hump” characteristics and edge effects in polysilicon thin film transistors, J. Appl. Phys. 104 (12) (2008) 124511. [113] W.-C. Su, et al., The effect of asymmetrical electrode form after negative bias illuminated stress in amorphous IGZO thin film transistors, Appl. Phys. Lett. 110 (10) (2017) 103502. [114] S.-P. Huang, et al., Enhancing repetitive uniaxial mechanical bending endurance at R ¼ 2 mm using an organic trench structure in foldable low temperature poly-Si thin-film transistors, IEEE Electron. Device Lett. 40 (6) (2019) 913e916. [115] C.A. Dimitriadis, et al., Performance of thin-film transistors on polysilicon films grown by low-pressure chemical vapor deposition at various pressures, IEEE Trans. Electron Devices 39 (3) (1992) 598e606. [116] G. Liu, S.J. Fonash, Polycrystalline silicon thin film transistors on corning 7059 glass substrates using short time, low-temperature processing, Appl. Phys. Lett. 62 (20) (1993) 2554e2556. [117] M. Matsumura, et al., Subthreshold properties of TFTs with laser-crystallized laterally grown polysilicon layers, IEEE Electron. Device Lett. 27 (4) (2006) 278e280. [118] K.C. Moon, et al., Improvement of polycrystalline silicon thin film transistor using oxygen plasma pretreatment before laser crystallization, IEEE Trans. Electron Devices 49 (7) (2002) 1319e1322.

[119] M.A. Hopcroft, et al., What is the Young's modulus of silicon? J. Microelectromech. Syst. 19 (2) (2010) 229e238. [120] W.N. Sharpe, et al., Effect of specimen size on Young's modulus and fracture strength of polysilicon, J. Microelectromech. Syst. 10 (3) (2001) 317e326. [121] W.N. Sharpe, et al., Measurements of Young's modulus, Poisson's ratio, and tensile strength of polysilicon, in: Proc. Tenth IEEE International Workshop on Microelectromechanical Systems Nagoya, Japan, 1997, pp. 424e429. [122] R. Chuai, et al., Technical method of improving overload of pressure sensitive chip based on sacrificial layer technology, Sens. Actuators A Phys. 279 (2018) 593e600. [123] K. Ogawa, et al., Nucleation and growth of stress relief patterns in sputtered molybdenum films, Jpn. J. Appl. Phys. 25 (5) (1986) 695e700. [124] O. Sbaizero, G. Pezzotti, Influence of molybdenum particles on thermal shock resistance of alumina matrix ceramics, Mater. Sci. Eng. A 343 (2003) 273e281. [125] S. Inaba, et al., Young's modulus and compositional parameters of oxide glasses, J. Am. Ceram. Soc. 82 (12) (1999) 3501e3507. [126] X. Luo, et al., Antireflective and self-cleaning glass with robust moth-eye surface nanostructures for photovoltaic utilization, Mater. Res. Bull. 109 (2019) 183e189. [127] W.-H. Chen, et al., Stress absorbing LTPS-TFT for highly flexible AMOLED, SID Symp. Dig. Tech. Pap. 48 (1) (2017) 1742e1745.