Ion implantation in bipolar technology

Nuclear Instruments and Methods in Physics Research I355 (1991) l-8 North-Holland

Ion implantation

in bipolar technology

*

Over the past 15 years, ion implantation has increased its role in advanced bipolar integrated circuit technology from zero to 80-W% of the doping steps. The history of this change is briefly described, and the technical reasons for fabrication of each component using ion ir@arxtaGo~ are dismssed. DmSng the next decade, considerable further improvemerrts in speed and packing density of bipolar integmted &x&s ~3 be a&ieveb by the adoption of navel stmmms and materials_ Some fikely aPpliearions of ion in&mta& in this context are described.

1. Introduction Ion irnpl~~ati~~ was a dopmg technique with many years experience behind it when it first started to be used in integrated circuit fabrication in the early 147Os_ The basic science and engineering required to build machines of high doping uniformity and purity, and the materials science of fdxicatioa of MOS and bipolar devices

were

all

we&es@&shed

prim

to fS)70,

md

demonstrated. All this aecessary science md engineering infrastructure was funded not by the semiconductor industry, but inainly by Government funded programmes in the UK and USA as a spin-off from the mass-separator and ion-defect prugrammes associated with the development of nuclear power_ The capital cost and novelty sf iun impfantation, and the adequacy of chemical deposition techniques for the low complexity circuits then fabricated, delayed incorporation of ion implantation into IC technology until the mid-70s. Once incorpomted in process lines, the technique rapidly found many applications. TO USde&and how this happened in bipshr technology, this paper briefly describes some characteristic features of the bipolar transistor (section 2), the increasing importance of ion implantation in the evolution of bipolar technology to date (section 3), the advantages and disadvantages of ion implantation in fabricating each. region of the bipolar circuit (section 4) and lastly some exciting new possibilities for ion impfantation in future bipolar techrmlqies (section 5). successful

d&m

had &en

2 Characteristics of the bipofar tmnsistm The bipolar transistor is a three-term%& current valve in which the current flow between the semicon* Invited paper.

ductor emitter and collector regions is controlled by modulating the potential barriers associated with an intervening narrow base region of opposite semiconductor type, S&ematic diagrams of a basic n-p-n transistor and its associated Ioad resistor are shown in fig, la. A voltage applied between emitter and collector contact results in no significant current flow until the poteatial barrier of the emitter-base n,-p junction is Iowered by appfykg an appropriate voltage between base contact and emitter. EIectrons are then emitted into the p-type base region, across which they diffuse as minority carriers into the depletion layer associated with the base-collector p-n junction, where the junction field accelerates then into the collector. Ideally, no current flows in the cotltrol loop (base-emitter), but in reaI devices some holes always recombme with eiectrons, either in the base itself, in the otide-semiconductot interface, in the emitter-base depletion region, or in the emitter. This gives rise to a small hale current i (fig. lb). An important parameter of a bipolar transistor is the current gain, the ratio of the output current I to the controI current i. Typical steady state values of gain are 50-200. High values of gain, especially for low vaIues of 1, are necessary for efficient low power bipolar circuits, and this requires optimised vertical dopant distribution profiles in emitter, base and collector, a low density of recombination at surfaces and in the bulk, and high quality p-n junctions. Switching speed is of paramount importance in bipolar transistors since this is their main advantage over MQS transistors. The switching speed is determined by the total time taken to transfer charge backwards and forwards across the device, and this is made up of a nlrmber of weighted time constants (t”= wRC) associated with the resistance R and capacitance C of various components uf the structure (fig. I-c), plus the transit time t, for electrons to cross the base region. The whole history of improvement in switching speed in bipolar X. OVERVEEWS

C. Hill, P. Hunt / Ian implantation

2

Holecurrent

Electron current

‘I

in bipolar technology

bipolar devices have never been tied to photolithographic resolution, as the equivalent dimension, channel length, has always been in MOS devices; typically base widths have remained a factor of ten smaller than MOS channel lengths. At very high switching speeds, the gain of bipolar devices falls, and a convenient figure of merit is the unity gain frequency fT at which I/i = 1. Very roughly, an optimised circuit can be usefully run at clock speeds of about fr,/lO. An important consequence of the narrow base regions of bipolar devices is their sensitivity to vertical line defects [2]. By acting either as rapid diffusion routes for emitter dopant or as precipitation sites for metals, one such defect can electrically short emitter to collector, destroying transistor action. The short transit times, also mean, however, that bipolar devices can be very tolerant of recombination centres within the base region.

3. Implantation in bipolar technology WO-1990

Fig. 1. Schematic sections through a simple VLSI bipolar transistor and load resistor, showing (a) the distribution of the doped regions, (b) the current flows and depletion layers (hatched) under forward bias conditions, and (c) the resistances and capacitances arising from the doped silicon regions and the depletion layers, respectively, which contribute RC time delays to the speed with which the transistor can be switched on and off.

circuits has been associated with reducing these three parameters R, C and t,. The fabrication techniques universally used for bipolar transistors (fig. la) give intrinsically low transit times t,, because of the narrow base widths attainable by controlling the vertical spacing of emitter, base and collector through controlling the vertical dopant profiles which constitute these regions. Thus, base widths in

Although Shockley patented the concept of forming the bipolar base by ion implantation as early as 1954 [3], the first decade of planar bipolar integrated circuits development (1965-1975) proceeded almost entirely without the use of impl~tation. A transistor structure characteristic of the end of this era is shown in fig. 2a. All the selectively doped areas were fabricated by a chemical deposition of dopant (usually in compound form) followed by a higher temperature “driven-in” stage in which the dopant penetrated laterally and vertically into the single crystal silicon. This approach is adequate and cost effective {and still used) where geometries are undemandingly large (a 3 pm) and base widths are sufficiently wide (> 0.5 pm) that doping variations do not significantly change the base width. The need for implantation arose when attempts to further increase f, from 0.7 GHz by narrowing the boron base under a phosphorus emitter resulted in irreproducible high resistance bases 141, resulting from base compensation by a fast-diffusing phosphorus “tail” in the emitter profile 151. It was already known that this effect could be avoided by the use of high concentration arsenic emitters using either a solid arsenic doped germanosilicate glass [6] or a metallic arsenic vapour [7] as doping source. These techniques were not satisfactory for production; however, ion implanted arsenic emitters were satisfactory, if followed by a high temperaturc heat treatment to anneal the damage, to move the emitter-base junction away from the implanted region by solid state diffusion, and to create the steep-fronted arsenic depth profile characteristic of high concentration arsenic diffusion 181.The availability of commercial ion implanters, developed initially in Government laboratories as a spin-off from the large UK and USA

C. Hill, P. Hunt / Ion implantation

3

in bipolar technology

Base 1 Channel stop

1

1989 Emitter Base Channel stop Buried Nt Base contact Collector contac Resistor

Fig. 2. Schematic sections through silicon integrated circuit bipolar transistor structures, showing the evolution of the structures over the first 15 years and the gradual incorporation of ion implantation for fabricating the doped regions. (A) Structure .typical of the mid-1970s (B) structure typical of the early 1980s and (C) a 1989 one-micron feature size structure. Numbered,regions are those doped by ion implantation: (1) polysilicon emitter (As); (2) channel stop (B); (3) base (B); (4) buried n+ collector (As); (5) collector contact (P); (6) polysilicon resistor (P or As); (7) base contact (B). I. OVERVIEWS

4

C. Hill, P. Hunt / Ion implantation in bipolar technology

Table 1 Summary of the incorporation of ion-implanted doped regions into silicon bipolar integrated circuit technology. The table shows each region of the transistor, the dopant used, the approximate implant energy range and dose range, the typical date of incorporation and the frequency of usage of implantation in modern process technology.

BIPOLAR DEVlCE REGION Buried N~Coll~tar Channel Stop

I Dose

Dopan

1

/Timescalf

i-r

As,Sb B P

Isolation

B

Base

B

Base contact Single XSTL Polysilicon

E B

Emitter

Resistor

Single XSTL Polysai~n

As

Single XSTL Polysilicon

!,P

AS

Table 2 Characteristics and advantages of implantation as a doping source for each region of the bipolar integrated circuit, as compared with the alternative chemical sources shown. The size of the plus and minus signs indicates the relative advantage or disadvantage of implantation; zero indicates no advantage or disadvantage.

Alternative Source

Advantages of Ion Implantation Source

Region of Btpohr Circuit Structure to be Fabricated

Doping Depth Dose AutoCoIli- Defect Soti& Element Control Control Registn. mation density Liqfffd

Buried NsCollector

As,Sb

0

+

+

0

+

Collector Contact

P

0

0

+

0

0

lsotation Doping 1. p-n Junction only 2. Oxide t Channel stop 3. Trench t Channel stop +

Base

--

Gas

(AsSiO) POCL;*POC$+(PSiO) BN +

(BOH) -*(BS!O)

BN +

(BOH) -*(BSiO)

As+

As-+

Base contact Single XSTL Polysitkon Emitter

Resistor

Single XSTL Potysiliin Single XSTL Potysilii

Surface Glass

C. Hill, P. Hunt / Ion implantation in bipolar technology mass-separator programmes of the 40s and 50s [9], enabled production processes incorporating arsenic emitters to appear in the late seventies. A crucial development for this application was the development of the stable high current Freeman ion source [lo], which made the high implantation doses required by emitters (5 x 1015-2 x lOi ions/cm2) a commercial possibility. Once implantations were installed in process lines, and damage annealing techniques were established, the advantages of ion implantation for doping other regions was discovered. In parallel with this, other aspects of bipolar technology had been changed to achieve higher speeds and packing densities so that a typical transistor of the early 80s was as shown in fig. 2b. The emitter is still arsenic-implanted, but the implant is into a polysilicon overlayer from which out-diffusion into the single crystal occurs during anneal, thus enabling very shallow emitter regions of low edge capacitance to be fabricated independently of impact energy and damage. An implanted base allows even narrower base widths to be achieved reproducibly. Recessed oxide isolation, replacing traditional p-n junction isolation, reduces capacitance C,, and increases packing density. Ion implantation made this important change possible, by facilitating the fabrication of a precisely doped channel stop region under the oxide, which prevented the occurrence of n-type surface channels in the silicon substrate material adjacent to the oxide. Segregation of boron during thermal oxidation and the polarity of oxide charge favour the formation of such channels in p-type substrates doped below 1016/cm3. Considerable further development during the 80s has resulted in modem structures similar to that shown schematically in fig. 2c. Use of self-alignment techniques in emitter, base and isolation, and the addition of an implanted boron polysilicon base contact, produces a very compact, low capacitance emitter-base structure. Ion implantation is used for all the other selective doping steps, i.e. in deep trench isolation channel stop, in buried nc collector, in collector contact, and in polysilicon resistor fabrication. The reductions in device area, capacitance and resistance thus achieved enabled circuits with fT = 12 GHz, clock frequency 2 GHz and arrays of 100000 resistors to be fabricated successfully [ll]. A summary of the introduction of ion implantation into bipolar component fabrication, with typical doses and energies used, is given in table 1.

4. Characteristics and advantages of ion implantation for each region of the modem bipolar circuit 4.1. Characteristics

and advantages

A summary of these is given in table 2. The main characteristics of a doping technique are depth, control,

5

dose control, autoregistration capability, collimation, and defect density produced overall. It can be seen that, as compared with alternative doping sources, ion implantation has considerable advantages in most characteristics for the fabrication of most bipolar components. In particular, dose control and autoregistration capability are the two characteristics which have ensured the replacement of most other doping methods by ion implantation. The precise dose control not only guarantees a reproducible, transferable process for the number of ions in each bipolar component, but also, through the dopant-concentration dependence of solid state diffusion, guarantees the precise location of the p-n junctions. Autoregistration, in which the same photoengraved feature is used successively to define several selectively doped regions, allows much denser packing of components than the alignment tolerances between successive photolithographic steps would normally allow. Ion implantation, being a ballistic rather than a thermal doping technique, allows the use of organic photoresist layers as sacrificial doping barriers, thus enormously simplifying self-alignment strategies. In addition to these general advantages, there are aspects of ion implantation particular to each component fabrication, examples of which will now be briefly described. 4.2. Trench isolation The deep oxide-filled trenches shown in fig. 2c need a channel stop region at the bottom as shown. The collimation characteristic of ion implantation is ideal in this application, since before filling, the deep narrow trench can be precisely doped at its base by a boron implant at 90 o to the wafer surface. The defects created by this implant have to be very carefully controlled, however, since they are well placed to act as dislocation sources if mechanical stresses act on the trench region. Such stresses arise inevitably from the trench-filling processes and associated heat treatments. With careful engineering of dose, energy and anneal, an adequate dislocation-free channel stop can be fabricated [12]. 4.3. Base region In this case, the collimation characteristic of ion implantation is unwanted, and can give rise to different lateral penetration distances on either side of the base implant window [13]. This occurs because, in order to avoid channelling down major crystal directions, the implant beam is usually misaligned with the wafer surface normally by a few degrees. Line-of-sight shadowing by one mask edge but not by the other can then produce lateral spreads in ratios up to 1.8 (fig. 3). The depth control of ion implantation, coupled with its easy self-alignment can, however, be used to great effect in achieving very narrow reproducible base regions, as I. OVERVIEWS

C. Hill, P. Hunt / Ion implantation in bipolar technolog)i

6

boron tail profile can be electrically compensated, thus effectively narrowing the base region with little loss of total integrated base electrical dose. This technique has been used to increase fT from 12 GHz to 20 GHz with little deleterious effect on other circuit properties [14]. 4.4. Emitter region

-+021rm; .

--A : 0.2 pm

:

Fig. 3. Experimentally measured two-dimensional depth distributions of boron after impl~tation at 7O to the surface normal through a window in the masking layers shown. The boron concentration contours cover the range 1 X 1019 atom/cm” (1) to 1X10’* atom/cm3 (6). The difference in lateral penetration of dopant beyond the right and left hand mask edges is 0.1 ym.

As can be seen from table 2, the main advantage of ion implantation is the precise control of a high dose of arsenic. In modern devices, this implant is into polysilicon, and the final depth of the n-p junction is determined by the solid state diffusion occurring in emitter (arsenic) and base (boron) regions during the emitter anneal. This approach to shallow junction for-

ProcessingTemp. “C 1400 1200

1000

800

700

600

500

shown in fig. 4. The natural shape of the boron implant profile, which in a single crystal matrix always has some channelled tail, prevents unlimited reduction of base width by simply reducing implant energy. However, by implanting a precisely placed dose of phosphorus through the emitter window, the critical region of the

8

6

IO

12

104/l”K

I 0

I

I

I

Depth (microns)

I

I

Heat Treatment

I

0.8

Fig. 4. concentration-depth profiles through the emitterbase-collector region of a high performance bipolar transistor showing the use of a buried phosphorus implant to electrically compensate the channelled tail of the boron base implant and so obtain a narrower base region. The carrier concentration profiles in the arsenic-implanted polysilicon plus single crystal n-type emitter region, the boron implanted p-type base region, and the epitaxial n collector are shown by bold lines; the compensating phosphorus implant is shown by a light dotted line. For comparison, the bold dotted line shows the carrier profiles in the base-collector region in an unimproved device (after Wilson [14]).

0

Base Width Microns 0.2 0.1 0.06 0.03

Year 1975 1985 1990 1995

0 0 GI Fig. 5. Tie-temperature map showing the region for full anneal of a 40 keV low dose boron implant superimposed on curves giving the loci of time-temperature schedules which redistribute a lOI 40 keV arsenic implant by the diffusion distances (3m) shown. The numbered locations 1-3 show typical heat treatments used in emitter-base anneal as bipolar technology has evolved; location 4 shows the subsecond heat treatment necessary to anneal future narrower bases, if direct implantation of boron is still used (after Hill [15]).

C. Hill, P. Hunt / Ion implantation in bipolar technology

1

ing densities increase, and a proposed future technology based on half-micron feature sizes and oxide-isolated collector contact with a total device area of 4 km2 is expected to have a unity gain frequency fT of 30-35 GHz [ll]. The role of implantation will still be essentially that shown for the one-micron device of fig. 2c. Future improvements are possible, both in simplification of the bipolar technology and in even faster switching circuits, using novel technologies. One simplification is the replacement of the implanted collector plus epitaxial silicon overgrowth, by a directly implanted collector into the silicon substrate. In the past, the combination of high dose (5 x lOr5 ions/cm2) and high energy (5 MeV phosphorus) required ruled out this approach. The lateral shrinkage of device geometries below one micron has reduced both dose and energy requirements to a level that can be achieved using recently developed MeV implanters, as shown in table 3. The reduction in implant energy follows from the vertical shrinkage of the device implemented to achieve higher switching speeds. The large reduction in dose shown in table 3 arises from the lessening influence of collector resistance R, on device speed as compared with the load resistance R,, which must increase as operating currents decrease to maintain the same output signal. Very low current circuit designs, as CML (cur-

mation is increasingly favoured, and base contact (boron in polysilicon or silicide) and even the base itself (codiffusion of arsenic and boron from polysilicon) are being seriously investigated. The reason for this is the increasingly difficulty of removing implant anneal damage while restricting broadening of the narrow emitter and base regions by solid state diffusion. The different activation energies of anneal and diffusion have enabled rapid thermal annealing to solve this problem for present technology (location 3, fig. 5) but shorter anneal times are probably impractical. Using the implant to achieve a precise dose, and trapping the implant defects within a polycrystalline overlayer, is a very attractive alternative.

5. Ion implantation in future bipolar development Analysis of the contributions to delay in switching of modern bipolar integrated circuits [l&16] shows that the major time delays are in the extrinsic components, particularly in the resistance-capacitance products associated with the load resistance R, and the extrinsic collector capacitance C, and load capacitance C,. Evolutionary improvements in these time delays will arise mainly from decreasing component areas as pack-

Table 3 Factors determining the implant dose and energy required to fabricate a phosphorus buried II+ collector by direct implantation in three different bipolar circuits. As operating currents decrease, the value of load resistance to generate a required signal voltage increases, thus enabling the resistance of the buried n+ collector in series to also increase with no significant performance penalty. Parameter Circuit type: Geometry:

High speed Emitter-coupled

logic

Low power Current-mode

one micron

half micron

half micron

1

0.3

0.03

0.6

0.6

0.2

Load resistor R ,_ [ Ci]

600

2000

6661

Total allowable collector series resistance R, = 0.3R, [a]

180

600

2000

50

300

300

2

2

2

Maximum allowable buried collector resistance R, (= R, - RI - R3) [Q]

128

298

1698

Maximum allowable buried n+ sheet resistance S [Q/O]

128

298

Implant conditions to fabricate a buried n+ layer with the above S value underlying a surface region 0.4 pm deep with dopant concentration i 5 x 10i6/cm3: Phosphorus dose [ions/cm*] Energy [keV]

1 x 10’5 800

3x10’4 700

Emitter-collector Signal voltage

current

Zc [mA]

V, [Vj

Epitaxial

collector

Collector

contact

resistance resistance

R, [a] R, [a]

logic

7x10’3 600

I. OVERVIEWS

8

C. Hill, P. Hunt / Ion implantation Base Contact

Emitter Contact

in bipolar technology

do so for the forseeable future. Bipolar technologies of the next decade may well incorporate MeV implantation and implanted compound synthesis of Si02 and Co%,. In shallow junction fabrication, implantation into overlayers to combine the precise dose of implantation with the defect-free steep p-n junctions characteristic of high concentration diffusion from a polycrystalline source will probably be favoured.

Acknowledgements -

.,U1,s,,,n,,,m, BuriedSilicideInterconnectto Collector Contact

Fig. 6. A possible future minimum resistance and capacitance bipolar transistor structure capable of switching speeds up to 50 GHz. Regions likely to be implanted are: (1) polysilicon emitter, (3) base region, (4) buried silicide collector, (7) base contact and (8) oxide isolation (SIMOX). After Hunt [ll].

This work was supported by the EEC and GEC-Plessey Semiconductors Ltd., through the collaborative project STORM and TIP-BASE, and thanks are due to both bodies for permission to publish.

References rent mode logic) will favour the direct implant buried nt approach. Faster switching speeds will require further minimisation of capacitances, and a radically different technological approach. A possible implementation is shown in fig. 6 [ll],in which all the silicon doping steps and two compound synthesis steps can be carried out by ion implantation and suitable anneals. The p-n junction areas are reduced to the minimum required for bipolar switching, and oxide isolation is used throughout. The device area is reduced by a buried base contact and buried silicide collector contact. Fabrication could involve oxygen implantation to create the back oxide isolation, cobalt impl~tatio~ to produce buried silicide, and selective epitaxy in an oxide well to create lateral oxide isolation. Emitter-base fabrication could well be a single step operation by vertical solid state diffusion from an arsenic and boron implanted polysihcon layer, while lateral diffusion from a boron implanted polysilicon layer into the epitaxial material creates the base contact. Such a device should achieve fT values of 50 GHz 1111.

6. Conclusions Ion impl~tation has found an increasingly comprehensive and diverse role in selective doping in integrated circuit bipolar technology, and will continue to

[l] Physics of Semiconductor Devices (Wiley, New York, 1981). [2] C. Hill, Proc. 5th Xnt. Conf. on Ion Beam Modification of Materials, Nucl. Instr. and Meth. Bl9/20 (1987) 348. [3] W. Shockley, US Patent 2787564 (1954). [4] T. Tokayama, T. Ikeda and T. Tsuchimoto, Proc. 4th Microelectronics Congress (Oldenburg, Munich, 1970) p. 36. [5] J.C.C. Tsai, Proc. IEEE 57 (1969) 1499. [6] K. Fujinima, T. Sakamoto, T. Abe, K. Sato and Y. Ohmura, Proc. 1st Conf. on Solid State Devices, J. Jpn. Sot. Appl. Phys. 39 (1969) 71. [7] T.L. Chiu and H.N. Ghosh, IBM J. Res. Dev. 15 (1971) 464. [S] V.G.K. Reddi and A.Y.C. Yu, Solid State Technol. 15 (1972) 35. [9] G. Dearnaley, J.H. Freeman, R.S. Nelson and J. Stephen, Ion Implantation (North-Holland, Amsterdam, 1972). [lo] J.H. Freeman, Nucl. Instr. and Meth. 22 (1963) 306. [ll] P.C. Hunt, IEDM Tech. Digest 1989 (IEEE, Piscataway, NJ, 1989) p. 791. 1121 M.C. Wilson and D.J. Bazley, Plessey Research Caswell Technical Report A11/566/88 (19%). [13] P.J. Pearson and C. Hill, J. Phys. (Paris) 49 (1988) 0%515. [14] M.C. Wilson, Proc. ESSDERC 90, eds. W. Eccleston and P. Rosser, (Adam Hilger, Bristol, 1990) p. 349. [15] C. Hill, in: Laser Solid Interactions and Transient Thermal Processing of Materials, eds. J. Narayan, W.L. Brown and R.A. Lemons (Norm-HoBand, New York, 1983) p. 381. [16] P. Ashburn, IEEE J. Solid State Circuits 24 (1989) 512.