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Physical investigation of the impact of electrolessly deposited self-aligned caps on insulation of copper interconnects
Microelectronic Engineering 85 (2008) 2051–2054
Contents lists available at ScienceDirect
Microelectronic Engineering journal homepage: www.elsevier.com/locate/mee
Physical investigation of the impact of electrolessly deposited self-aligned caps on insulation of copper interconnects S. Olivier a,*, T. Decorps b, M. Bernard a, P.H. Haumesser a, G. Passemard b a b
CEA-LETI-MINATEC, 17 rue des Martyrs, F38054 Grenoble cedex 9, France STMicoelectronics, 850 rue Jean Monnet, 38920 Crolles cedex, France
a r t i c l e
i n f o
Article history: Received 17 March 2008 Accepted 16 April 2008 Available online 24 April 2008 Keywords: Copper interconnects Self-aligned barriers Electroless deposition CoWP Process selectivity
a b s t r a c t With the miniaturization of ULSI circuits and the associated increase of current density up to several MA/cm2, copper interconnects are facing electromigration issues at the top interface with the dielectric capping layer SiC(N). A promising solution is to insert selectively on top of copper lines a CoWP metallic selfaligned encapsulation layer, deposited using a wet electroless process. We study the impact of this process on electrical line insulation as a function of cap thickness at the 65 nm technology node and we investigate the physical origin of leakage currents. Below a critical thickness, only a slight leakage current increase of less than one decade is observed, remaining within the specification for self-aligned capping layer processes. Above this critical thickness, large leakage currents are generated due to the combined effect of lateral growth and the presence of parasitic redeposited nodules. We show that a simple phenomenological model allows to reproduce the experimental data, to assess quantitatively the contribution of parasitic defects, and to predict that the self-aligned barrier technology should be extendible up to the 32 nm node, provided that a thin cap layer of less than 8 nm is used. Ó 2008 Elsevier B.V. All rights reserved.
1. Introduction With the constant miniaturization of ULSI circuits and the associated increase of current density up to several MA/cm2, resistance to electromigration phenomena becomes a great challenge. Today electromigration failures have been found to occur at the interface between copper and the top encapsulation dielectric layer which is typically SiC(N). In the last years, metallic self-aligned encapsulation layers have been widely investigated worldwide in order to overcome the electromigration issue by taking advantage of the stronger metal–metal interface. These metallic layers, generally consisting of a cobalt alloy, are deposited selectively on top of the copper lines using a wet electroless process [1,2]. Ideally, this process should not affect the electrical properties of the interconnects, i.e. preserve line resistance and line insulation. Process selectivity which allows to preserve line insulation is the most challenging property to achieve due to the intrinsic reactive nature of the electroless chemistries. In this work, we analyse the impact of a CoWP process on line insulation. We present quantitative measurements of leakage currents between neighboring lines at the 65 nm technology node and we investigate the physical origins of these leakage currents. We show that a simple phenomenological model * Corresponding author. Tel.: +33 438781036; fax: +33 438783034. E-mail address: [email protected] (S. Olivier). 0167-9317/$ - see front matter Ó 2008 Elsevier B.V. All rights reserved. doi:10.1016/j.mee.2008.04.015
allows to reproduce the experimental data and to assess quantitatively the contribution of parasitic defects. 2. Experimental CoWP capping layers were deposited using a full wet Pd-activated process in a 300 mm Raider equipment from Semitool [1]. The process, illustrated in Fig. 1, consists in three steps: (i) a wet preclean to remove copper oxide and organic CMP (Chemical Mechanical Polishing) residues, (ii) the deposition of a thin Pd film (1–2 nm thickness) in order to obtain a surface with superior catalytic properties, and finally (iii) the electroless deposition itself which initiates selectively on the catalytic Pd surface. Surface morphology was analysed by SEM. Cap thickness was determined by AFM measurements. Dimensional analysis of SEM pictures was used to measure the lateral extension of the capping layers. Metallic contamination on the interline dielectric was investigated by TEM-EELS. Finally, electrical measurements of leakage current between adjacent lines were performed on 90 nm/ 90 nm (width/spacing) and 90 nm/120 nm comb/serpentine structures. Statistical measurements were collected on 30 dies over 300 mm wafers. For each set of data, the median leakage current was extracted as well as the dispersion defined as the difference between percentile 75% and percentile 25% of the leakage currents.
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Fig. 1. Process flow of Pd-activated CoWP electroless deposition.
deposition in this thickness range, metallic contamination on the interline dielectric was investigated by TEM-EELS as shown in Figs. 3b and c. The EELS map of cobalt evidences very clearly the CoWP cap on top of the copper lines but also a slight cobalt contamination at the surface of the interline dielectric. This residual contamination was also confirmed by EDX analysis (not shown here). We attribute the 1 decade leakage current increase observed below the critical thickness to this slight contamination. The experimental evidence that leakage current is not proportional to the deposited CoWP thickness below the critical thickness is an indication that this residual contamination is independent on thickness and consequently probably does not consist in metallic cobalt but rather might consist in cobalt ions trapped on the dielectric subsurface, creating a conduction path as soon as voltage is applied to the structure. Fig. 2. Median leakage current in 90/90 nm and 90/120 nm comb/serpentine structures as a function of CoWP cap thickness.
3. Results, model and discussion 3.1. Experimental leakage current results The experimental median leakage currents for 90 nm/90 nm and 90 nm/120 nm lines are presented in Fig. 2 as a function of cap thickness. The evolution of leakage current as a function of cap thickness clearly presents two regimes. For both test structures, the median leakage current remains roughly constant, approximately one decade higher than the post-CMP reference, up to a critical thickness which depends on line spacing. This critical thickness is around 22 nm and 25 nm for 90 nm and 120 nm spacing, respectively. Above this critical thickness, the median leakage current increases dramatically.
3.3. Leakage evolution above the critical thickness The comparison of top view SEM pictures of 90 nm/90 nm comb/ serpentines structures taken below and above the critical thickness are shown in Figs. 4a and b, respectively. They bring a first insight into the physical origin of leakage current increase above the critical thickness. Two phenomena can be observed: firstly the presence of parasitic CoWP nodules randomly redeposited on the wafer surface with a size proportional to the cap thickness and secondly a lateral growth of the cap (due to the roughly isotropic nature of the deposition reaction) leading to a progressive reduction of line spacing when deposited thickness increases. Above a critical thickness for which the nodule diameter starts to exceed the remaining interline spacing, the combination of these two phenomena gives rise to local shortcuts between adjacent lines and therefore to a large increase of leakage currents. This analysis is consistent with the fact that the experimental critical thickness is larger for the 120 nm than for the 90 nm spacing (Fig. 2).
3.2. Leakage evolution below the critical thickness 3.4. Phenomenological model The top-view SEM picture of a 90 nm/90 nm comb/serpentine structure covered with a 15 nm CoWP cap, i.e. below the critical thickness, is printed in Fig. 3a. From the pure morphological standpoint, the CoWP deposit appears to be very selective on the copper lines with no defect visible on the dielectric surface. In order to investigate the physical origin of the slight leakage current due to CoWP
Fig. 3. (a) SEM picture of a 90/90 nm comb/serpentine structure with a 15 nm CoWP cap; (b) TEM cross-section; (c) EELS map of cobalt showing a slight residual cobalt contamination on the interline dielectric surface.
In order to pursue this analysis and to quantify the impact of parasitic redeposited nodules on leakage current, we have developed a phenomenological model detailed in the following where lateral
Fig. 4. SEM pictures of 90/90 nm comb/serpentine structures with a CoWP cap of (a) 21 nm (below critical thickness) and (b) 27 nm (above critical thickness).
S. Olivier et al. / Microelectronic Engineering 85 (2008) 2051–2054
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increases with increasing deposited thickness) and L = 5.5 m is the length of the comb/serpentines structures tested. Dx only depends on geometrical parameters and reads: 1 r t s0 2 ð6Þ Dx ¼ 2 1 þ a a
Fig. 5. Schematic representation of the origin of leakage currents (a) below critical thickness; (b) at critical thickness; (c) above critical thickness for a nodule centered between two lines; (d) above critical thickness for a non-centered nodule. Dx is the nodule center region where nodules are bridging adjacent lines.
growth is taken into account and where each nodule is considered as an ohmic parasitic resistance. Below the critical thickness (Fig. 5a), the size of the parasitic nodules is smaller than the interline spacing. The nodules do not generate any additional leakage current so that the leakage current remains constant, and reads I ¼ I0
ð1Þ
where I0 is the sum of the post-CMP leakage current and of the residual leakage current associated to uniform contamination of the interline dielectric surface, as explained above. The critical thickness for which the nodule diameter is equal to the remaining interline spacing defines the onset of additional leakage currents (Fig. 5b). This thickness reads: tc ¼
s0 þ ar 2 1 þ 1a
ð2Þ
where s0 is the initial interline spacing between the copper lines, r is the copper line recess (possibly induced by the preclean chemistry) with respect to the dielectric surface, and a is the anisotropy growth coefficient of the CoWP capping layer which is equal to the ratio between vertical and lateral growth rates. For a perfectly isotropic deposition, this ratio is equal to unity. However, experimentally, the deposition reaction can be anisotropic with a either smaller or larger than 1, depending on the limiting step of the complex electroless deposition mechanism. Above the critical thickness (Figs. 5c and d), an increasing number of redeposited nodules are likely to bridge several lines creating an increasing number of parasitic resistances in parallel. The leakage current now reads: I ¼ I0 þ N
U R
where t is the deposited cap thickness. Among all the parameters of this phenomenological model, some of them can be determined experimentally like the initial interline spacing s0, the line recess r and the growth anisotropy a. The fitting parameters of the model are the contact resistance Rc between the bridging nodules and the lines, the ohmic section A of the nodules and the surface density D of the parasitic nodules. 3.5. Experimental determination of the geometric parameters of the model The post-CMP interline spacing s0 is not simply the nominal interline spacing as this latter does not include the TaN/Ta sidewall barrier. However s0 was easily measured from top-view SEM pictures of post-CMP structures. The values of s0 were found to be 105 nm and 130 nm for the 90 nm/90 nm and 90 nm/120 nm structures, respectively. The line recess was measured thanks to AFM measurements of post-CMP structures. It was found to be zero with an optimized process, i.e. optimized preclean and optimized Pd activation step. The accurate measurement of growth anisotropy was less straightforward. For that purpose, vertical growth was determined by performing a series of AFM measurements for various deposition durations whereas lateral growth was determined by the dimensional analysis of the remaining interline spacing in top-view SEM pictures. Vertical and lateral growth are presented in Figs. 6a and b, respectively as a function of deposition duration. In both cases, it was difficult to obtain very accurate measurements due to the growth dependence of the CoWP cap on the
ð3Þ
where N is the number of bridging nodules, R the resistance of an individual nodule and U = 2V is the voltage applied to perform the measurement of leakage currents. The resistance of an individual nodule has two contributions which are (i) the contact resistance between the nodule and each of the adjacent lines and (ii) the resistance of the nodule itself which is considered as an ohmic resistance of length equal to the remaining interline spacing s and of ohmic section A into which the current flow is concentrated. The resistance thus reads: R ¼ 2Rc þ q
s A
ð4Þ
where q is the resistivity of the nodule and can be reasonably estimated to be roughly 100 lX cm, i.e. about one order of magnitude larger than the resistivity of pure bulk cobalt which is reported to be 6 lX cm. Finally, the number of bridging nodules reads: N ¼ D DxL
ð5Þ
where D is the surface density of parasitic nodules, Dx is the width of the domain where nodules are effectively bridging (this width
Fig. 6. (a) Vertical growth kinetics determined by AFM measurements; (b) lateral growth kinetics determined by dimensional SEM analysis; (c) vertical growth as a function of lateral growth yielding the measurement of the anisotropy growth coefficient a.
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Fig. 7. Experimental and simulated median leakage currents as a function of CoWP cap thickness for various line spacings. Inset: experimental statistical leakage current results measured in 90/120 nm comb/serpentine structures for various CoWP cap thicknesses.
underlying copper grain orientation. In a previous work, we had shown that large final thickness and lateral growth variations of up to 30% occur at the micrometer scale due to a preferential nucleation of the Pd–CoWP on (1 1 1) copper grains [3]. Vertical and lateral growth exhibit a similar kinetics composed of two steps: in both cases, a nucleation time is followed by a linear growth of the cap. Lateral growth seems to be slightly faster for the largest interline spacing of 120 nm but, taking into account the measurement uncertainty, this difference is not significant. Finally, the ratio of vertical growth over lateral growth is plotted in Fig. 6c. This ratio is found to be linear, allowing to determine the anisotropy growth coefficient of the CoWP cap a = 0.72. This value, which is smaller than 1, indicates that lateral growth is faster than vertical growth, most likely owing to complex mass transfer phenomena in the vicinity of copper lines. 3.6. Confrontation of the model with the experimental results Fig. 7 shows that experimental leakage current results for 90 and 120 nm spacing are very well reproduced by the phenomenological model using the fitting parameters Rc = 1000 X, A = 1 nm2, and D = 3/cm2. In particular, the critical thickness above which leakage current increases dramatically is very well predicted for both spacing values and the evolution of the leakage amplitude above the critical thickness is also very well reproduced. The model, which predicts an abrupt increase of leakage at the thickness threshold, is in very good agreement with the dispersion of the experimental data, as shown in the inset of Fig. 7. For a 21 nm cap thickness, i.e. below the critical thickness, which corresponds to a regime of constant leakage current in the model, the dispersion of the experimental data is as low as 0.2 decade, whereas for a 27 nm cap thickness, i.e. slightly above the critical thickness which is a region of large current variations for small thickness variations in the model, the dispersion of the experimental data over the 300 nm wafers is much larger as it reaches 1.3 decades. Finally the major conclusion that can be drawn from this model is that an extremely low density of parasitic nodules of 3/cm2, that is typically about ten per wafer die, is responsible for a large
increase of leakage currents beyond acceptable values. These parasitic nodules which are probably formed in the volume of the bath act really as killer defects above the critical thickness. However, as shown by the model and by the experimental data, the maximal allowed thickness is 22 nm for 90 nm/90 nm lines which correspond to the 65 nm node. This means that in view of a hybrid integration scheme using a thin CoWP cap in the range 5–10 nm to ensure a good resistance against electromigration, covered by a typically 30–40 nm SiCN dielectric barrier to ensure good barrier properties against copper diffusion, line insulation will be preserved, far from the critical limit. With further reduction of the dimensions, the maximal allowed thickness will decrease and the model can be used to predict quantitatively this upper thickness limit. The maximal allowed thickness will decrease from 22 nm for a 90 nm spacing (65 nm technology node) down to 12 nm for a 60 nm spacing (45 nm node) and further down to 8 nm for a 40 nm spacing (32 nm node). In conclusion, the use of CoWP self-aligned capping layers to overcome the electromigration issue in copper interconnects should be in principle extendible to the 32 nm technology node, while still preserving good line insulation. 4. Conclusion and perspectives In this contribution, the impact of a Pd–CoWP self-aligned capping layer process on electrical line insulation was thoroughly investigated as a function of cap thickness. Two regimes were clearly identified. Below a critical thickness depending on the interline spacing, only a slight leakage increase of less than one decade is generated by the Pd–CoWP process, presumably due to cobalt ions trapped on the dielectric subsurface. However, this small leakage remains within the specification of self-aligned capping layer processes. Above the critical thickness, large leakage currents are generated due to the combined effect of lateral growth and the presence of even a very small number of parasitic redeposited nodules (a few nodules per wafer die), as could be quantified by using a phenomenological model. These results highlight that the great challenge of this class of electroless processes is to gain a better control of the electroless reaction kinetics through fine optimisation of the nature of the deposition chemistry, pH and temperature, in order to minimize lateral growth and inhibit the formation of parasitic nodules. However, despite the undesired phenomenon of parasitic defects, the self-aligned barrier technology should still be extendible to future technology nodes up to the 32 nm node, provided that a thin cap layer of less than 8 nm is used. Acknowledgements This work has been carried out in the frame of the CEA-Leti/ ALLIANCE collaboration. Authors wish to thank Semitool for providing equipment and support for process and Enthone for supplying the electroless chemistries. They also gratefully acknowledge the IST project Pullnano No. 026828. References [1] T. Decorps, P.H. Haumesser, S. Olivier, A. Roule, M. Joulaud, O. Pollet, X. Avale, G. Passemard, Microelectronic Engineering 83 (2006) 2082–2087. [2] J. Gambino, J. Wynne, J. Gill, S. Mongeon, D. Meatyard, B. Lee, H. Bamnolker, L. Hall, N. Li, M. Hernandez, et al., Microelectronic Engineering 83 (2006) 2059– 2067. [3] S. Olivier, T. Decorps, P.H. Haumesser, G. Passemard, X. Avale, M. Joulaud, O. Pollet, in: Proceedings of the Electrochemical Society Conference, Cancun, Mexico, November 2006.
Contents lists available at ScienceDirect
Microelectronic Engineering journal homepage: www.elsevier.com/locate/mee
Physical investigation of the impact of electrolessly deposited self-aligned caps on insulation of copper interconnects S. Olivier a,*, T. Decorps b, M. Bernard a, P.H. Haumesser a, G. Passemard b a b
CEA-LETI-MINATEC, 17 rue des Martyrs, F38054 Grenoble cedex 9, France STMicoelectronics, 850 rue Jean Monnet, 38920 Crolles cedex, France
a r t i c l e
i n f o
Article history: Received 17 March 2008 Accepted 16 April 2008 Available online 24 April 2008 Keywords: Copper interconnects Self-aligned barriers Electroless deposition CoWP Process selectivity
a b s t r a c t With the miniaturization of ULSI circuits and the associated increase of current density up to several MA/cm2, copper interconnects are facing electromigration issues at the top interface with the dielectric capping layer SiC(N). A promising solution is to insert selectively on top of copper lines a CoWP metallic selfaligned encapsulation layer, deposited using a wet electroless process. We study the impact of this process on electrical line insulation as a function of cap thickness at the 65 nm technology node and we investigate the physical origin of leakage currents. Below a critical thickness, only a slight leakage current increase of less than one decade is observed, remaining within the specification for self-aligned capping layer processes. Above this critical thickness, large leakage currents are generated due to the combined effect of lateral growth and the presence of parasitic redeposited nodules. We show that a simple phenomenological model allows to reproduce the experimental data, to assess quantitatively the contribution of parasitic defects, and to predict that the self-aligned barrier technology should be extendible up to the 32 nm node, provided that a thin cap layer of less than 8 nm is used. Ó 2008 Elsevier B.V. All rights reserved.
1. Introduction With the constant miniaturization of ULSI circuits and the associated increase of current density up to several MA/cm2, resistance to electromigration phenomena becomes a great challenge. Today electromigration failures have been found to occur at the interface between copper and the top encapsulation dielectric layer which is typically SiC(N). In the last years, metallic self-aligned encapsulation layers have been widely investigated worldwide in order to overcome the electromigration issue by taking advantage of the stronger metal–metal interface. These metallic layers, generally consisting of a cobalt alloy, are deposited selectively on top of the copper lines using a wet electroless process [1,2]. Ideally, this process should not affect the electrical properties of the interconnects, i.e. preserve line resistance and line insulation. Process selectivity which allows to preserve line insulation is the most challenging property to achieve due to the intrinsic reactive nature of the electroless chemistries. In this work, we analyse the impact of a CoWP process on line insulation. We present quantitative measurements of leakage currents between neighboring lines at the 65 nm technology node and we investigate the physical origins of these leakage currents. We show that a simple phenomenological model * Corresponding author. Tel.: +33 438781036; fax: +33 438783034. E-mail address: [email protected] (S. Olivier). 0167-9317/$ - see front matter Ó 2008 Elsevier B.V. All rights reserved. doi:10.1016/j.mee.2008.04.015
allows to reproduce the experimental data and to assess quantitatively the contribution of parasitic defects. 2. Experimental CoWP capping layers were deposited using a full wet Pd-activated process in a 300 mm Raider equipment from Semitool [1]. The process, illustrated in Fig. 1, consists in three steps: (i) a wet preclean to remove copper oxide and organic CMP (Chemical Mechanical Polishing) residues, (ii) the deposition of a thin Pd film (1–2 nm thickness) in order to obtain a surface with superior catalytic properties, and finally (iii) the electroless deposition itself which initiates selectively on the catalytic Pd surface. Surface morphology was analysed by SEM. Cap thickness was determined by AFM measurements. Dimensional analysis of SEM pictures was used to measure the lateral extension of the capping layers. Metallic contamination on the interline dielectric was investigated by TEM-EELS. Finally, electrical measurements of leakage current between adjacent lines were performed on 90 nm/ 90 nm (width/spacing) and 90 nm/120 nm comb/serpentine structures. Statistical measurements were collected on 30 dies over 300 mm wafers. For each set of data, the median leakage current was extracted as well as the dispersion defined as the difference between percentile 75% and percentile 25% of the leakage currents.
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Fig. 1. Process flow of Pd-activated CoWP electroless deposition.
deposition in this thickness range, metallic contamination on the interline dielectric was investigated by TEM-EELS as shown in Figs. 3b and c. The EELS map of cobalt evidences very clearly the CoWP cap on top of the copper lines but also a slight cobalt contamination at the surface of the interline dielectric. This residual contamination was also confirmed by EDX analysis (not shown here). We attribute the 1 decade leakage current increase observed below the critical thickness to this slight contamination. The experimental evidence that leakage current is not proportional to the deposited CoWP thickness below the critical thickness is an indication that this residual contamination is independent on thickness and consequently probably does not consist in metallic cobalt but rather might consist in cobalt ions trapped on the dielectric subsurface, creating a conduction path as soon as voltage is applied to the structure. Fig. 2. Median leakage current in 90/90 nm and 90/120 nm comb/serpentine structures as a function of CoWP cap thickness.
3. Results, model and discussion 3.1. Experimental leakage current results The experimental median leakage currents for 90 nm/90 nm and 90 nm/120 nm lines are presented in Fig. 2 as a function of cap thickness. The evolution of leakage current as a function of cap thickness clearly presents two regimes. For both test structures, the median leakage current remains roughly constant, approximately one decade higher than the post-CMP reference, up to a critical thickness which depends on line spacing. This critical thickness is around 22 nm and 25 nm for 90 nm and 120 nm spacing, respectively. Above this critical thickness, the median leakage current increases dramatically.
3.3. Leakage evolution above the critical thickness The comparison of top view SEM pictures of 90 nm/90 nm comb/ serpentines structures taken below and above the critical thickness are shown in Figs. 4a and b, respectively. They bring a first insight into the physical origin of leakage current increase above the critical thickness. Two phenomena can be observed: firstly the presence of parasitic CoWP nodules randomly redeposited on the wafer surface with a size proportional to the cap thickness and secondly a lateral growth of the cap (due to the roughly isotropic nature of the deposition reaction) leading to a progressive reduction of line spacing when deposited thickness increases. Above a critical thickness for which the nodule diameter starts to exceed the remaining interline spacing, the combination of these two phenomena gives rise to local shortcuts between adjacent lines and therefore to a large increase of leakage currents. This analysis is consistent with the fact that the experimental critical thickness is larger for the 120 nm than for the 90 nm spacing (Fig. 2).
3.2. Leakage evolution below the critical thickness 3.4. Phenomenological model The top-view SEM picture of a 90 nm/90 nm comb/serpentine structure covered with a 15 nm CoWP cap, i.e. below the critical thickness, is printed in Fig. 3a. From the pure morphological standpoint, the CoWP deposit appears to be very selective on the copper lines with no defect visible on the dielectric surface. In order to investigate the physical origin of the slight leakage current due to CoWP
Fig. 3. (a) SEM picture of a 90/90 nm comb/serpentine structure with a 15 nm CoWP cap; (b) TEM cross-section; (c) EELS map of cobalt showing a slight residual cobalt contamination on the interline dielectric surface.
In order to pursue this analysis and to quantify the impact of parasitic redeposited nodules on leakage current, we have developed a phenomenological model detailed in the following where lateral
Fig. 4. SEM pictures of 90/90 nm comb/serpentine structures with a CoWP cap of (a) 21 nm (below critical thickness) and (b) 27 nm (above critical thickness).
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increases with increasing deposited thickness) and L = 5.5 m is the length of the comb/serpentines structures tested. Dx only depends on geometrical parameters and reads: 1 r t s0 2 ð6Þ Dx ¼ 2 1 þ a a
Fig. 5. Schematic representation of the origin of leakage currents (a) below critical thickness; (b) at critical thickness; (c) above critical thickness for a nodule centered between two lines; (d) above critical thickness for a non-centered nodule. Dx is the nodule center region where nodules are bridging adjacent lines.
growth is taken into account and where each nodule is considered as an ohmic parasitic resistance. Below the critical thickness (Fig. 5a), the size of the parasitic nodules is smaller than the interline spacing. The nodules do not generate any additional leakage current so that the leakage current remains constant, and reads I ¼ I0
ð1Þ
where I0 is the sum of the post-CMP leakage current and of the residual leakage current associated to uniform contamination of the interline dielectric surface, as explained above. The critical thickness for which the nodule diameter is equal to the remaining interline spacing defines the onset of additional leakage currents (Fig. 5b). This thickness reads: tc ¼
s0 þ ar 2 1 þ 1a
ð2Þ
where s0 is the initial interline spacing between the copper lines, r is the copper line recess (possibly induced by the preclean chemistry) with respect to the dielectric surface, and a is the anisotropy growth coefficient of the CoWP capping layer which is equal to the ratio between vertical and lateral growth rates. For a perfectly isotropic deposition, this ratio is equal to unity. However, experimentally, the deposition reaction can be anisotropic with a either smaller or larger than 1, depending on the limiting step of the complex electroless deposition mechanism. Above the critical thickness (Figs. 5c and d), an increasing number of redeposited nodules are likely to bridge several lines creating an increasing number of parasitic resistances in parallel. The leakage current now reads: I ¼ I0 þ N
U R
where t is the deposited cap thickness. Among all the parameters of this phenomenological model, some of them can be determined experimentally like the initial interline spacing s0, the line recess r and the growth anisotropy a. The fitting parameters of the model are the contact resistance Rc between the bridging nodules and the lines, the ohmic section A of the nodules and the surface density D of the parasitic nodules. 3.5. Experimental determination of the geometric parameters of the model The post-CMP interline spacing s0 is not simply the nominal interline spacing as this latter does not include the TaN/Ta sidewall barrier. However s0 was easily measured from top-view SEM pictures of post-CMP structures. The values of s0 were found to be 105 nm and 130 nm for the 90 nm/90 nm and 90 nm/120 nm structures, respectively. The line recess was measured thanks to AFM measurements of post-CMP structures. It was found to be zero with an optimized process, i.e. optimized preclean and optimized Pd activation step. The accurate measurement of growth anisotropy was less straightforward. For that purpose, vertical growth was determined by performing a series of AFM measurements for various deposition durations whereas lateral growth was determined by the dimensional analysis of the remaining interline spacing in top-view SEM pictures. Vertical and lateral growth are presented in Figs. 6a and b, respectively as a function of deposition duration. In both cases, it was difficult to obtain very accurate measurements due to the growth dependence of the CoWP cap on the
ð3Þ
where N is the number of bridging nodules, R the resistance of an individual nodule and U = 2V is the voltage applied to perform the measurement of leakage currents. The resistance of an individual nodule has two contributions which are (i) the contact resistance between the nodule and each of the adjacent lines and (ii) the resistance of the nodule itself which is considered as an ohmic resistance of length equal to the remaining interline spacing s and of ohmic section A into which the current flow is concentrated. The resistance thus reads: R ¼ 2Rc þ q
s A
ð4Þ
where q is the resistivity of the nodule and can be reasonably estimated to be roughly 100 lX cm, i.e. about one order of magnitude larger than the resistivity of pure bulk cobalt which is reported to be 6 lX cm. Finally, the number of bridging nodules reads: N ¼ D DxL
ð5Þ
where D is the surface density of parasitic nodules, Dx is the width of the domain where nodules are effectively bridging (this width
Fig. 6. (a) Vertical growth kinetics determined by AFM measurements; (b) lateral growth kinetics determined by dimensional SEM analysis; (c) vertical growth as a function of lateral growth yielding the measurement of the anisotropy growth coefficient a.
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Fig. 7. Experimental and simulated median leakage currents as a function of CoWP cap thickness for various line spacings. Inset: experimental statistical leakage current results measured in 90/120 nm comb/serpentine structures for various CoWP cap thicknesses.
underlying copper grain orientation. In a previous work, we had shown that large final thickness and lateral growth variations of up to 30% occur at the micrometer scale due to a preferential nucleation of the Pd–CoWP on (1 1 1) copper grains [3]. Vertical and lateral growth exhibit a similar kinetics composed of two steps: in both cases, a nucleation time is followed by a linear growth of the cap. Lateral growth seems to be slightly faster for the largest interline spacing of 120 nm but, taking into account the measurement uncertainty, this difference is not significant. Finally, the ratio of vertical growth over lateral growth is plotted in Fig. 6c. This ratio is found to be linear, allowing to determine the anisotropy growth coefficient of the CoWP cap a = 0.72. This value, which is smaller than 1, indicates that lateral growth is faster than vertical growth, most likely owing to complex mass transfer phenomena in the vicinity of copper lines. 3.6. Confrontation of the model with the experimental results Fig. 7 shows that experimental leakage current results for 90 and 120 nm spacing are very well reproduced by the phenomenological model using the fitting parameters Rc = 1000 X, A = 1 nm2, and D = 3/cm2. In particular, the critical thickness above which leakage current increases dramatically is very well predicted for both spacing values and the evolution of the leakage amplitude above the critical thickness is also very well reproduced. The model, which predicts an abrupt increase of leakage at the thickness threshold, is in very good agreement with the dispersion of the experimental data, as shown in the inset of Fig. 7. For a 21 nm cap thickness, i.e. below the critical thickness, which corresponds to a regime of constant leakage current in the model, the dispersion of the experimental data is as low as 0.2 decade, whereas for a 27 nm cap thickness, i.e. slightly above the critical thickness which is a region of large current variations for small thickness variations in the model, the dispersion of the experimental data over the 300 nm wafers is much larger as it reaches 1.3 decades. Finally the major conclusion that can be drawn from this model is that an extremely low density of parasitic nodules of 3/cm2, that is typically about ten per wafer die, is responsible for a large
increase of leakage currents beyond acceptable values. These parasitic nodules which are probably formed in the volume of the bath act really as killer defects above the critical thickness. However, as shown by the model and by the experimental data, the maximal allowed thickness is 22 nm for 90 nm/90 nm lines which correspond to the 65 nm node. This means that in view of a hybrid integration scheme using a thin CoWP cap in the range 5–10 nm to ensure a good resistance against electromigration, covered by a typically 30–40 nm SiCN dielectric barrier to ensure good barrier properties against copper diffusion, line insulation will be preserved, far from the critical limit. With further reduction of the dimensions, the maximal allowed thickness will decrease and the model can be used to predict quantitatively this upper thickness limit. The maximal allowed thickness will decrease from 22 nm for a 90 nm spacing (65 nm technology node) down to 12 nm for a 60 nm spacing (45 nm node) and further down to 8 nm for a 40 nm spacing (32 nm node). In conclusion, the use of CoWP self-aligned capping layers to overcome the electromigration issue in copper interconnects should be in principle extendible to the 32 nm technology node, while still preserving good line insulation. 4. Conclusion and perspectives In this contribution, the impact of a Pd–CoWP self-aligned capping layer process on electrical line insulation was thoroughly investigated as a function of cap thickness. Two regimes were clearly identified. Below a critical thickness depending on the interline spacing, only a slight leakage increase of less than one decade is generated by the Pd–CoWP process, presumably due to cobalt ions trapped on the dielectric subsurface. However, this small leakage remains within the specification of self-aligned capping layer processes. Above the critical thickness, large leakage currents are generated due to the combined effect of lateral growth and the presence of even a very small number of parasitic redeposited nodules (a few nodules per wafer die), as could be quantified by using a phenomenological model. These results highlight that the great challenge of this class of electroless processes is to gain a better control of the electroless reaction kinetics through fine optimisation of the nature of the deposition chemistry, pH and temperature, in order to minimize lateral growth and inhibit the formation of parasitic nodules. However, despite the undesired phenomenon of parasitic defects, the self-aligned barrier technology should still be extendible to future technology nodes up to the 32 nm node, provided that a thin cap layer of less than 8 nm is used. Acknowledgements This work has been carried out in the frame of the CEA-Leti/ ALLIANCE collaboration. Authors wish to thank Semitool for providing equipment and support for process and Enthone for supplying the electroless chemistries. They also gratefully acknowledge the IST project Pullnano No. 026828. References [1] T. Decorps, P.H. Haumesser, S. Olivier, A. Roule, M. Joulaud, O. Pollet, X. Avale, G. Passemard, Microelectronic Engineering 83 (2006) 2082–2087. [2] J. Gambino, J. Wynne, J. Gill, S. Mongeon, D. Meatyard, B. Lee, H. Bamnolker, L. Hall, N. Li, M. Hernandez, et al., Microelectronic Engineering 83 (2006) 2059– 2067. [3] S. Olivier, T. Decorps, P.H. Haumesser, G. Passemard, X. Avale, M. Joulaud, O. Pollet, in: Proceedings of the Electrochemical Society Conference, Cancun, Mexico, November 2006.