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Power M.O.S. devices
1096
World A bstracts on M icroelcctronics and Reliability
Methods of checking printed circuits. 1. HAJDU, P. BANEAKI,J. PINKOLA and E. TOTH. Electrocomp. S¢i. Tcchm~l. 1 I. 215 11984). Printed circuits made up to 20 40!!,, of the value of electronic circuits. Quality and reliability requirements have been boosted by the general use ofcomplex integrated circuits. An economical and high quality production is preconditioned by thc continuous checking of prime materials and technologies, After a brief review of checking methods, a short examination of quality testing of the end product (double- or multilayer printed circuit board) is given, involving checking methods of assembled and non assembled boards,
Modeling
of discrete semiconductor devices. M. D. PROFIRESCU. Microelectron. Reliab. 24 (21, 297 ~1984). Numerical modeling established itself as a powerful tool for the analysis and design of discrete semiconductor devices and integrated circuits. The paper reviews the basic semiconductor equations, the physical internal mechanisms implemented in the present simulation programs and the numerical methods used to solve the nonlinear semiconductor equations. Selected results of numerical simulation of high frequency and high power discrete devices are given. The examples comprise bipolar and FET devices made on Si or GaAs, operating in steady state or transient conditions and modeled in one or two dimensions,
Planning of aging experiments for semiconductor devices by means of the assurance test matrix. A. S. JORDAN and T . D . O'SULLIVAN. Mieroelectron. Reliab. 24 (1), 125 {1984). To devise an optimal allocation of high quality semiconductor devices in accelerated aging tests, we have developed the assurance test matrix (ATM) plan. This procedure is applicable to the lognormal distribution and is based on the idea that from the desired failure rate (.[} at a chosen service life and junction temperature (Z,), a wide range of consistent sample parameters (t,,, s and E,) at the aging temperature (L,) can be projected. Thus the time to first device failure It) for a sample of size N at T, is predictable in advance of any experiments. At a constant ] and A(I/T), defined as {I/Z, - I/7~,], the time t is a function of E,, and s. The array of times to first device failure with respect to E,, (between 0.5 1.3 eV) and s (0.5 3) we call the ATM. Detailed tables of the ATM are presented at a service life often years for 10,100 and 1000 FITs, including samples of 30, 50 and 1(10 aged over a wide range of M1/T). Similar tables are also given at the 90'~,, confidence level of the failure rates. We discuss the effects of.L A(I/T), N and the confidence level on the ATM. Having understood these factors, we illustrate the use of the tables by distributing a group of devices with regard to aging temperature and sample size in such a manner that the time
3. C I R C U I T
AND
SYSTEMS
RELIABILITY,
A reliability growth model. STEVENS. TUN(~. Proc. a. Reliab. Maintainah. Symp. 490 (1984). This paper describes a convenient alternative to traditional reliability growth models. This new reliability growth model utilizes Bayesian statistics. Equations for estimating MTBF, 0, or failure rate, 2, and its confidence limits were derived by assuming the prior density function of 1/0 is gamma. These equations can be used to periodically estimate M T B F and its confidence limit. A smooth growth curve can be obtained by best-fitting a function through the estimated points. This reliability growth model provides a simple and efficient tool to evaluate reliability growth of a system. Fail-safe rapid-transit engineering ensures reliability, passenger safety. Gary A. KRAVETZ. Electronics 152 (17 May, 1984). Redesigning the BART subway with redundant hard-
allotted tor testing yields the m a x i m u m reformation ~oncc~ n ing their long-term performance.
Changes in breakdown characteristics of planar Al/n-Si Schottky diodes during the postmetallization heat treatment. D. DASCALU, GH, BREZEANU and M. Suclk. 5"olid-SI Electron. 27 (4), 359 (1984). A correlation was found bct~een interface geometry and breakdown voltage of planar AI w-Si Schottky diodes. The postmetallization heat treatment determines silicon etching at the contact periphery beneath the passivating oxide and therefore increases the breakdown voltage due to the increase in the curvature radius at the corner of the metalfization film. However, a too strong aluminium-silicon interaction may yield a different interface geometry. The hexagonal-like cutting of Si surface along the crystallographic axes determines field concentrations at the corners and explains lower breakdown voltages obtained for smaller contact diameters. The failure of breakdown characteristics for contacts subjected to high current densities and temperature stress may be also explained through the modifications occurring in interface gcometry.
Power bipolar devices. PHILIPPE LEI'URCQ, Micrm, lectron. Reliab. 24 (2), 313 (1984). This paper deals with the specific aspects of bipolar device physics and with the problems posed by the design of their structure. Emphasis ~ill be placed on the fundamental mechanisms which determine the on-state, the off-state and the switching performance. A number of relationships between operating characteristics and structure parameters are established. These relationships are useful for improving structure designs. The currenthandling capability of high-voltage transistors is discussed thoroughly as a relevant example. Finally, the state of the art and trends of power bipolar devices are briefly reviewed. Power M.O.S. devices. P. ROSSEL. Microelectron. Reliab. 24 (2), 339 (1984). In this paper, the major structures and electric properties of the relatively new power M O S F E T s are presented. The basic concepts are dealt with first, with a view to increasing the current and voltage capabilities in M.O.S. transistors;andthenthewayinwhichtheyareappliedtothe so far most promising power structures, i . e . V . M O S anti VD.MOS transistors, is shown. The electric properties of these devices are then described, i.e. threshold voltage, voltage current characteristics: ohmic, saturation and quasi-saturation ranges, first and second breakdown, safe operating area. Some dynamic behavior aspects are also considered. To conclude, one of the fundamental limitations of power M O S F E T s is analyzed, i.e. the on-state resistance vs voltage handling capability trade-off and some data for comparison with other power devices is also provided.
MAINTENANCE
AND
REDUNDANCY
ware and software aims to make both the ride and the service more trouble-free. Flexible test systems cut costs and hike productionqine turnaronnds. JOSEPH BACH, ROBERT NICKELS and ROBERT O'BRIEN. Electronics 137 (3 May, 1984). Standard hardware with custom software eases testing of new designs and product revisions. R & M analysis techniques for fault-tolerant systems. MICHAEL H. VEATCH, ALBERTO B. CALVO and JAMES L. MCMANuS. Proc. a. Reliab. Maintainab. Syrup. 530 [1984). Reliability and logistics support analysis techniques for faulttolerant avionics systems are presented. The systems considered contain integration and dynamic reconfigurability as part of their fault-tolerant design. These characteristics, com-
World A bstracts on M icroelcctronics and Reliability
Methods of checking printed circuits. 1. HAJDU, P. BANEAKI,J. PINKOLA and E. TOTH. Electrocomp. S¢i. Tcchm~l. 1 I. 215 11984). Printed circuits made up to 20 40!!,, of the value of electronic circuits. Quality and reliability requirements have been boosted by the general use ofcomplex integrated circuits. An economical and high quality production is preconditioned by thc continuous checking of prime materials and technologies, After a brief review of checking methods, a short examination of quality testing of the end product (double- or multilayer printed circuit board) is given, involving checking methods of assembled and non assembled boards,
Modeling
of discrete semiconductor devices. M. D. PROFIRESCU. Microelectron. Reliab. 24 (21, 297 ~1984). Numerical modeling established itself as a powerful tool for the analysis and design of discrete semiconductor devices and integrated circuits. The paper reviews the basic semiconductor equations, the physical internal mechanisms implemented in the present simulation programs and the numerical methods used to solve the nonlinear semiconductor equations. Selected results of numerical simulation of high frequency and high power discrete devices are given. The examples comprise bipolar and FET devices made on Si or GaAs, operating in steady state or transient conditions and modeled in one or two dimensions,
Planning of aging experiments for semiconductor devices by means of the assurance test matrix. A. S. JORDAN and T . D . O'SULLIVAN. Mieroelectron. Reliab. 24 (1), 125 {1984). To devise an optimal allocation of high quality semiconductor devices in accelerated aging tests, we have developed the assurance test matrix (ATM) plan. This procedure is applicable to the lognormal distribution and is based on the idea that from the desired failure rate (.[} at a chosen service life and junction temperature (Z,), a wide range of consistent sample parameters (t,,, s and E,) at the aging temperature (L,) can be projected. Thus the time to first device failure It) for a sample of size N at T, is predictable in advance of any experiments. At a constant ] and A(I/T), defined as {I/Z, - I/7~,], the time t is a function of E,, and s. The array of times to first device failure with respect to E,, (between 0.5 1.3 eV) and s (0.5 3) we call the ATM. Detailed tables of the ATM are presented at a service life often years for 10,100 and 1000 FITs, including samples of 30, 50 and 1(10 aged over a wide range of M1/T). Similar tables are also given at the 90'~,, confidence level of the failure rates. We discuss the effects of.L A(I/T), N and the confidence level on the ATM. Having understood these factors, we illustrate the use of the tables by distributing a group of devices with regard to aging temperature and sample size in such a manner that the time
3. C I R C U I T
AND
SYSTEMS
RELIABILITY,
A reliability growth model. STEVENS. TUN(~. Proc. a. Reliab. Maintainah. Symp. 490 (1984). This paper describes a convenient alternative to traditional reliability growth models. This new reliability growth model utilizes Bayesian statistics. Equations for estimating MTBF, 0, or failure rate, 2, and its confidence limits were derived by assuming the prior density function of 1/0 is gamma. These equations can be used to periodically estimate M T B F and its confidence limit. A smooth growth curve can be obtained by best-fitting a function through the estimated points. This reliability growth model provides a simple and efficient tool to evaluate reliability growth of a system. Fail-safe rapid-transit engineering ensures reliability, passenger safety. Gary A. KRAVETZ. Electronics 152 (17 May, 1984). Redesigning the BART subway with redundant hard-
allotted tor testing yields the m a x i m u m reformation ~oncc~ n ing their long-term performance.
Changes in breakdown characteristics of planar Al/n-Si Schottky diodes during the postmetallization heat treatment. D. DASCALU, GH, BREZEANU and M. Suclk. 5"olid-SI Electron. 27 (4), 359 (1984). A correlation was found bct~een interface geometry and breakdown voltage of planar AI w-Si Schottky diodes. The postmetallization heat treatment determines silicon etching at the contact periphery beneath the passivating oxide and therefore increases the breakdown voltage due to the increase in the curvature radius at the corner of the metalfization film. However, a too strong aluminium-silicon interaction may yield a different interface geometry. The hexagonal-like cutting of Si surface along the crystallographic axes determines field concentrations at the corners and explains lower breakdown voltages obtained for smaller contact diameters. The failure of breakdown characteristics for contacts subjected to high current densities and temperature stress may be also explained through the modifications occurring in interface gcometry.
Power bipolar devices. PHILIPPE LEI'URCQ, Micrm, lectron. Reliab. 24 (2), 313 (1984). This paper deals with the specific aspects of bipolar device physics and with the problems posed by the design of their structure. Emphasis ~ill be placed on the fundamental mechanisms which determine the on-state, the off-state and the switching performance. A number of relationships between operating characteristics and structure parameters are established. These relationships are useful for improving structure designs. The currenthandling capability of high-voltage transistors is discussed thoroughly as a relevant example. Finally, the state of the art and trends of power bipolar devices are briefly reviewed. Power M.O.S. devices. P. ROSSEL. Microelectron. Reliab. 24 (2), 339 (1984). In this paper, the major structures and electric properties of the relatively new power M O S F E T s are presented. The basic concepts are dealt with first, with a view to increasing the current and voltage capabilities in M.O.S. transistors;andthenthewayinwhichtheyareappliedtothe so far most promising power structures, i . e . V . M O S anti VD.MOS transistors, is shown. The electric properties of these devices are then described, i.e. threshold voltage, voltage current characteristics: ohmic, saturation and quasi-saturation ranges, first and second breakdown, safe operating area. Some dynamic behavior aspects are also considered. To conclude, one of the fundamental limitations of power M O S F E T s is analyzed, i.e. the on-state resistance vs voltage handling capability trade-off and some data for comparison with other power devices is also provided.
MAINTENANCE
AND
REDUNDANCY
ware and software aims to make both the ride and the service more trouble-free. Flexible test systems cut costs and hike productionqine turnaronnds. JOSEPH BACH, ROBERT NICKELS and ROBERT O'BRIEN. Electronics 137 (3 May, 1984). Standard hardware with custom software eases testing of new designs and product revisions. R & M analysis techniques for fault-tolerant systems. MICHAEL H. VEATCH, ALBERTO B. CALVO and JAMES L. MCMANuS. Proc. a. Reliab. Maintainab. Syrup. 530 [1984). Reliability and logistics support analysis techniques for faulttolerant avionics systems are presented. The systems considered contain integration and dynamic reconfigurability as part of their fault-tolerant design. These characteristics, com-