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Surface related degradation of InP-based HEMTs during thermal stress
World abstracts on microelectronics and reliability
of the 24th Symposium on Reliability and Maintainability, Japan, 7 (6-8 July 1994). In recent years, problems frequently developed with the occurrence of ion migration caused by dew condensation, along with the compactness of electronic equipment and the popularization of portable equipment. There has been no suitable method so far for the evaluation of migration caused by dew condensation for which reason we have made a prototype test chamber and have carried out technical studies. As a result, we have been able to make ion migration take place in a short period of time and carry out life evaluation by Weibull analysis, out of which the effectiveness of the test chamber has been confirmed.
7. SEMICONDUCTOR INTEGRATED CIRCUITS, DEVICES AND MATERIALS
An empirical model for early resistance changes due to electromigration. J. NIZHOF, H. C. DE GRAAFF, A. J. MOUTHAANand J. F. V~RWEY. Solid-State Electronics, 38 (10), 1817 (1995). A new heuristic description for electromigration-induced early resistance changes is given. The basis is formed by two coupled partial differential equations, one for vacancies, and one for imperfections. These equations are solved numerically for a grain boundary bamboo structure. It is shown that this model is capable of simulating the typical effects as observed in early resistance change measurements. These early resistance changes are due to the redistributions of the vacancies and the generation of imperfections. Simulations are performed that closely match the measured resistance change curves.
Bulk micromachining of Si by lithography and reactive ion etching (LIRIE). I. W. RANGELOW,P. HUDEK and F. SHE Vacuum, 46 (12), 1361 (December 1995). This paper reports on the development of a technology which will offer the potential to manufacture micro-engines, micro-turbines, micro-sensors, microactuators and electronic circuits onto a single silicon chip. This technology is based on the highly anisotropic and selective dry etching of Si-monocrystals. Axes or stators (non-moving parts) are etched into the initial Si-wager. The movable parts (rotors, beams, etc.) are prepared from electro-chemically etched Si-membranes with defined thicknesses. Both sides of the Si-membrane are covered with a 1.5 gm SiNxOy layer by a low stress ( < 10 MP) PECVDprocess. After that, all movable parts are created lithographically on the SiNxOy surface. This is followed by dry etching the mono-crystalline Simembrane down to the SiNxOy sacrificial layer on the reverse side of the membrane by an RIE-process. This fixes the movable parts to the SiNxOy-layer. The wafer with the movable parts is flipped onto the water with the already etched axis and then positioned and centred. The SiNxOy-sacrificial layer is then dissolved
543
by a chemical wet or vapour etch process. Subsequent bonding with a Pyrex glass wafer seals the parts.
Failure mode analysis of AIGaAs/GaAs HBTs using electrostatic discharge method. YORIO OTA, MANABU YANAGIHARA and MORIO NAKAMURA. Solid-State Electronics, 38 (12), 2005 (1995). The failure nodes of A1GaAs/GaAs heterojunction bipolar transistors (HBTs) showing increases of base leakage current found during the bias and temperature reliability test have been examined and analysed by using an electrostatic discharge (ESD) method. In the examination for HBT having an emitter of 2 × 201am, increases of a base leakage current have been observed when an ESD of around 100 V is applied through a base-emitter junction. Furthermore, increases of a collector leakage current have been observed with the additional ESD of around 150 V. Since no fatal effects for the transistor amplification are found in the high current region, the degradations are concluded to be responsible to the local damages of the base layer at the edge of base-emitter junction. Applying the Wunsch-Bell model to the damaged region, the temperature is estimated to be in a range from 400 to 550°C. It is thought that thermal destruction occurs in a base layer.
Surface related degradation of laP-based HEMTs during thermal stress. Y. ASHIZAWA,C. NOZAKI, T. NODA, A. SASAKI and S. FUJITA. Solid-State Electronics, 38 (9), 1627 (1995). Degradation of unpassivated InP HEMTs related to the surface of lnAIAs was studied. In ungated HEMTs, the drain current decreased after annealing at temperatures as low as 250°C. RBS measurements revealed that lattice disorder was induced on the surface of InAlAs during thermal treatment, which was considered to be due to either the introduction of vacancies or In segregation. Surface-related degradation was effectively suppressed by passivating devices with SiN layers.
Electrical characterisation of integrated circuit metal line thickness. SANTOSMAYO and HARRY A. SCHAFFT. Solid-State Electronics, 38 (12), 1993 (1995). Resistance measurements of thin aluminum-silicon alloy lines, l0 and 30 gm wide, were made at various temperatures in the 9.2-295.5 K range. Deviations from Matthiessen's rule were observed over the whole temperature range. At temperatures near room ambient data for these lines are in good agreement with those reported for aluminum-copper alloy wires. A formalism was developed to calculate line thickness and crosssectional area from electrical resistance data. Line thickness calculations are in good agreement with thickness data measured via scanning electron microscopy. These stress distributions in these lines were modeled by using finite element stress analysis. The results show large stress gradients localized at the line edge region, whereas at the central part of the line there is a high stress value and a low stress
of the 24th Symposium on Reliability and Maintainability, Japan, 7 (6-8 July 1994). In recent years, problems frequently developed with the occurrence of ion migration caused by dew condensation, along with the compactness of electronic equipment and the popularization of portable equipment. There has been no suitable method so far for the evaluation of migration caused by dew condensation for which reason we have made a prototype test chamber and have carried out technical studies. As a result, we have been able to make ion migration take place in a short period of time and carry out life evaluation by Weibull analysis, out of which the effectiveness of the test chamber has been confirmed.
7. SEMICONDUCTOR INTEGRATED CIRCUITS, DEVICES AND MATERIALS
An empirical model for early resistance changes due to electromigration. J. NIZHOF, H. C. DE GRAAFF, A. J. MOUTHAANand J. F. V~RWEY. Solid-State Electronics, 38 (10), 1817 (1995). A new heuristic description for electromigration-induced early resistance changes is given. The basis is formed by two coupled partial differential equations, one for vacancies, and one for imperfections. These equations are solved numerically for a grain boundary bamboo structure. It is shown that this model is capable of simulating the typical effects as observed in early resistance change measurements. These early resistance changes are due to the redistributions of the vacancies and the generation of imperfections. Simulations are performed that closely match the measured resistance change curves.
Bulk micromachining of Si by lithography and reactive ion etching (LIRIE). I. W. RANGELOW,P. HUDEK and F. SHE Vacuum, 46 (12), 1361 (December 1995). This paper reports on the development of a technology which will offer the potential to manufacture micro-engines, micro-turbines, micro-sensors, microactuators and electronic circuits onto a single silicon chip. This technology is based on the highly anisotropic and selective dry etching of Si-monocrystals. Axes or stators (non-moving parts) are etched into the initial Si-wager. The movable parts (rotors, beams, etc.) are prepared from electro-chemically etched Si-membranes with defined thicknesses. Both sides of the Si-membrane are covered with a 1.5 gm SiNxOy layer by a low stress ( < 10 MP) PECVDprocess. After that, all movable parts are created lithographically on the SiNxOy surface. This is followed by dry etching the mono-crystalline Simembrane down to the SiNxOy sacrificial layer on the reverse side of the membrane by an RIE-process. This fixes the movable parts to the SiNxOy-layer. The wafer with the movable parts is flipped onto the water with the already etched axis and then positioned and centred. The SiNxOy-sacrificial layer is then dissolved
543
by a chemical wet or vapour etch process. Subsequent bonding with a Pyrex glass wafer seals the parts.
Failure mode analysis of AIGaAs/GaAs HBTs using electrostatic discharge method. YORIO OTA, MANABU YANAGIHARA and MORIO NAKAMURA. Solid-State Electronics, 38 (12), 2005 (1995). The failure nodes of A1GaAs/GaAs heterojunction bipolar transistors (HBTs) showing increases of base leakage current found during the bias and temperature reliability test have been examined and analysed by using an electrostatic discharge (ESD) method. In the examination for HBT having an emitter of 2 × 201am, increases of a base leakage current have been observed when an ESD of around 100 V is applied through a base-emitter junction. Furthermore, increases of a collector leakage current have been observed with the additional ESD of around 150 V. Since no fatal effects for the transistor amplification are found in the high current region, the degradations are concluded to be responsible to the local damages of the base layer at the edge of base-emitter junction. Applying the Wunsch-Bell model to the damaged region, the temperature is estimated to be in a range from 400 to 550°C. It is thought that thermal destruction occurs in a base layer.
Surface related degradation of laP-based HEMTs during thermal stress. Y. ASHIZAWA,C. NOZAKI, T. NODA, A. SASAKI and S. FUJITA. Solid-State Electronics, 38 (9), 1627 (1995). Degradation of unpassivated InP HEMTs related to the surface of lnAIAs was studied. In ungated HEMTs, the drain current decreased after annealing at temperatures as low as 250°C. RBS measurements revealed that lattice disorder was induced on the surface of InAlAs during thermal treatment, which was considered to be due to either the introduction of vacancies or In segregation. Surface-related degradation was effectively suppressed by passivating devices with SiN layers.
Electrical characterisation of integrated circuit metal line thickness. SANTOSMAYO and HARRY A. SCHAFFT. Solid-State Electronics, 38 (12), 1993 (1995). Resistance measurements of thin aluminum-silicon alloy lines, l0 and 30 gm wide, were made at various temperatures in the 9.2-295.5 K range. Deviations from Matthiessen's rule were observed over the whole temperature range. At temperatures near room ambient data for these lines are in good agreement with those reported for aluminum-copper alloy wires. A formalism was developed to calculate line thickness and crosssectional area from electrical resistance data. Line thickness calculations are in good agreement with thickness data measured via scanning electron microscopy. These stress distributions in these lines were modeled by using finite element stress analysis. The results show large stress gradients localized at the line edge region, whereas at the central part of the line there is a high stress value and a low stress