Techniques in failure analysis of MOS devices

Techniques in failure analysis of MOS devices

336 World Abstracts on Microelectronics and Reliability evaluation of lifetime from the measurements and a low sensitivity of the results to surface...

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World Abstracts on Microelectronics and Reliability

evaluation of lifetime from the measurements and a low sensitivity of the results to surface conditions. The method is limited to layers thicker than a diffusion-length. In thinner layers only the lifetime of minority-carriers in the substrate can be determined from the frequency dependence of the photo-current.

Design of high reliability Mica capacitor for submarine cable repeaters. RYOICHI KANEOYA, SHIGEO KONDO, and KAORU SHINOZAKI. Abstracts-Trans. Inst. Electron. Commun. Engrs. Japan. 57, 25 (1974). In submarine cable repeaters, very high reliability as well as high precision is essential. In this paper, description is made on the design, fabrication and properties, etc. of high reliability mica capacitors. The role of crystal defects in transistor operation at high power levels. H. AHARONI and A. BAR-LEV. Microelectronics 6, 11 (1975). When a transistor structure is analyzed, one usually assumes that it is a perfectly periodic crystal structure with the addition, perhaps, of a certain density of recombination centres. This enables one to calculate a set of breakdown voltages for the transistor. If operation at high power levels is desired an additional analysis of thermal resistances and capacitances is also made. If, however, actual transistors are made and tested, one finds large differences among equivalent transistors in their behaviour at high power, in the voltages at which avalanche starts and in the current-voltage-time combination at which a hot spot forms and the transistor undergoes secondary breakdown. The actual values found will be less than those expected. This is a direct consequence of the fact that the crystal, in which the transistor is built, is not a perfect periodic structure as assumed, but includes many crystal defects. Some of these defects were in the original grown crystal, but most of them were actually introduced into it during the process of transistor manufacturing. These defects become important when the transistor is operating near its maximum ratings because the doping levels and the energy band structure is distorted around them and consequently the local electrical field is higher, making them the points at which avalanche starts. Current may also be channelled along a fault because of conductivity changes. They also distort the planar structure of the junction and because of that may bring the transistor into premature breakdown. We aim to discuss in this paper the role of defects during transistor operation and show the mechanism by which they influence it.

found to be almost independent of thickness and microscopic observations in transmission did not show the occurrence of "single-hole" and "propagating" breakdowns, as observed by Klein et al. in evaporated film systems. The I - V characteristics in the "non-destructive" phase have also been studied and the observed maximum breakdown voltage has been distinguished from the "maximum voltage breakdown" observed by Klein et al.

Thin oxide film effect on silicon N÷P diodes breakdown voltage. K. MATSUMOTOR and Y. HANETA. NEC Research & DevelopmentNo. 35, p. 21 (1974). In a pn diode made in silicon by the planar technique, the situation always arises that the breakdown voltage before walk-out can be modulated by the external surface electric field. The same is true with integrated circuits and MOS transistors. This paper reports the relation gained experimentally between the breakdown voltage before walk-out and the gate voltage. Especially, the influence of the substrate impurity concentration and the oxide thickness is investigated. Then, it is shown that, in high substrate resistivity, the breakdown voltage is proportional to approximately the square root of the oxide thickness and that, in low substrate resistivity, the breakdown voltage is proportional to a lower value than the square root of the oxide thickness. Experiments were carried out on MOS transistors. Degradation studies in GaAso.6Po.4 Light-emitting diodes. R. H. WEISSMAN, W. L. SNYDER, G. T. IKARI and T. L. LARSEN. Proc. IEEE Reliability Physics Syrup. April 2-4, 1974. p. 273. The light output of a Ga(As, P) electroluminescent (EL) diode, measured at a fixed value of forward current, generally decreases with time when the diode is operated under forward bias. The degradation characteristics of such devices can be highly variable as exemplified by the selected data from eight GaAso.~Po.4 LED's. [These diodes were stressed (operated) at 50 A/cm 2 and an ambient temperature (TA) of 25°C, and were measured at 20 A/cm:.] It is evident that some LED's degrade very rapidly; i.e., the light output decreases to less than 5t)°/,, of the initial value when stressed for as short a time as a few hundred hours. Others exhibit excellent stability--the degradation after 1000 hours stress being less than 10%. The objectives of the present investigation were to determine the cause for rapid degradation observed in some GaAso.6Po., L E D ' s and to elucidate the mechanism by which such devices proceed to the point of failure.

Interdiflnsion in electropinted tin-nickel on gold. M. VIKRAM RAO, M. MITCHELL and R. N. ANDERSON. SolidSt. Technol. p. 47, November, 1974. Tin-nickel plating has good properties that make it attractive for use by the electronics industry in circuit board manufacture. One question not previously answered is whether diffusion of the tin or nickel into the gold, or vice versa, would occur and shorten the useful life of the circuit. This article experimentally examines the interdiffusion of Sn-Ni on Au and concludes that there is no problem in the use of the Sn-Ni plate.

Failure mechanism on accelerated A.C. test for high voltage capacitors. J. BURNHAM and E. WONG. Proc. IEEE Reliability Physics Syrup. April 2-4, 1974. p. 223. A highly accelerated a.c. life test for high voltage d.c. capacitors has been developed which is useful for solid dielectric capacitors such as mica paper and high dielectric constant ceramics with low a.c. losses. The test utilizes the fact that corona intensity on a.c. is several orders of magnitude higher than on d.c. It is shown that the mechanism of failure involves electrochemical erosion for both the mica paper and the ceramic dielectric material. The life times follow a power law with an exponent of 26 for mica paper and 31-100 for the ceramic.

Destructive D.C. breakdown in "built-up" barium stearate films. V. K. AGARWAL and V. K. SRIVASTAVA. Electrocompnt. Sci. and Teehnol. 1, 87 (1974). The thickness dependence of maximum breakdown voltage (d.c.) leading to the destruction of the film has been reported for "built-up" barium stearate films in the thickness range (400,~-1000,~). These films were chosen because of their promising applications for making dielectric devices, and because their thickness is accurately known and controllable (within 25,~). The breakdown voltage is

Techniques in failure analysis of MOS Devices. J. J. GAJDA. Proc. IEEE Reliability Physics Symp. April 2-4 1974. p. 30. The greatest concern on MOS devices is the physical integrity of the gate oxide. Leakage paths and/or shorts through defect sites in the exide are a major device reliability problem. Optical microscopy is tedious and often does not resolve the defects. With this in mind, copper decoration techniques were developed that could reveal oxide failure sites down to 0-1 p~m size. The technique has isolated various failure mechanisms on

World Abstracts on Microelectronics and Reliability MOS devices. This failure analysis capacity has enhanced the ability to control the MOS process.

Accelerated lifetesting and failure modes of thin film W contacts on Si-Ge Thermoelectric alloys. J. N. SWEET. Proc. IEEE Reliab. Physics Syrup. April 2-4, 1974. p. 196. The stability of sputtered thin film W contacts on heavily doped Si-Ge alloy has been determined from measurements of contact resistance versus time for aging temperatures in the range 550-725°C. Contact failure time has been found to obey an Arrhenius type relation with an activation energy of 76+5 kcal/mole and a projected lifetime of over ten years at temperatures below 450°C. Contact resistance remains approx, constant for the first 80% of contact lifetime and then increases rapidly through several orders of magnitude. These large contact increases are accompanied by loss of contact adhesion and buckling. Comparison of this data with that from diffusion experiments indicates that the activation energy for contact failure is comparable with that for the initial stages of WSi2 layer growth in W-Si systems. Niehrome resistor failures as studied by X-ray photoelectron spectroscopy (XPS or ESCA). W. E. BAITINGER, N. WINOGRAD, J. W. AMY and J. A. MUNARIN. Proc. IEEE Reliability Physics Syrup. April 2-4, 1974. p. 1. Depth profiles yielding both information on oxidation state and elemental composition have been obtained for model nichrome films by using X-ray Photo-electron Spectroscopy and argon ion sputtering. Evidence is presented showing the formation of thin insulating films at the interface between two metals caused by solid state reactions occurring between metals and metal oxides. Sensitivity of current pulse buro-out testing to the geometry of defects in uluminium metullization. H. S. GUREV. Proc. IEEE Reliability Physics Syrup. April 2-4, 1974. p. 187. Current pulses, with power levels sufficient to burn out metal stripes in the 30-1000 nsec pulse time range, were found to overcome lateral heat losses and permit the detection of metallizatiou step coverage defects for the several cases of practical interest investigated. In the most extreme case, a sharp groove about 400 A wide, extending to within 650 A of the bottom of 9000 A thick aluminum metallization, was easily detected by pulse testing. Threshold energy effect on avalanche breakdown voltage in semiconductor junctions. Y. OKUTO and C. R. CROWELL. Solid-St. Electron. 18, 161 (1975). The band bending for avalanche breakdown in semiconductor junctions and its temperature dependence are predicted taking account of threshold energy effects on the ionization process in semiconductors. Where experimental results exist, the theoretical predictions and experimental results are in excellent agreement. In the high electric field region inclusion of both bulk and boundary threshold energy effects is essential. The predictions were based on exact solutions in the nonlocalized ionization coefficient formulation developed by Okuto and Crowell who showed that ionization coefficients as usually understood are functions of both electric field and position in a device. Predictions for abrupt and p--i-n junctions in Ge, Si, GaAs and GaP are presented. Interface Instabilities. E. H. NICHOLLIAN. Prec. 1EEE Reliability Physics Symposium. April 2-4, 1974. p. 267. A review will be given of the instabilities of MOS field effect transistors caused by the time variation of the electrical properties of the Si-SiO2 interface during device life. Changes in interface properties can be accelerated by heating without bias and heating with negative bias apM R - - V o l . 14, NO. 4

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plied to the gate. The specific topics discussed will include how fixed oxide charge and interface trap densities change with accelerated aging, the effects of these changes on the characteristics of MOS field effect transistors, and how these changes can be minimized to achieve better reliability.

S O A R - - t h e basis for reliable power circuit design. Part h Power transistor limitations and ratings. Philips Electron. Applications Bull. 32, 137 (1973). The SOAR method of specification has been made possible by improved understanding of power transistor failure mechanisms. In essence, this method of specification unites the various transistor limitations. Part I of this article reviews the various failure mechanisms, particularly the phenomenon of second breakdown. The philosopy behind the Philips SOAR specifications is explained, and the quality control and inspection methods used to define the SOAR for any particular type of transistor are described. There is also a discussion of the reverse-biased condition and the methods by which reverse-bias ratings are set and maintained. In Part II the recommended methods of using Philips SOAR charts will be described in detail, as will procedures for determining the thermal operating conditions of transistors. The mechanism of r.f. spike burn-out in Schottky barrier microwave mixers. P. H. GERZON, J. W. BARNES, D. W. WAITE and D. C. NORTHROP. Solid-St. Electron. 18, 343 (1975). It is established that r.f. spike burnout in Schottky barrier microwave mixers is caused by localised heating to a temperature in excess of a critical value dependent on the metal used to form the barrier. By a suitable choice of metal, devices have been made which can withstand spike energies in excess of 1 erg. There seems no reason why advances in manufacturing technology should not improve this performance. Failure mechanisms in gold metullized sealed junction devices. E. B. HAKIM and J. R. SHAPPIRIO.Solid-St. Tech. April 1975. p. 66. Two different types of p-n-p transistors and an integrated circuit, which were fabricated using silicon nitride and gold contact metallization, failed while on test in the Panama Canal Zone. Failure analysis indicated that the following failure mechanisms and problem areas were present in these units: (1) gold corrosion resulting in dendritic growth; (2) titanium over nitride between conductors; (3) exposed high concentrations of platinum; (4) inability of glass to adhere to gold metallization and to seal the device. These conditions occur as a result of both poor quality control and basic process limitations. A metallurgical analysis of stress-corrosion cracking of Kovar package lead. L. J. WEIRICK. Solid-St. Tech. March 1975. p. 25. Scanning electron microscopy and metallographic analysis indicated that stress-corrosion cracking was responsible for some Kovar leads completely breaking away from integrated circuit packages following a moisture-resistance test. The cracks were found to have been initiated intergranularly and propagated transgranularly. Further analysis showed that the following factors accelerated the stress-corrosion cracking: (1) the presence of a tensile stress, (2) insufficient nickel plating on the Kovar, (3) penetration of the Kovar grain boundaries by copper and (4) the presence of contaminants containing free chloride. Radiation-stimulated tailure mechanism in a dielectrically isolated integrated circuit. J. L. AZAREWlCZ and T. F. WROBEL. IEEE Trans. Pans, Hybrids, Packaging PHP10, 159 (1974). An apparent latchup condition was observed in a hi-rel dielectrically isolated integrated circuit.