The effects of the writing voltage on the electrical bistability properties of organic memory devices consisting of a single layer

Solid State Communications 146 (2008) 17–20 www.elsevier.com/locate/ssc

The effects of the writing voltage on the electrical bistability properties of organic memory devices consisting of a single layer Jae Hun Jung, Joo Hyung You, Tae Whan Kim ∗ Advanced Semiconductor Research Center, Division of Electronics and Computer Engineering, Hanyang University, 17 Haengdang-dong, Seongdong-gu, Seoul, 133-791, Republic of Korea Received 9 October 2007; received in revised form 21 November 2007; accepted 24 January 2008 by D.D. Sarma Available online 5 February 2008

Abstract Electrical bistability properties of organic memory devices consisting of a single layer were theoretically investigated by using a drift-diffusion model combined with a field dependent mobility model and a single level trap model. After application of a writing voltage, the current under a reading voltage was larger than that without a writing voltage. The behavior in the current bistability was affected from the trapped electron density near the metal/organic interface. The increasing rate of the trapped electron density by increasing a writing voltage was relatively small, but it causes the abrupt increment to the current density, resulting in the bistable characteristics in the model device. c 2008 Elsevier Ltd. All rights reserved.

PACS: 73.50.Gr; 73.61.Ph Keywords: A. Organic layer; D. Electronic transport

Potential applications of organic layers in organic lightemitting diodes (OLEDs) [1–3], organic field-effect transistors [4], and organic solar cells [5] have driven extensive efforts to investigate their electrical properties. Recently, organic bistable devices (OBDs) have attracted considerable attention because of their many potential applications in nextgeneration memory devices. The OBDs have exhibited two different conductivities at the same reading voltage, resulting in the appearance of the memory effect from the current bistability [6]. The fundamental structure of the OBDs consists of cross-point elements with two parallel top and bottom electrodes between the organic materials. The OBD leads the active area of the memory devices to fabricate simple and low-cost nanoscale memory devices. Even though the bistability phenomenon in organic materials has been suggested for a long time [7–9], feasibility studies concerning OBDs consisting of a trilayer structure of organic/metal nanoparticle/organic layers between two electrodes were performed only recently [6]. Many OBDs based on a charge transfer complex in Cu:TCNQ thin films [10], single organic layer with anthracene ∗ Corresponding author. Tel.: +82 2 2220 0354; fax: +82 2 2292 4135.

E-mail address: [email protected] (T.W. Kim). c 2008 Elsevier Ltd. All rights reserved. 0038-1098/$ - see front matter doi:10.1016/j.ssc.2008.01.027

derivative and tris (8-hydroxyquinoline) aluminum (Alq3 ) [11, 12], charge trapping layers [13], burning polymer fuses for writing-once-read-many times memory [14], a copolymer of Nvinylcarbazole and Eu complexed vinlybenzoate [15] have been carried out. Among various types of OBDs, those consisting of a single organic layer without the nanoparticles or copolymers have been particularly interesting due to that device’s advantages of low cost and simple structure. Even though some studies on the current bistability mechanisms in the single organic layer devices [12,16] and the trapped charges in the metal impurity formed due to the diffusion from the metal electrode [17–19] have been performed, studies concerning the effects of the trapped charges on the bistable characteristics have not yet been done. This communication presents data for the effects of the writing voltage on the current bistability due to the existence of the trapped charges calculated by using a drift-diffusion model in the organic memory consisting of the single layer. The carrier transport in the device consisting of an organic layer and two electrodes was calculated by a one-dimensional driftdiffusion model combined with a single level trap model and a field dependent carrier mobility model. The current density and

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the trapped electron distribution in the device with an increase in the writing voltage were calculated to investigate the effect of the trapped charges in the device. The mechanism for the current bistability due to the variation of the trapped charge density and the carrier mobility dependent on the electric field is also described. Because the device structure used in this simulation is similar to that of the OLEDs consisting of a single organic layer, the basic simulation model established in OLEDs [20–23] combined with the trap model [24] have been used. The transport equations consisting of the Poisson’s equation and the drift-diffusion equation together with the continuity equation have been used to calculate the carrier transport while the thermionic emission equation [25] and the single level trap equation have been used to calculate a carrier injection into the organic layer and the trapped electron density, respectively. The simulation device consists of two electrodes and a single organic layer sandwiched between them. The electron and the hole current densities in the organic layer are self-consistently calculated by using the following combination of equations: the one-dimensional Poisson’s equation (1), the drift-diffusion equation (2), and the continuity equation (3) [20–23]: ∂E q = ( p − n − n t ), ∂x ε   kT ∂n , Jn = qµn (E) n E + q ∂x   kT ∂ p , J p = qµ p (E) p E − q ∂x ∂ Jn ∂n = + G − R, ∂t ∂x

∂ Jp ∂p =− + G − R, ∂t ∂x

(1)

carrier mobility as a function of the position for the organic layer should be respectively calculated. The injecting current density (5) consisting of the thermionic emission current density (6) and the surface recombination current density (7) corresponding to the boundary condition at the electrodes is given by [25] Jinj = Jth − Jsr ,

(5)

Jth = A∗ T 2 exp(−Φ B /kT ) exp f 1/2 , Jsr = nq S,

(6) (7)

where A∗ is the effective Richardson constant, Φ B and f are the Schottky barrier height and the reduced electric field, respectively. The hole barrier heights from the Fermi level of the electrode to the highest occupied molecular orbital level in the model device are assumed to be respectively 0.7 and 0.4 eV, respectively, which are typical values of the barrier height from the indium-tin-oxide electrode and the organic materials in the organic devices. The electron barrier heights from the Fermi level of the electrode to the lowest unoccupied molecular orbital level are 1.3 and 1.6 eV, respectively. The traps in the organic layer are formed by the metal diffusion into the organic layer during the deposition of the top metal electrode on the organic layer by a thermal evaporation [17], resulting that the traps slightly exist in the vicinity of the top electrode. The trapped electron density in the organic layer is given by [24] Ha

nt = (2) (3)

where E is the electric field, n, n t , and p are the free electron density, the trapped electron density, and the free hole density, respectively, q is the electron charge, ε is the dielectric constant, k is the Boltzmann constant, T is the temperature, Jn and J p are the electron current density and the hole current density, respectively, µn and µ p are the electron mobility and the hole mobility, respectively, and G and R are the electron–hole generation rate and the recombination rate, respectively. The energy bandgap of the organic layer is assumed to be 2 eV, which is a typical value of the organic material. Because the energy bandgap of the organic material is large, the electron–hole generation rate, G can be negligible in Eq. (3). Because the carrier mobility in the organic materials is generally very low and dependent on an electric field, the carrier mobility is given by [21] s ! E µ(E) = µ0 exp , (4) E0 where µ0 and E 0 are the zero field mobility and the characteristic field. The zero field mobilities of the hole and the electron used in the simulation are 1.7 × 10−6 and 1.7 × 10−8 cm2 V−1 s−1 , respectively, and the characteristic field of the hole and the electron is 105 V cm−1 [21]. Because the carrier mobility is dependent on an electric field, the

1+

Nc exp(−E t /kT ) n(x)

 exp

√ , βe f f E kT

(8)

where E t is the trap depth, Nc and Ha are the effective density of state and the trap density, respectively, βeff is the effective Poole-Frenkel coefficient. The traps in the organic layer in the simulation are assumed to be distributed within 10 nm from the interface of the top electrode. The hole barrier height at the interface is 0.7 eV, and the corresponding density and depth are 3 × 1018 cm−3 and 1.0 eV, respectively [24]. Because the trapped electrons used in this simulation are not emitted from the traps, an erasing process is not considered in the simulation. The above equations for the device cannot be calculated to being close-formed, so that they should be calculated selfconsistently with the iteration method. Eqs. (1)–(3) combined with Eq. (4) for the mobility are solved by using a forwardtime centered-space method taking into account Eq. (5) for the boundary condition and Eq. (8) for a trap at room temperature, 300 K. The device size is 110 nm, which is divided into small meshes of 1 nm in a width. The iteration time step is determined to 10−10 s, together with a margin to avoid a divergence during the simulation. The total iteration step is 106 for calculating one value in the current–voltage (I –V ) curve. The simulation process completes the following two stages. In the first stage, the writing process is performed with applying writing negative voltages between −14 and −20 V. After the writing process is finished, the reading process as the second stage is performed with applying positive voltages from 0.1 to 5.0 V. Fig. 1 shows the current densities as functions of the applied voltage with several writing voltages. The current densities with

J.H. Jung et al. / Solid State Communications 146 (2008) 17–20

Fig. 1. Current densities as functions of the applied voltage curves for the organic memory device under applied reading voltages between 0.1 and 5 V and the writing voltages of (a) −20, (b) −18, (c) −16 (d) −14, and (e) 0 V (without a writing voltage) during the reading process.

applied the writing voltages are significantly larger than that without the writing voltage at the same reading voltage, as shown in Fig. 1. The device state for a low conductivity without an applied writing voltage is defined as “off state”, and all states of a high conductivity are defined as “on state”. Even though current densities of the on state increase with increasing writing voltage, the increase rate of the current density is not directly proportional to the writing voltage. Fig. 2 shows the on–off ratios as functions of the applied voltage with several writing voltages. The on–off ratio is defined as dividing the on state current density by the off state current density. While the on–off ratio at the reading voltage of 1 V under an applied writing voltage of −14 V is 9.45, the on–off ratio at same reading voltage under the writing voltage of −20 V is approximately 500. The abrupt increment in the on–off ratio due to an increase in the writing voltage is similar to the multilevel characteristics in the practical devices [18,19]. We expect that this increment is due to the increase in the current injection from electrodes. Fig. 3 shows the trapped electron densities as functions of the position from the interface of the top electrode to 10 nm in the organic layer. The trapped electron densities for each writing voltage have the highest values at the nearest position of the interface, and they decrease gradually by going away from the interface. Because all traps are already assumed to be only distributed within 10 nm from the interface of the top electrode, the trapped electrons can only exist in this place. The trapped electrons form an internal electric field, which becomes lower the effective hole barrier height between the electrode and the organic layer, resulting in the enhancement of the hole injection efficiency. The trapped electron density increases with increasing writing voltage, but its increasing rate is relatively small in comparison with that of the current density, as shown in Fig. 3. This result indicates that other factors besides trapped electrons should be considered to determine on state current in this simulation. They will be investigated in future. The mechanisms of the current bistability for the operating processes in the model device can be described as follows;

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Fig. 2. On–off ratios as functions of the applied voltage curves for the organic memory device under applied reading voltages between 0.1 and 5 V and the writing voltages of (a) −20, (b) −18, (c) −16 and (d) −14 V during the reading process.

Fig. 3. Trapped electron densities as functions of position for the simulation device under an applied reading voltage of 5 V and the writing voltages of (a) −20, (b) −18, (c) −16, and (d) −14 V.

before the writing voltage is applied, all traps in the device are assumed to be empty, denoted as the off state. The holes injected from the right interface of the bottom electrode at the writing process flow in the organic layer, as shown in Fig. 4(a), and the electrons injected from the left interface of the top electrode are mostly captured in the traps near the interface. The injected holes and electrons generate an internal electric field opposite to the interfaces, resulting in the potential bending of the organic layer. Therefore, while the potential profile of the organic layer bends up on the left side of the organic layer, and that bends down in the right of the organic layer. As the writing voltage vanishes, only trapped electrons can remain in the device, resulting in charging from the “off state” to the “on state”. The opposite carriers at the reading process are injected from the interfaces. The internal electric field generated by the trapped electrons leads to a bending up of the potential profile near the left interface, as shown in Fig. 4(b). The potential bending increases the hole injection efficiency and the hole mobility, which become higher than those without the trapped electrons.

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memory devices. The increased rate of the trapped electron density was relatively very small in comparison with that of the current density. The writing voltage significantly affected the electrical bistability properties of organic memory devices consisting of a single layer. These results can help to improve the understanding of the writing voltage effects on the electrical bistability properties of organic memory devices consisting of a single layer. Acknowledgement This work was supported by the Korea Science and Engineering Foundation (KOSEF) grant funded by the Korea government (MOST) (No. R0A-2007-000-20044-0). References

Fig. 4. Schematics of the (a) writing and (b) reading mechanisms for operating processes.

The on state current due to the increase in the hole injection efficiency and the hole mobility at the same reading voltage is larger than the off state current, resulting in current bistability in the device. These mechanisms have been previously suggested from the experimental results in the OLEDs [26]. The on state current in the simulation result gradually decreases with increasing reading voltage, resulting in the decrease of the on–off ratio, as shown in Fig. 3. However, the hysteresis of the on–off ratio in a reading voltage range is never extinguished because the erasing process is not employed in this simulation. The trapped electrons in the practical device are emitted from traps by a high electric field with increasing reading voltage, therefore the device is changed from the on state to off state, resulting in the achievement of the erasing process [27]. The erasing process will be added into the simulation model in future. In summary, electrical properties of organic memory devices consisting of a single layer were investigated by using a driftdiffusion model. After application of a writing voltage, the current under a reading voltage was larger than that without a writing voltage. The appearance in the current bistability of the organic memory devices consisting of a single layer was attributed to the trapped electrons near the metal/organic interface. The on state current due to the increase in the hole injection efficiency and the hole mobility at the same reading voltage was larger than the off state current, resulting in the appearance of the current bistability in the organic

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