The quality of 200 mm diameter epitaxial Si wafers for advanced CMOS technology monitored using synchrotron X-ray topography

Microelectronic Engineering 45 (1999) 47–56

The quality of 200 mm diameter epitaxial Si wafers for advanced CMOS technology monitored using synchrotron X-ray topography ¨ d, Patrick J. McNally a , *, A.N. Danilewsky b , J.W. Curley a , A Reader c , R. Rantamaki T. Tuomi d , M. Bolt c , M. Taskinen d a

Microelectronics Research Laboratory, School of Electronic Engineering, Dublin City University, Dublin 9, Ireland b D-79108, Freiburg, Germany c Centre Commun CNET SGS-Thomson Philips, Crolles 38921, France d Optoelectronics Laboratory, Helsinki University of Technology, P.O. Box 3000, 02015 TKK, Finland

Abstract The control and characterisation of wafer defect and strain distributions is of crucial importance for the development of advanced Ultra Large Scale Integration (ULSI) circuits. Within the IC manufacturing sector 0.35 mm linewidth-based advanced Complementary Metal Oxide Semiconductor (CMOS) logic has recently emerged at a high level of maturity, to be closely followed by an even more demanding 0.25 mm process. One very important issue is the need to ensure a uniform, high quality Si substrate, i.e. minimise defect densities and eliminate strain distributions in the starting wafer material. Synchrotron section and back-reflection topographic techniques were applied to 200 mm diameter p-Si wafers, upon which, boron and arsenic doped epitaxial silicon layers had been deposited. These wafers were supplied from manufacturers around the globe and revealed substantial differences in the overall quality of the epilayers and substrates. In all wafers the substrate quality varied significantly with position across the wafer, as measured by the presence of oxygen-related defects and dopant strain homogeneity. The strain field uniformity, induced by the growth of lightly doped Si epilayers, was also observed to vary qualitatively with location on a wafer. Back-reflection topographs verify that the quality of the epilayer-substrate interface improved as the thickness of the epilayer, or the gradient of dopant density across the interface, is reduced. Cellular strain-related structures, of the order of a few hundred mm in circumference, have been observed in the more stressed p on p 1 samples. Topographic results are in agreement with those obtained from X-ray diffraction measurements. Finally, an examination was carried out into the quality of commercially supplied 200 mm diameter Si wafers, revealing differences in the overall quality of the wafers.  1999 Elsevier Science B.V. All rights reserved. Keywords: Silicon; Epitaxy; CMOS; X-ray topography; Synchrotron PACS: 61.72.F; 61.72.D; 85.40; 61.10

1. Introduction The ongoing decrease in critical dimensions and increasing integration levels (e.g. towards ULSI) in Si CMOS technology is imposing ever-tighter constraints on quality control parameters for the IC *Corresponding author. Fax: 1353-1-7045508; e-mail: [email protected] 0167-9317 / 99 / $ – see front matter PII: S0167-9317( 98 )00261-5

Copyright  1999 Elsevier Science B.V. All rights reserved.

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manufacturing industry. One of the more important of these is the need to minimise wafer defect densities and to eliminate strain distributions in start-up wafer material [1]. In addition, device processing can have a profound impact on material quality and subsequent uniformity of device electrical characteristics [2]. The reduction of spatial dimensions of ULSI devices, the increasing integration levels of new generation ULSI circuits, the presence of high aspect ratio topography, the use of advanced techniques for isolation and interconnect and the application of advanced materials, material combinations and multi-layers have all become key components of leading-edge IC manufacture and state-of-the-art device development. Yet, all of these directly lead to the build-up of very large local stresses in both layers and the semiconductor surface region, which become more acute and show larger gradients as dimensions shrink. Such stresses give rise to defects and influence physical processes such as dopant diffusion and oxygen kinetics, so that process control and yield become critical and difficult. In particular, stress directly leads to degradation of electrical parameters, such as leakage currents, electrical mobilities, carrier lifetimes and threshold voltages, by which the stability and reliability of electronic components are severely affected [3,4]. Indeed, if the quality of the bare Si is not excellent, then no amelioration of the impact of later processing steps will succeed in eliminating problems attributed to the start-up substrates. The semiconductor industry is continually seeking high 3D spatial resolution metrology and diagnostic tools which are powerful and comprehensive, i.e. characterise parameters critical to performance and yield, are non-destructive and can be applied readily to material qualification and process control. Synchrotron X-Ray Topography (SXRT) is such a tool. X-ray topography is an imaging technique, which uses Bragg reflection from single crystals. A perfect single crystal, upon which a uniform wide or narrow X-ray beam impinges, will display a perfectly homogenous distribution or a regular set of interference fringes, respectively, of transmitted or reflected X-rays. However, imperfections in the crystal matrix, e.g. defects, dislocations, precipitates, process-induced strains or grain boundaries, will deform the diffracting lattice planes. The corresponding deviations from Bragg’s Law create inhomogeneities in the recorded diffracted intensity, thereby non-destructively producing a map of the location and distribution of such crystalline imperfections [5].

2. Experimental Synchrotron topography techniques [6,7] were applied in this work to various bare and processed 200 mm diameter Si wafers which were used in the fabrication and evaluation of advanced 0.25 mm and 0.35 mm CMOS logic technologies. The substrates usually carried an epitaxial Si layer, which is very common in modern ULSI circuit manufacture. The topographs were produced with synchrotron white beam radiation from the DORIS III storage ring at the Hamburger Synchrotronstrahlungslabor am Deutschen Elektronen-Synchrotron, Germany (HASYLAB am DESY). Positron currents of 50–100 mA were used and the particle momentum was | 4.5 GeV/ c. For section topography, the beam was limited by a horizontal slit of height 15 mm and length | 10 mm. The angle between the normal to the (100) surface of the Si wafer and the beam was set at 26.58. In the case of back reflection topography, this angle was set at 08, and the beam, readjusted to dimensions 4 mm 3 1.5 mm, passed directly through a hole in the recording film to be Bragg reflected from the upper regions of the Si wafers. For both imaging geometries the measuring station was located 32 m from the

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source. The topographs were recorded on two types of film: High resolution Kodak SO-343 with a grain size of 0.05 mm or a lower resolution, though faster, Kodak SR X-ray film. Exposures on the high resolution film typically took a few minutes to record a full Laue pattern, while the lower resolution film was | 60 times faster. A conventional four crystal monochromator, Si (111), X-ray diffractometer arrangement in ( 1 2 2 1 ) mode was used to carry out rocking curve diffraction analysis, in order to quantify epitaxial lattice mismatches at numerous locations on the wafers

3. Results and discussion

3.1. Silicon epitaxy on 200 mm silicon substrates A section topographic analysis was carried out to examine the impact of the deposition of epitaxial n- and p-type Si layers upon various 200 mm diameter Si substrates. Two main deposition regimes were analysed, namely the deposition of p-Si on a p 1 -Si substrate (Type P) and n-Si on a p-Si substrate (Type N). Type P samples consisted of: 200 mm diameter and 700 mm thick p 1 -Si (100) Czochralski substrate (1 3 10 19 cm 23 Boron doping) upon which p-Si (1 3 10 15 cm 23 Boron doping) was CVD epitaxially deposited, at thicknesses varying from 2 mm to 4 mm. Type N samples consisted of: 200 mm diameter and 700 mm thick p-Si (100) Czochralski substrate (1 3 10 15 cm 23 Boron doping) upon which epitaxial n-Si (2 3 10 16 cm 23 Arsenic doping) was deposited at thicknesses varying from 2 mm to 4 mm. Fig. 1(a) is a 1 1¯ 1¯ bar section topograph for the Type P sample with a Si epilayer thickness T epi 5 4 mm. The top surface is uppermost in all section topographs shown here. The image of the epilayer is clearly seen as a dark non-uniform line at the top of Fig. 1(a). This unambiguous imaging of the strain fields due to the presence of the epilayer could be attributable to a combination of mechanisms: (i) strain generation due to lattice mismatch and (ii) defect generation near the epilayer-substrate interface. Furthermore, the epitaxial strain fields are not evenly distributed across the wafer, not even across the | 10 mm length of this topograph. The introduced stresses are reduced as T epi is progressively decreased. For example, in Fig. 1(b), a 1 1¯ 1¯ section topograph for a Type P sample with T epi 5 2 mm, the strain field due to the epilayer deposition appears to have been significantly reduced. Backside damage is visible in all topographs as dark stripes perpendicular to the surface, and the overall crystalline quality is diminished by the presence of oxygen precipitates, which show up as dark spots. The situation for Type N samples is much improved. Fig. 2(a) and Fig. 2(b) are 1 1¯ 1¯ section topographs for these samples where T epi 5 4 mm and 2 mm, respectively. The epilayers in both cases are harder to distinguish, indicating that the introduced stresses are greatly reduced. They are also ¨ more homogeneous across the length of the topograph ( | 10 mm) as the Pendellosung Fringing, i.e. the long lines parallel to the surface, exhibits little distortion. It is clear that the introduced lattice mismatch, and hence strain, is not primarily due to differences in dopant species type per se – but rather due to the large gradients in dopant densities which exist across the epilayer-substrate interface. The incorporation of dopants in a semiconductor layer expands or contracts the lattice structure relative to that of undoped silicon [8]. In the purely elastic regime the film strain is

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Fig. 1. (a) 1 1¯ 1¯ section topograph for Type P sample; T epi 54 mm. Scale bar applicable to all section topographs in this paper is also shown. (b) 1 1¯ 1¯ section topograph for Type P sample; T epi 52 mm.

´i 5 bi ND , i 5 1,2

(1)

where bi is the appropriate lattice contraction coefficient, and ND is the dopant concentration [9]. For the Type P and N samples bi , ´i and D´i (the difference in strain between the substrate and epilayer) are calculated according to a linear model (i51) and a volumetric model (i52) [10,11]: r dop bi 5 1 2 ]] N 21 (2) Si r Si

F

G r 1 b 5 ] F1 2S]]D GN 3 r dop

2

Si

3

21 Si

(3)

where r dop and r Si are the covalent radii of the dopant and Si atoms respectively, and NSi is the density ˚ r B 50.88 A ˚ [8], rAs 51.25 A ˚ [12] and of Si lattice sites. For these calculations r Si 51.17 A, 22 3 NSi 55310 atoms / cm [13]. The results are tabulated in Table 1 and confirm our analysis. The strain differential is greatest for the Type P samples (approximately three orders of magnitude greater than the Type N case) and these larger strains and strain differentials are visible in the topographs. In addition, the induced stresses in the epilayers will be progressively reduced as T epi decreases. A careful balance needs to be achieved between epilayer thickness, dopant gradients and species choice.

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Fig. 2. (a) 1 1¯ 1¯ section topograph for Type N sample; T epi 54 mm. (b) 1 1¯ 1¯ section topograph for Type N sample; T epi 52 mm.

Back-reflection topography was used to map the homogeneity of lattice mismatched epi-Si layers to the Si substrate. An appropriate choice of reflection (and hence X-ray wavelength) ensures that diffraction occurs predominantly within the upper surface region, thereby imaging the region of greatest interest. Two 602¯ back-reflection topographs, the wavelength of which is 0.16nm, are shown in Fig. 3(a) and Fig. 3(b) for the Type P and Type N samples, respectively. In each case T epi 54 mm. In the more highly strained sample (Type P) epitaxial strain inhomogeneity is observed in the form of elongated cellular strain features within the sample, as seen in Fig. 3(a). The structures have a circumference of the order of hundreds of microns. As the stress is reduced, e.g. by a reduction in T epi or in the gradient of dopant concentration at the epilayer-substrate interface or indeed in absolute Table 1 Calculation of epilayer / substrate strain

b1 b2 ´1 ´2 D´1 D´2

p 1 -Si substrate

p-Si substrate

p-Si epi (B doped)

n-Si epi (As doped)

4.96310 224 3.83310 224 4.96310 25 3.83310 25

4.96310 224 3.83310 224 4.96310 29 3.83310 29

4.96310 224 3.83310 224 4.96310 29 3.83310 29

21.37310 224 21.46310 224 22.74310 28 22.92310 28

Type P (p on p 1 )

Type N (n on p)

4.96310 25 3.83310 25

3.23310 28 3.30310 28

Note: b1 is the lattice contraction coefficient calculated using the linear model [10] and b2 is the lattice contraction coefficient calculated using the volumetric model [11]. ´1 and ´2 are the respective calculated strains, while D´i are the respective differences in strains between the substrate and epilayer.

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Fig. 3. (a) 602¯ back reflection topograph for Type P sample; T epi 54 mm. Scale bar applicable to all back reflection topographs in this paper is also shown. (b) 602¯ back reflection topograph for Type N sample; T epi 54 mm.

strain values, these strain structures tend to disappear in the topographs (see Fig. 3(b)). In distorted crystals, extinction phenomena do not occur and the kinematical X-ray diffraction theory is applicable. However, if the crystalline material has a high degree of perfection, e.g. high-quality Silicon, extinction effects can lead to attenuation at a much more rapid rate than absorption [14]. Since we are attempting to map out the strain fields within the Silicon the kinematical approximation is appropriate, as the effective penetration depth of the X-rays within the contributing volume is determined by this approach [15]. The penetration depths (t p ) for the topographs are calculated using [14]. For this 602¯ reflection, the penetration depth t p ¯27 mm from the kinematical theory, so these varying strain fields are almost certainly an upper surface feature. It is most unlikely that these cellular features are due to dislocation generation, e.g. k011l-type misfit dislocations previously observed in strained Si layers on (100) Si substrates [16–18], for a number of reasons. Firstly, these types of misfit dislocations are visible as arrays of crosshatched dislocation lines at right angles to each other. This is not observed here, and indeed no dislocations are individually resolved. Secondly, the stresses in the epilayers for all samples in this study are at least an order of magnitude below the threshold for normal misfit dislocation generation [8]. One must conclude that the strains at the epilayer-substrate interface vary across the wafer on a scale of the

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order of hundreds of microns, and are most likely due to non-uniform growth or dopant inhomogeneity at the epilayer-substrate interface. This analysis was confirmed by conventional X-ray diffraction analysis (XRD) of the 400 diffraction peak for the Type P and N samples, respectively. For both cases T epi 54 mm. The trends in the data agree with the X-ray topographic images. Fig. 4 shows a typical X-ray diffraction curve of a Type N sample. Its full width at half maximum (FWHM) is 13.6 arcseconds. Fig. 4 also shows diffraction curves of a Type P sample for three different locations, where each location is separated by 400 mm from its neighbour. Each curve is composed of two peaks, one from the substrate and one from the epilayer. From the separation DQ of the two peaks, one can calculate the mismatch strain as Da ' d l 2 d s sin(Qs ) h 5 ]] 5 ]]] 5 ]]]]] 2 1 a Si ds sin(Qs 1 DQ )

(4)

where Da ' is the difference between the lattice constants of the epilayer and the substrate normal to

Fig. 4. 400 diffraction curves for the two wafer types: P and N. In both cases shown here T epi 54 mm and the curves were taken near the centre of each wafer. For the type P wafer, the diffraction curves were taken at three locations, each separated by 400 mm.

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the surface, d s is the substrate interplanar spacing for the Bragg planes, d l is the epilayer interplanar spacing, Qs is the substrate Bragg angle and n is an integer. The data from d s was obtained from lattice parameter data for Boron doped Silicon [19] and interpolated where necessary. For example, a Si 50.5430 nm for Si:B(1310 19 cm 23 ). Slight differences are seen in the shape of the rocking curves for these three locations on Type P samples. However, these differences may be also be due to small systematic measurement variations, and thus conventional XRD will not allow one to map out lattice strain variations in this study. As we have seen, this is not the case for SXRT. Using the data for Location 1, one obtains that the magnitude of the mismatch strain uh u57.7383 10 25 for Wafer P. However, for the nominally lower strain Type N wafer, these strain variations are much smaller and lattice mismatch was not measurable. The experimental results for the strain uh u can be compared with the calculated film strains ´1 and ´2 using the equation [20] 12n ´ 5 ]] h 11n

(5)

where n is the Poisson ratio. In Eq. (5), n 5(1 / 2)2(E / 6B) in which E is the elastic constant (Young’s modulus) and B is the bulk modulus of silicon. From ref. [19] n 50.28 is obtained. If uh u57.738310 25 , then ´ 54.353310 25 , which is in rather good agreement with the calculated values of Table 1, i.e. ´1 54.96310 25 and ´2 53.83310 25 .

3.2. Commercial wafer quality Section topography was applied to a full analysis of the quality of commercially grown 200 mm diameter wafers. An account of a preliminary analysis of these wafers is carried in [21]. Wafers from two different manufacturers were examined, henceforth called Wafer A and Wafer B. The silicon substrates were (100) CZ p 1 -type wafers with a nominal thickness of 700 mm. A p-type epi-layer (B doped) was grown as before to a thickness of 4 mm, with a measured resistivity of 8–15 Vcm. These wafers were examined systematically across the wafer from one edge to the other. Section topographs were taken at separations of |16 mm. Fig. 5 shows the relevant 2 2 0 section topographs of Wafer A and Wafer B from the two manufacturers. Positions A1 and B1 refer to locations at the wafer edges, as do locations A12 and B12. Locations A6, A7, B6 and B7 are near the wafer centres. As can be seen there are clear differences in the quality of these wafers, even across just one single wafer. The appearance of sharp ¨ ¨ Pendellosung fringes indicates a good crystalline quality. The Pendellosung fringes almost disappear at locations B8–B11, which coincides with a greater density of defects. A similar phenomenon may be observed at locations A7 and A8. Backside damage is also prevalent in both wafers, and is especially bad in Wafer A (see locations A3, A4, A7, A8, A12). The back surface damage, intentional or otherwise, is distinctly non-uniform. The strain associated with the epilayer is visible as a dark line at the top of each section topograph in almost all topographs. This strain appears to be reasonably ¨ uniform, though the distortion of the Pendellosung fringes at locations A6 and B6 suggests some inhomogeneity, possibly even due to wafer warpage. The results demonstrate the ability of synchrotron X-ray topography to monitor wafer quality, and illustrate that optimal quality control for such commercial wafers has not yet been attained.

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Fig. 5. Section topographs for 12 locations across each of two commercially grown 200 mm diameter 4 mm epi-Si on Si wafers, types A and B.

4. Conclusions Synchrotron section and Laue back-reflection topography have been used in the evaluation of Si on Si epitaxy for 200 mm diameter (100) Si wafers used in the ongoing development of advanced 0.35 mm and 0.25 mm CMOS logic technologies. Inhomogeneity of strains within the epilayers remains a problem for these large diameter wafers. Large gradients in dopant densities across the epilayersubstrate interface can lead to significant strains, which are seen to produce cellular strain structures at stresses below those required to generate misfit dislocations. Commercial wafer quality was examined and it had been shown that SXRT can be used as an important quality evaluation tool for these

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emerging large wafer technologies. Indeed, it permits direct qualitative visualisation of strain variations as small as 10 25 across individual wafers, utilising very simple arrangements when compared to conventional XRD techniques. Acknowledgements The authors would like to thank Dr. T. Wroblewski at HASYLAB am DESY, Hamburg, Germany for his assistance at beamline F-1. The support of the Irish Forbairt International Collaboration Programme is also appreciated. References [1] P.M. Fahey, S.R. Mader, S.R. Stiffler, R.L. Mohler, J.D. Mis, J.A. Slinkman, IBM J. Res. Develop. 36(2) (1992) 159–182. [2] Materials Research Society Symposium Proceedings, Materials Research Society, USA, 378 (1995). [3] J.W. Slotboom, M.J.J. Theunissen, A.J.R. de Kock, IEEE Electron Device Lett EDL-4 (1983) 403–406. [4] GA Rozgonyi, RR Kola, in: K. Sumino (Eds.), Defect Control in Semiconductors, Elsevier, North-Holland, 1990, p. 579. [5] T. Tuomi, S. Hahn, M. Tilli, C.-C.D. Wong, O. Borland, Mat. Res. Soc. Symp. Proc. 71 (1986) 47–52. [6] T. Tuomi, K. Naukkarinen, P. Rabe, Phys. Stat. Sol. (a) 25 (1974) 93–106. [7] M. Hart, J. Appl Crystallogr. 8 (1974) 436–444. [8] H.J. Herzog, L. Csepregi, H. Seidel, J. Electrochem. Soc. 131 (1984) 2969–2974. [9] B.G. Cohen, Solid-State Electron. 10 (1967) 33–37. [10] K.G. McQuhae, A.S. Brown, Solid-State Electron. 15 (1972) 259–264. [11] J.E. Lawrence, J. Electrochem. Soc. 113 (1966) 819–824. [12] CRC Handbook of Chemistry and Physics, 56th ed., CRC Press, p. F-212, 1975–76. [13] H.J. Lee, C.H. Han, C.K. Kim, Mat. Res. Soc. Symp. Proc. 378 (1995) 129–134. [14] G.D. Yao, M. Dudley, J. Wu, J. X-Ray Sci. Technol. 2 (1990) 195–213. [15] J. Miltat, M. Dudley, J. Appl. Crystallogr. 13 (1980) 555–562. [16] H.J. Queisser, J. Appl. Phys. 32 (1961) 1776–1780. [17] J. Washburn, G. Thomas, H.J. Queisser, J. Appl. Phys. 35 (1964) 1909–1914. [18] H.J. Lee, Y.J. Jeon, C.H. Han, C.K. Kim, Appl. Phys. Lett. 64 (1994) 2955–2957. ¨ [19] Landolt-Bornstein, Group III, 17(a), Semiconductors, Springer, 1982. [20] K. I Cho, S. Nahm, S.G. Kim, S.C. Lee, K.S. Kim, S.C. Park, Mat. Res. Soc. Symp. Proc. 356 (1995) 319–324. [21] J. Curley, P.J. McNally, A. Reader, et al., Mat. Res. Soc. Symp. Proc. 469 (1997) 83–88.