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Influence of gap states on the electrical stability of pentacene thin film transistors
Available online at www.sciencedirect.com
Journal of Non-Crystalline Solids 354 (2008) 2875–2878 www.elsevier.com/locate/jnoncrysol
Influence of gap states on the electrical stability of pentacene thin film transistors A. Benor a, D. Knipp a,*, J. Northrup b, A.R. Vo¨lkel b, R.A. Street b a
Jacobs University Bremen, School of Engineering and Science, Electronic Devices and Nanophotonics Laboratory, 28759 Bremen, Germany b Palo Alto Research Center, Electronic Materials and Devices Laboratory, Palo Alto, CA 94304, USA Available online 12 February 2008
Abstract The influence of oxygen induced gap states on the device operation and the stability of polycrystalline pentacene thin film transistors (TFTs) was investigated by electrical in situ measurements. Unexposed devices are stable, whereas devices exposed to dry oxygen exhibit a shift of the threshold voltage upon prolonged device operation. Stressing the transistor in the on-state (negative bias) leads to a shift of the threshold voltage towards negative gate voltages, whereas prolonged bias stress in the off-state causes a shift of the threshold voltage in the opposite direction. The gap states are formed 0.18 eV (acceptor-like states) and 0.62 eV (donor-like states) above the valence band maxima. The charge carrier mobility and the on/off ratio of the transistor are not affected by the gap states. A simple density-of-states model will be presented, which allows for the explanation of the experimental results. Ó 2008 Elsevier B.V. All rights reserved. PACS: 73.50.Gr; 85.30.Tv; 71.20. b; 73.50. h; 72.80.Le Keywords: Thin film transistors; Band structures; Defects
1. Introduction Electronics based on organic and polymeric materials has gained considerable attention in recent years. The interest in organic electronics can be attributed to the emerging demands in novel display media on low cost and/or flexible substrates. The progress has been caused by distinct improvements of material and device properties. Of organic and polymeric materials, pentacene (C22H14) has demonstrated one of the highest charge carrier mobilities exceeding 3 cm2/V s [1,2]. Thus, organic thin film transistors (TFTs) are of potential interest for applications like backpanels of displays or organic radio frequency identification tags (organic RFID tags). However, the realization of complex organic circuitry requires the fabrication of
*
Corresponding author. E-mail address: [email protected] (D. Knipp).
0022-3093/$ - see front matter Ó 2008 Elsevier B.V. All rights reserved. doi:10.1016/j.jnoncrysol.2007.10.093
highly stable TFTs [3,4]. In particular variations of the threshold voltage have a distinct influence on the operation of OLED displays [3] and organic radio frequency identification tags (RFID) [4]. Major sources of instabilities are bias stress effects, which lead to a change of the threshold voltage over time. Bias stress effects can arise from slow trapping in the dielectric and/or surface states at the semiconductor/dielectric interface, or defect creation in the semiconductor. Such effects occur for most thin film transistors fabricated at low temperatures [5–9]. Bias stress effects have been observed for amorphous silicon [5], polycrystalline silicon, organic [6,7] and polymeric TFTs [8,9]. Several investigations reveal that the threshold voltage of organic or polymeric TFTs is strongly affected by bias stress and environmental conditions like oxygen and humidity [10–14]. To gain insights in the electronic transport and stability of polycrystalline pentacene TFTs electrical in situ measurements were carried out. The influence of the environmental
2876
A. Benor et al. / Journal of Non-Crystalline Solids 354 (2008) 2875–2878
10
-3
z Pentacene
Source
Drain
Dielectric
10
Gate
-5
Drain current [A]
0
x
L
-1 V 10
-7
t
L=40μm W/L=4000 10
-9
t = 0 min, 10 min, 30 min, 90 min, 180 min 10
-11
-10
-8
-6
-4
-2
0
2
4
6
Gate voltage [V] Fig. 1. Schematic cross section of a staggered polycrystalline pentacene thin film transistor and measured transfer curve of a pentacene TFT after applying bias stress to the device. The device was exposed to dry oxygen before applying prolonged bias stress for 0 min, 10 min, 30 min, 90 min and 180 min. The transistor was stressed in the on-state. The drain voltage was kept constant at 10 V and the gate voltage was fixed at VG = 20 V.
conditions on the device operation and the electrical stability was studied by exposing the TFTs to dry oxygen. Furthermore, a simple density-of-state model was developed, which allows for the explanation of the experimental results.
ing the initial transfer and output characteristics (0 min, unstressed device) the pentacene transistors were stressed for 10 min, 30 min, 90 min and 180 min at different gate and drain voltages. Afterwards, regular measurements of the I/V curves were carried out. Interestingly no change of the device characteristic was observed after stressing the devices up to 180 min. The bias stress experiment was repeated after exposing the devices to dry oxygen for 30 min. The concentration of dry oxygen in the system was controlled by the pressure in the high vacuum chamber (10 1 Pa). The oxygen exposure results in a shift of the onset of the drain current towards positive gate voltages [10]. The charge carrier mobility of the transistors was not affected by the oxygen contamination. Furthermore, the oxygen exposure leads to a slight increase of the subthreshold slope. After exposing the devices to oxygen, the devices were stressed for 10 min, 30 min, 90 min, and 180 min. The transfer characteristics after stressing the transistor in the on-state are shown in Fig. 1. The drain voltage was kept constant at 10 V and the gate voltage was fixed at VG = 20 V while stressing the device. Due to prolonged device operation the transfer curve was shifted towards negative gate voltages. The charge carrier mobility, the on/off ratio and the subthreshold slope of the transistor are not affected by the bias stress experiment. The bias stress results in a threshold voltage shift of 1 V towards negative gate voltages. The opposite behavior is observed if the transistor is bias stressed in the off-state (positive gate voltage). As a consequence, the threshold voltage shifts towards positive gate voltages. The shift of the threshold voltage as a function of time after positive and negative bias stress is shown in Fig. 2. The shift of the threshold voltage increases with increasing gate and drain voltages applied to the devices during prolonged
2. Experiment
3. Experimental results The pentacene transistors (inset Fig. 1) exhibit hole mobilities of 0.3–0.5 cm2/V s and subthreshold slopes of 0.2–0.4 V/decade using a 100 nm thick silicon oxide gate dielectric. The electrical measurements were carried out under high vacuum conditions (10 6 Pa). After measur-
1.0
Positive bias (VG=20V)
Threshold voltage shift [V]
The cross section of a staggered pentacene thin film transistor is shown in Fig. 1 (inset). A highly doped silicon wafer was used as a substrate. The gate dielectric of the transistor was formed by a 100 nm thick silicon oxide layer. The bottom drain and source contacts were defined by optical lithography. The pentacene molecules were deposited by organic molecular beam deposition (OMBD) using ˚ /s. The source material was two a deposition rate of 0.5 A times sublimation purified before depositing the molecules at a base pressure of 5 10 6 Pa. The films were prepared by keeping the substrate temperature constant at 70 °C. The final pentacene layer has a thickness of 10 nm.
VD=-10V
0.5
VD=-1V
0
VD=-1V -0.5
-1.0
(VG=-20V) Negative bias -1.5 2 10
10
3
VD=-10V 10
4
10
5
Time [s] Fig. 2. Measured shift of the threshold voltage of a pentacene TFT after prolonged bias stress. The transistor was stressed using drain voltages of 1 V and 10 V and gate voltages of 20 V and 20 V. The devices were exposed to oxygen before carrying out the bias stress experiment.
A. Benor et al. / Journal of Non-Crystalline Solids 354 (2008) 2875–2878
operation. The experimental results reveal that electronically active defect states are created during oxygen exposure of the device. 4. Simulation results In general, the change of the threshold voltage due to bias stress is caused by charge trapping or recharging of defect states in the dielectric, trapping and slow release of carriers in existing deep states in the semiconductor (bulk or interface), or a reversible structural change in the semiconductor that creates new traps. The fact that bias stress is only observed after exposing a pentacene TFT to dry oxygen indicates that trapping of charges in the dielectric can be excluded as a source of the threshold voltage shift. The results reveal that recharging of electronic defects in the channel material causes the shift of the threshold voltage. Furthermore, the defects need to be acceptor-like for positive bias stress and donor-like for negative bias stress. First principle pseudopotential density functional calculations of O-defects and OH-defects in pentacene show that such impurities lead to the creation of electronically active gap states [13]. The energetically most favorable defects are formed by replacing one of the hydrogen atoms in position A (Fig. 3, top) by an oxygen atom or an OH molecule. If one of the H atoms is replaced by oxygen two defect levels are formed. These defects are located 0.18 eV (acceptor-like states) and 0.62 eV (donor-like states) above the valence band maximum (Fig. 3, middle and bottom). OH-defects lead to the formation of very similar defect levels. For positive gate bias the Fermi level shifts towards the conduction A
A
CBM
(0/-)
0 +
EF(VG)
(+/0)
VBM
Electronic transition levels Defect
(+/0)
(0/-)
OH
0.18 eV
0.62 eV
Fig. 3. Molecular structure of pentacene (top) and electronic defect levels induced by oxygen. All energies are relative to the valence band edge, which is set to EV = 0 eV. Oxygen induced defects states are located 0.18 eV (acceptor-like states) and 0.62 eV (donor-like states) above the valence band maxima.
2877
band and the (0/ ) defect states are negatively charged, whereas the (+/0) defect states are neutral. For high negative gate bias the Fermi level shifts towards the valence band and the (0/ ) defect states are neutral, whereas the (+/0) defect states are positively charged. In the following the electronic defect levels calculated by Northrup and Chabinyc [13] were used as input parameters to simulate the transfer characteristics of the polycrystalline pentacene TFT in Fig. 1. The current/voltage characteristics of the transistors were modeled by using a density-of-states model [7]. Poisson’s and continuity equations were solved along the z-axis (inset Fig. 1) to self-consistently calculate the charge and potential distribution. The current/voltage characteristic was modeled in the linear region by using the gradual channel approximation. A detailed description of the simulation model including the material parameters used for the simulation is given in Refs. [7,15]. The unexposed device was modeled by considering a narrow exponential distribution of donor-like states, which extends from the valence band edge (EV = 0 eV) into the bandgap (not shown in the manuscript). The donor-like states can be considered as a bandtail. Similar bandtail states are observed for other thin film transistors prepared at low temperatures (e.g. amorphous silicon). The bandtail states account for the threshold voltage of the unexposed pentacene transistor. A total donor concentration of 5 1018 cm 3 was used for the simulation. The width of the valence band tail was in the range of 40 meV. The charge carrier mobility of the pentacene material was assumed to be constant in the simulations. No other gap states were used to model the transfer characteristic of the unexposed transistor. To account for the change of the transfer characteristic due to oxygen exposure an additional Gaussian distribution of acceptor-like states was introduced in the bandgap. The distribution of defects was introduced only in the first few nanometers (4 nm) of the film. The energetic level of the Gaussian distribution (0.18 eV above the VBM) is consistent with the acceptor-like states in Fig. 3. The total concentration of acceptor states is in the range of 5 1018 cm 3 and the width of the distribution was chosen to be 100 meV. The simulated transfer curve (initial) is shown in Fig. 4. The simulations indicate that the acceptor-like states account for the onset of the drain current for positive gate voltages. The total concentration of acceptor states in the film is consistent with other data presented in the literature [7,10–12,15]. The shift of the threshold voltage due to prolonged bias stress was modeled by introducing the second oxygen induced defect level 0.62 eV above the valance band maxima. A Gaussian distribution (width: 100 meV) was used to describe the donor-like defect states. The corresponding simulations are shown in Fig. 4. An increasing concentration of donor-like states leads to a shift of the transfer characteristic towards negative gate voltages. Therefore, the simulation describes the experimentally observed trend very well. The shift of the
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A. Benor et al. / Journal of Non-Crystalline Solids 354 (2008) 2875–2878
10
Drain current [A]
10
and 0.62 eV (donor-like) above the valence band maxima. The threshold voltage of the transistors shifts towards positive gate voltages for positive bias stress, whereas negative bias stress leads to a shift of the threshold voltage toward negative gate voltages. The shift of the threshold voltage due to bias stress is determined by the ratio of acceptor-like and donor-like states in the pentacene film.
-5
-1 V
L=40 μm W/L=4000
-7
Acknowledgements The authors would like to acknowledge A. Hoppe and V. Wagner for technical assistances and helpful discussions.
ND 10
-9
initial 17 -3 5 ⋅10 cm 18 -3 10 cm 18 -3 1.5⋅10 cm
10
References
-11
-10
-8
-6
-4
-2
0
2
4
6
Gate voltage [V] Fig. 4. Simulated transfer curves of a pentacene TFT using a density-ofstates model. Increasing the concentration of donor-like states (0.62 eV above the valence band maxima) leads to a shift of the threshold voltage towards negative gate voltages.
threshold voltage is controlled by the ratio of acceptor-like and donor-like states. 5. Summary The influence of oxygen induced gap states on the device stability of pentacene thin film transistors was investigated by electrical in situ measurements and numerical simulation of the current/voltage characteristics. Devices fabricated and characterized under vacuum conditions are stable against bias stress. Exposing the device to dry oxygen leads to the formation of electronically active defect states. The gap states are located 0.18 eV (acceptor-like)
[1] T.W. Kelley, P.F. Baude, C. Gerlach, D.E. Ender, D. Muyres, M.A. Haase, D.E. Vogel, S.D. Theiss, Chem. Mater. 16 (2004) 4413. [2] H. Klauk, M. Halik, U. Zschieschang, G. Schmid, W. Randlik, W. Weber, J. Appl. Phys. 92 (2002) 5259. [3] S. de Vusser, J. Genoe, P. Heremans, IEEE Trans. Electron. Dev. 53 (2006) 601. [4] A. Benor, A. Hoppe, V. Wagner, D. Knipp, Org. Electron. 8 (2007) 749. [5] C.-S. Chiang, J. Kanicki, K. Takechi, Jpn. J. Appl. Phys. 37 (1998) 4704. [6] P.V. Necliudov, M. Shur, D.J. Gundlach, T.N. Jackson, Mater. Res. Soc. Symp. Proc. 660 (2001). [7] A.R. Vo¨lkel, R.A. Street, D. Knipp, Phys. Rev. B 66 (2002) 195336. [8] A. Salleo, R.A. Street, Phys. Rev. B 70 (2004) 235324. [9] R.A. Street, M.L. Chabinyc, F. Endicott, B. Ong, J. Appl. Phys. 100 (2006) 114518. [10] D. Knipp, T. Muck, A. Benor, V. Wagner, J. Non-Cryst. Solids 352 (2006) 1774. [11] E.J. Meijer, C. Detcheverry, P.J. Baesjou, E. van Veenendaal, D.M. de Leeuw, T.M. Klapwijk, J. Appl. Phys. 93 (2003) 4831. [12] D. Knipp, A. Benor, V. Wagner, T. Muck, J. Appl. Phys. 101 (2007) 044504. [13] J.E. Northrup, M.L. Chabinyc, Phys. Rev. B 68 (2003) 041202. [14] K.P. Pernstich, D. Oberhoff, C. Goldmann, B. Batlogg, J. Appl. Phys. Lett. 89 (21) (2006) 213509. [15] D. Knipp, R.A. Street, A.R. Vo¨lkel, P. Kumar, Synth. Met. 155 (3) (2005) 485.
Journal of Non-Crystalline Solids 354 (2008) 2875–2878 www.elsevier.com/locate/jnoncrysol
Influence of gap states on the electrical stability of pentacene thin film transistors A. Benor a, D. Knipp a,*, J. Northrup b, A.R. Vo¨lkel b, R.A. Street b a
Jacobs University Bremen, School of Engineering and Science, Electronic Devices and Nanophotonics Laboratory, 28759 Bremen, Germany b Palo Alto Research Center, Electronic Materials and Devices Laboratory, Palo Alto, CA 94304, USA Available online 12 February 2008
Abstract The influence of oxygen induced gap states on the device operation and the stability of polycrystalline pentacene thin film transistors (TFTs) was investigated by electrical in situ measurements. Unexposed devices are stable, whereas devices exposed to dry oxygen exhibit a shift of the threshold voltage upon prolonged device operation. Stressing the transistor in the on-state (negative bias) leads to a shift of the threshold voltage towards negative gate voltages, whereas prolonged bias stress in the off-state causes a shift of the threshold voltage in the opposite direction. The gap states are formed 0.18 eV (acceptor-like states) and 0.62 eV (donor-like states) above the valence band maxima. The charge carrier mobility and the on/off ratio of the transistor are not affected by the gap states. A simple density-of-states model will be presented, which allows for the explanation of the experimental results. Ó 2008 Elsevier B.V. All rights reserved. PACS: 73.50.Gr; 85.30.Tv; 71.20. b; 73.50. h; 72.80.Le Keywords: Thin film transistors; Band structures; Defects
1. Introduction Electronics based on organic and polymeric materials has gained considerable attention in recent years. The interest in organic electronics can be attributed to the emerging demands in novel display media on low cost and/or flexible substrates. The progress has been caused by distinct improvements of material and device properties. Of organic and polymeric materials, pentacene (C22H14) has demonstrated one of the highest charge carrier mobilities exceeding 3 cm2/V s [1,2]. Thus, organic thin film transistors (TFTs) are of potential interest for applications like backpanels of displays or organic radio frequency identification tags (organic RFID tags). However, the realization of complex organic circuitry requires the fabrication of
*
Corresponding author. E-mail address: [email protected] (D. Knipp).
0022-3093/$ - see front matter Ó 2008 Elsevier B.V. All rights reserved. doi:10.1016/j.jnoncrysol.2007.10.093
highly stable TFTs [3,4]. In particular variations of the threshold voltage have a distinct influence on the operation of OLED displays [3] and organic radio frequency identification tags (RFID) [4]. Major sources of instabilities are bias stress effects, which lead to a change of the threshold voltage over time. Bias stress effects can arise from slow trapping in the dielectric and/or surface states at the semiconductor/dielectric interface, or defect creation in the semiconductor. Such effects occur for most thin film transistors fabricated at low temperatures [5–9]. Bias stress effects have been observed for amorphous silicon [5], polycrystalline silicon, organic [6,7] and polymeric TFTs [8,9]. Several investigations reveal that the threshold voltage of organic or polymeric TFTs is strongly affected by bias stress and environmental conditions like oxygen and humidity [10–14]. To gain insights in the electronic transport and stability of polycrystalline pentacene TFTs electrical in situ measurements were carried out. The influence of the environmental
2876
A. Benor et al. / Journal of Non-Crystalline Solids 354 (2008) 2875–2878
10
-3
z Pentacene
Source
Drain
Dielectric
10
Gate
-5
Drain current [A]
0
x
L
-1 V 10
-7
t
L=40μm W/L=4000 10
-9
t = 0 min, 10 min, 30 min, 90 min, 180 min 10
-11
-10
-8
-6
-4
-2
0
2
4
6
Gate voltage [V] Fig. 1. Schematic cross section of a staggered polycrystalline pentacene thin film transistor and measured transfer curve of a pentacene TFT after applying bias stress to the device. The device was exposed to dry oxygen before applying prolonged bias stress for 0 min, 10 min, 30 min, 90 min and 180 min. The transistor was stressed in the on-state. The drain voltage was kept constant at 10 V and the gate voltage was fixed at VG = 20 V.
conditions on the device operation and the electrical stability was studied by exposing the TFTs to dry oxygen. Furthermore, a simple density-of-state model was developed, which allows for the explanation of the experimental results.
ing the initial transfer and output characteristics (0 min, unstressed device) the pentacene transistors were stressed for 10 min, 30 min, 90 min and 180 min at different gate and drain voltages. Afterwards, regular measurements of the I/V curves were carried out. Interestingly no change of the device characteristic was observed after stressing the devices up to 180 min. The bias stress experiment was repeated after exposing the devices to dry oxygen for 30 min. The concentration of dry oxygen in the system was controlled by the pressure in the high vacuum chamber (10 1 Pa). The oxygen exposure results in a shift of the onset of the drain current towards positive gate voltages [10]. The charge carrier mobility of the transistors was not affected by the oxygen contamination. Furthermore, the oxygen exposure leads to a slight increase of the subthreshold slope. After exposing the devices to oxygen, the devices were stressed for 10 min, 30 min, 90 min, and 180 min. The transfer characteristics after stressing the transistor in the on-state are shown in Fig. 1. The drain voltage was kept constant at 10 V and the gate voltage was fixed at VG = 20 V while stressing the device. Due to prolonged device operation the transfer curve was shifted towards negative gate voltages. The charge carrier mobility, the on/off ratio and the subthreshold slope of the transistor are not affected by the bias stress experiment. The bias stress results in a threshold voltage shift of 1 V towards negative gate voltages. The opposite behavior is observed if the transistor is bias stressed in the off-state (positive gate voltage). As a consequence, the threshold voltage shifts towards positive gate voltages. The shift of the threshold voltage as a function of time after positive and negative bias stress is shown in Fig. 2. The shift of the threshold voltage increases with increasing gate and drain voltages applied to the devices during prolonged
2. Experiment
3. Experimental results The pentacene transistors (inset Fig. 1) exhibit hole mobilities of 0.3–0.5 cm2/V s and subthreshold slopes of 0.2–0.4 V/decade using a 100 nm thick silicon oxide gate dielectric. The electrical measurements were carried out under high vacuum conditions (10 6 Pa). After measur-
1.0
Positive bias (VG=20V)
Threshold voltage shift [V]
The cross section of a staggered pentacene thin film transistor is shown in Fig. 1 (inset). A highly doped silicon wafer was used as a substrate. The gate dielectric of the transistor was formed by a 100 nm thick silicon oxide layer. The bottom drain and source contacts were defined by optical lithography. The pentacene molecules were deposited by organic molecular beam deposition (OMBD) using ˚ /s. The source material was two a deposition rate of 0.5 A times sublimation purified before depositing the molecules at a base pressure of 5 10 6 Pa. The films were prepared by keeping the substrate temperature constant at 70 °C. The final pentacene layer has a thickness of 10 nm.
VD=-10V
0.5
VD=-1V
0
VD=-1V -0.5
-1.0
(VG=-20V) Negative bias -1.5 2 10
10
3
VD=-10V 10
4
10
5
Time [s] Fig. 2. Measured shift of the threshold voltage of a pentacene TFT after prolonged bias stress. The transistor was stressed using drain voltages of 1 V and 10 V and gate voltages of 20 V and 20 V. The devices were exposed to oxygen before carrying out the bias stress experiment.
A. Benor et al. / Journal of Non-Crystalline Solids 354 (2008) 2875–2878
operation. The experimental results reveal that electronically active defect states are created during oxygen exposure of the device. 4. Simulation results In general, the change of the threshold voltage due to bias stress is caused by charge trapping or recharging of defect states in the dielectric, trapping and slow release of carriers in existing deep states in the semiconductor (bulk or interface), or a reversible structural change in the semiconductor that creates new traps. The fact that bias stress is only observed after exposing a pentacene TFT to dry oxygen indicates that trapping of charges in the dielectric can be excluded as a source of the threshold voltage shift. The results reveal that recharging of electronic defects in the channel material causes the shift of the threshold voltage. Furthermore, the defects need to be acceptor-like for positive bias stress and donor-like for negative bias stress. First principle pseudopotential density functional calculations of O-defects and OH-defects in pentacene show that such impurities lead to the creation of electronically active gap states [13]. The energetically most favorable defects are formed by replacing one of the hydrogen atoms in position A (Fig. 3, top) by an oxygen atom or an OH molecule. If one of the H atoms is replaced by oxygen two defect levels are formed. These defects are located 0.18 eV (acceptor-like states) and 0.62 eV (donor-like states) above the valence band maximum (Fig. 3, middle and bottom). OH-defects lead to the formation of very similar defect levels. For positive gate bias the Fermi level shifts towards the conduction A
A
CBM
(0/-)
0 +
EF(VG)
(+/0)
VBM
Electronic transition levels Defect
(+/0)
(0/-)
OH
0.18 eV
0.62 eV
Fig. 3. Molecular structure of pentacene (top) and electronic defect levels induced by oxygen. All energies are relative to the valence band edge, which is set to EV = 0 eV. Oxygen induced defects states are located 0.18 eV (acceptor-like states) and 0.62 eV (donor-like states) above the valence band maxima.
2877
band and the (0/ ) defect states are negatively charged, whereas the (+/0) defect states are neutral. For high negative gate bias the Fermi level shifts towards the valence band and the (0/ ) defect states are neutral, whereas the (+/0) defect states are positively charged. In the following the electronic defect levels calculated by Northrup and Chabinyc [13] were used as input parameters to simulate the transfer characteristics of the polycrystalline pentacene TFT in Fig. 1. The current/voltage characteristics of the transistors were modeled by using a density-of-states model [7]. Poisson’s and continuity equations were solved along the z-axis (inset Fig. 1) to self-consistently calculate the charge and potential distribution. The current/voltage characteristic was modeled in the linear region by using the gradual channel approximation. A detailed description of the simulation model including the material parameters used for the simulation is given in Refs. [7,15]. The unexposed device was modeled by considering a narrow exponential distribution of donor-like states, which extends from the valence band edge (EV = 0 eV) into the bandgap (not shown in the manuscript). The donor-like states can be considered as a bandtail. Similar bandtail states are observed for other thin film transistors prepared at low temperatures (e.g. amorphous silicon). The bandtail states account for the threshold voltage of the unexposed pentacene transistor. A total donor concentration of 5 1018 cm 3 was used for the simulation. The width of the valence band tail was in the range of 40 meV. The charge carrier mobility of the pentacene material was assumed to be constant in the simulations. No other gap states were used to model the transfer characteristic of the unexposed transistor. To account for the change of the transfer characteristic due to oxygen exposure an additional Gaussian distribution of acceptor-like states was introduced in the bandgap. The distribution of defects was introduced only in the first few nanometers (4 nm) of the film. The energetic level of the Gaussian distribution (0.18 eV above the VBM) is consistent with the acceptor-like states in Fig. 3. The total concentration of acceptor states is in the range of 5 1018 cm 3 and the width of the distribution was chosen to be 100 meV. The simulated transfer curve (initial) is shown in Fig. 4. The simulations indicate that the acceptor-like states account for the onset of the drain current for positive gate voltages. The total concentration of acceptor states in the film is consistent with other data presented in the literature [7,10–12,15]. The shift of the threshold voltage due to prolonged bias stress was modeled by introducing the second oxygen induced defect level 0.62 eV above the valance band maxima. A Gaussian distribution (width: 100 meV) was used to describe the donor-like defect states. The corresponding simulations are shown in Fig. 4. An increasing concentration of donor-like states leads to a shift of the transfer characteristic towards negative gate voltages. Therefore, the simulation describes the experimentally observed trend very well. The shift of the
2878
A. Benor et al. / Journal of Non-Crystalline Solids 354 (2008) 2875–2878
10
Drain current [A]
10
and 0.62 eV (donor-like) above the valence band maxima. The threshold voltage of the transistors shifts towards positive gate voltages for positive bias stress, whereas negative bias stress leads to a shift of the threshold voltage toward negative gate voltages. The shift of the threshold voltage due to bias stress is determined by the ratio of acceptor-like and donor-like states in the pentacene film.
-5
-1 V
L=40 μm W/L=4000
-7
Acknowledgements The authors would like to acknowledge A. Hoppe and V. Wagner for technical assistances and helpful discussions.
ND 10
-9
initial 17 -3 5 ⋅10 cm 18 -3 10 cm 18 -3 1.5⋅10 cm
10
References
-11
-10
-8
-6
-4
-2
0
2
4
6
Gate voltage [V] Fig. 4. Simulated transfer curves of a pentacene TFT using a density-ofstates model. Increasing the concentration of donor-like states (0.62 eV above the valence band maxima) leads to a shift of the threshold voltage towards negative gate voltages.
threshold voltage is controlled by the ratio of acceptor-like and donor-like states. 5. Summary The influence of oxygen induced gap states on the device stability of pentacene thin film transistors was investigated by electrical in situ measurements and numerical simulation of the current/voltage characteristics. Devices fabricated and characterized under vacuum conditions are stable against bias stress. Exposing the device to dry oxygen leads to the formation of electronically active defect states. The gap states are located 0.18 eV (acceptor-like)
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