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WORLD ABSTRACTS ON M I C R O E L E C T R O N I C S AND R E L I A B I L I T Y
Parametric study of temperature distributions in chips joined by controlled chip collapse techniques. S. OKTAY,Proc. 1969 Electron. Compon. Conf., Washington D.C., 30 April-2 May (1969), p. 429. Parameters governing temperature distributions in chips joined by controlled chip collapse (flip-chip bonding) techniques are presented. These include the physical and geometrical properties of the various layers of metals and non-metals that form the chip-to-substrate interconnection. The importance of the bond between the interconnection and the substrate from the point of view of interfacial thermal resistance is indicated. Also, the "thermal pinch" effects of voids in controlled chip collapse interconnections are discussed. The various thermal impedances as obtained from computer simulated temperature profiles are given graphically as functions of the parameters. The derivation of a semiempirical expression for predicting the transient response of junctions on joined chips is shown. A low cost master pattern and screen making technique. L. JACOBSON, Proc. 1969 Electron. Compon. Conf., Washington D.C., 30 April-2 May (1969), p. 242. Two known techniques, one from the printed circuit industry and other from the commercial silk screen industry, are used to make master patterns and screens for printing thick film patterns for prototype circuits. Both techniques will be described. Printed circuit taping methods are used to make each thick film master pattern. Patterns are layed out at ten times normal size and photographically reduced to actual circuit size. The screen patterns are then made using commercially available indirect emulsion material. A home movie light and a photographic print frame are used to process the emulsion instead of a carbon arc and vacuum frame. These simple techniques result in quick turnaround time and minimum cost to produce development circuits.
6. MICROELECTRONICS--COMPONENTS AND EQUIPMENTS The emitter-base barrier-layer capacity in microelectronic circuits. J. TEICHMANN,Nachrichtentechnih 19, No. 6 (1966), p. 226. (In German.) For the emitter-base barrier-layer capacity which is used as a capacity, the influence exerted by the internal base-layer resistance on the frequency properties, as well as small and large signal behaviour, are calculated and compared with measurements. Evaporated silicon thin-film transistors. C. A. TEWFIK SALAMA,ReD. British Columbia Univ., Vancouver, Canada (PhD Thesis) (1966) 121 pp; Sci. Tech. Aerospace Rep. 6 (12), 1848, N68-22145. The method of fabrication, the theory and the properties of evaporated silicon thin film transistors are discussed. The device consists of a p-type silicon film on a sapphire substrate, with aluminium sourcedrain electrodes evaporated on to the silicon and followed by a silicon oxide, SiOx insulating layer and an aluminium gate. The device operates by field-effect conductivity modulation of an n-type inversion layer at the surface of the p-type film. The silicon films were evaporated by electron beam heating in a typical vacuum at a rate of 200-600 A/min. The films exhibited single crystal diffraction patterns when deposited at a substrate temperature in the range 1050-1100°C. Monolithic MOS-bipolar audio amplifiers. H. C. LIN and R. IYER, IEEE Tram. Broadcast TV Receivers. BTR-14, No. 2, July (1968), p. 80. A 1 W a.c. MOS-bipolar audio amplifier having a voltage gain exceeding 20 dB and the pass-band extending to sub-audio frequencies (--3 dB point of 0/1 Hz) has been designed and integrated. Performance characteristics of the breadboard and the integrated amplifier are presented. Ceramic capacitors for hybrid integrated circuits. D. W. HAMER, IEEE Spectrum, January (1969), p. 79. Ruggedness, wide capacitance range, high volumetric efficiency, and relatively attractive cost have been the main reasons for the popularity of ceramic chip capacitors. Continuing improvements in most of these categories promise to keep the ceramic chip in its present position of prominence. This article considers multilayer, single-layer, and screened-on configurations. In addition, relationships between size, capacitance, and cost are covered for three common ceramic formulations (NPO, W5R and Z5U). Multielement self-scanned mosaic sensors. P. K. WEIMER, W. S. PIKE, G. SADASIV, F. V. SHALLCROSSand L. MERAY-HORVATH,IEEE Spectrum, March (1969), p. 52. Self-scanned image sensors